From d9244a1b5b424346f20064134680c1f0a13b46e6 Mon Sep 17 00:00:00 2001 From: Chuanhong Guo <gch981213@gmail.com> Date: Tue, 5 May 2020 17:37:02 +0800 Subject: generic: ar8216: fix unknown packet flooding for ar8229/ar8236 ar8229 and ar8236 don't allow unknown unicast/multicast frames and broadcast frames to be flooded to cpu port. This isn't desired behavior for swconfig as we treat it as a standalone switch. Current code doesn't enable unicast frame flooding for ar8229 and uses wrong setup for ar8236. This commit fixes both of them by enabling port 0 flooding for all unknown frames. Fixes: FS#2848 Signed-off-by: Chuanhong Guo <gch981213@gmail.com> (cherry picked from commit 47f17b066259589b4a7b4181522321abf0660e18) --- target/linux/generic/files/drivers/net/phy/ar8216.c | 19 ++++++++++++++----- target/linux/generic/files/drivers/net/phy/ar8216.h | 4 ++-- 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c index 5ace4e0b15..9ac0d8fd45 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8216.c +++ b/target/linux/generic/files/drivers/net/phy/ar8216.c @@ -943,10 +943,14 @@ ar8229_init_globals(struct ar8xxx_priv *priv) ar8xxx_reg_set(priv, AR8229_REG_QM_CTRL, AR8229_QM_CTRL_ARP_EN); - /* Enable Broadcast/Multicast frames transmitted to the CPU */ + /* + * Enable Broadcast/unknown multicast and unicast frames + * transmitted to the CPU port. + */ ar8xxx_reg_set(priv, AR8216_REG_FLOOD_MASK, AR8229_FLOOD_MASK_BC_DP(0) | - AR8229_FLOOD_MASK_MC_DP(0)); + AR8229_FLOOD_MASK_MC_DP(0) | + AR8229_FLOOD_MASK_UC_DP(0)); /* setup MTU */ ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL, @@ -1008,7 +1012,7 @@ ar7240sw_init_globals(struct ar8xxx_priv *priv) /* Enable Broadcast frames transmitted to the CPU */ ar8xxx_reg_set(priv, AR8216_REG_FLOOD_MASK, - AR8236_FM_CPU_BROADCAST_EN); + AR8216_FM_CPU_BROADCAST_EN); /* setup MTU */ ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL, @@ -1074,9 +1078,14 @@ ar8236_init_globals(struct ar8xxx_priv *priv) ar8xxx_reg_set(priv, AR8216_REG_ATU_CTRL, AR8236_ATU_CTRL_RES); - /* enable cpu port to receive multicast and broadcast frames */ + /* + * Enable Broadcast/unknown multicast and unicast frames + * transmitted to the CPU port. + */ ar8xxx_reg_set(priv, AR8216_REG_FLOOD_MASK, - AR8236_FM_CPU_BROADCAST_EN | AR8236_FM_CPU_BCAST_FWD_EN); + AR8229_FLOOD_MASK_BC_DP(0) | + AR8229_FLOOD_MASK_MC_DP(0) | + AR8229_FLOOD_MASK_UC_DP(0)); /* Enable MIB counters */ ar8xxx_rmw(priv, AR8216_REG_MIB_FUNC, AR8216_MIB_FUNC | AR8236_MIB_EN, diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h index bf34fdb775..d62cf60f57 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8216.h +++ b/target/linux/generic/files/drivers/net/phy/ar8216.h @@ -56,10 +56,10 @@ #define AR8216_REG_FLOOD_MASK 0x002C #define AR8216_FM_UNI_DEST_PORTS BITS(0, 6) #define AR8216_FM_MULTI_DEST_PORTS BITS(16, 6) +#define AR8216_FM_CPU_BROADCAST_EN BIT(26) +#define AR8229_FLOOD_MASK_UC_DP(_p) BIT(_p) #define AR8229_FLOOD_MASK_MC_DP(_p) BIT(16 + (_p)) #define AR8229_FLOOD_MASK_BC_DP(_p) BIT(25 + (_p)) -#define AR8236_FM_CPU_BROADCAST_EN BIT(26) -#define AR8236_FM_CPU_BCAST_FWD_EN BIT(25) #define AR8216_REG_GLOBAL_CTRL 0x0030 #define AR8216_GCTRL_MTU BITS(0, 11) -- cgit v1.2.3