From 80dcd14abeed8cd808b92bb307964dbaeb252144 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Thu, 30 Jul 2020 13:12:43 +0800 Subject: layerscape: add LX2160ARDB (Rev2.0 silicon) board support The QorIQ LX2160A reference design board provides a comprehensive platform that enables design and evaluation of the LX2160A processor. - Enables network intelligence with the next generation Datapath (DPPA2) which provides differentiated offload and a rich set of IO, including 10GE, 25GE, 40GE, and PCIe Gen4 - Delivers unprecedented efficiency and new virtualized networks - Supports designs in 5G packet processing, network function virtualization, storage controller, white box switching, network interface cards, and mobile edge computing - Supports all three LX2 family members (16-core LX2160A; 12-core LX2120A; and 8-core LX2080A) Signed-off-by: Yangbo Lu [use AUTORELEASE, add dtb to firmware part] Signed-off-by: Adrian Schmutzler --- package/firmware/layerscape/ls-dpl/Makefile | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'package/firmware/layerscape/ls-dpl') diff --git a/package/firmware/layerscape/ls-dpl/Makefile b/package/firmware/layerscape/ls-dpl/Makefile index d056825ac5..f577c5b7e3 100644 --- a/package/firmware/layerscape/ls-dpl/Makefile +++ b/package/firmware/layerscape/ls-dpl/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ls-dpl PKG_VERSION:=LSDK-20.04 -PKG_RELEASE:=2 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/mc-utils @@ -40,6 +40,10 @@ define Build/InstallDev $(STAGING_DIR_IMAGE)/fsl_ls2088a-rdb-dpl.dtb $(CP) $(PKG_BUILD_DIR)/config/ls2088a/RDB/dpc.0x2A_0x41.dtb \ $(STAGING_DIR_IMAGE)/fsl_ls2088a-rdb-dpc.dtb + $(CP) $(PKG_BUILD_DIR)/config/lx2160a/RDB/dpl-eth.19.dtb \ + $(STAGING_DIR_IMAGE)/fsl_lx2160a-rdb-dpl.dtb + $(CP) $(PKG_BUILD_DIR)/config/lx2160a/RDB/dpc-usxgmii.dtb \ + $(STAGING_DIR_IMAGE)/fsl_lx2160a-rdb-dpc.dtb endef $(eval $(call BuildPackage,layerscape-dpl)) -- cgit v1.2.3