From 53c474abbdfef8eb3499e2d10c9ad491788b8a72 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sun, 6 May 2018 10:20:11 +0200
Subject: ath79: add new OF only target for QCA MIPS silicon

This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.

Signed-off-by: John Crispin <john@phrozen.org>
---
 target/linux/ath79/dts/ar7241_ubnt-xm.dtsi | 146 +++++++++++++++++++++++++++++
 1 file changed, 146 insertions(+)
 create mode 100644 target/linux/ath79/dts/ar7241_ubnt-xm.dtsi

(limited to 'target/linux/ath79/dts/ar7241_ubnt-xm.dtsi')

diff --git a/target/linux/ath79/dts/ar7241_ubnt-xm.dtsi b/target/linux/ath79/dts/ar7241_ubnt-xm.dtsi
new file mode 100644
index 0000000000..c9ad0413dc
--- /dev/null
+++ b/target/linux/ath79/dts/ar7241_ubnt-xm.dtsi
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar7241.dtsi"
+
+/ {
+	compatible = "ubnt,xm", "qca,ar7241";
+	model = "Ubiquiti Networks XM (rev 1.0) board";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x2000000>;
+	};
+
+/*	extosc: ref {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <40000000>;
+	};
+*/
+	keys {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		poll-interval = <20>;
+		button@0 {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led@0 {
+			label = "ubnt:red:link1";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+		};
+
+		led@1 {
+			label = "ubnt:orange:link2";
+			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+		};
+
+		led@2 {
+			label = "ubnt:green:link3";
+			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+		};
+
+		led@3 {
+			label = "ubnt:green:link4";
+			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&uart {
+	status = "okay";
+};
+
+/*&pll {
+	clocks = <&extosc>;
+};*/
+
+&spi {
+	status = "okay";
+	num-cs = <1>;
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "mx25l6405d";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x000000 0x040000>;
+		};
+
+		partition@1 {
+			label = "u-boot-env";
+			reg = <0x040000 0x010000>;
+		};
+
+		partition@2 {
+			label = "firmware";
+			reg = <0x050000 0x750000>;
+		};
+
+		partition@3 {
+			label = "board_config";
+			reg = <0x7a0000 0x010000>;
+			read-only;
+		};
+
+		partition@4 {
+			label = "cfg";
+			reg = <0x7b0000 0x040000>;
+			read-only;
+		};
+
+		art: partition@5 {
+			label = "art";
+			reg = <0x7f0000 0x010000>;
+			read-only;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+
+	ath9k@0000 {
+		reg = <0x0000 0 0 0 0>;
+		qca,no-eeprom;
+	};
+};
+
+&mdio0 {
+	status = "okay";
+
+	phy4: ethernet-phy@4 {
+		reg = <4>;
+		phy-mode = "mii";
+	};
+};
+
+&eth0 {
+	status = "okay";
+
+	mtd-mac-address = <&art 0x0>;
+
+	phy-mode = "mii";
+	phy-handle = <&phy4>;
+};
+
+&eth1 {
+	status = "okay";
+
+	mtd-mac-address = <&art 0x6>;
+};
-- 
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