From d883eaacd428e1231554687e9875248291a004cc Mon Sep 17 00:00:00 2001 From: David Bauer Date: Sun, 12 Apr 2020 13:03:31 +0200 Subject: ath79: add QCA9550 reset sequence The QCA9550 family of SoCs have a slightly different reset sequence compared to older chips. Normally the bootloader performs this sequence, however some bootloader implementation expect the operating system to clear the reset. Also get the PCIe resets from OF to support the second RC of the QCA9558. This is required for the AVM FRITZ!WLAN Repeater 1750E to work, as EVA leaves the PCIe bus in reset. Tested: AVM FRITZ!WLAN Repeater 1750E - OCEDO Koala Signed-off-by: David Bauer --- target/linux/ath79/dts/ar9344.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'target/linux/ath79/dts/ar9344.dtsi') diff --git a/target/linux/ath79/dts/ar9344.dtsi b/target/linux/ath79/dts/ar9344.dtsi index de118e9a3b..e99d962933 100644 --- a/target/linux/ath79/dts/ar9344.dtsi +++ b/target/linux/ath79/dts/ar9344.dtsi @@ -46,6 +46,9 @@ interrupt-parent = <&intc2>; interrupts = <1>; + resets = <&rst 6>, <&rst 7>; + reset-names = "hc", "phy"; + interrupt-controller; #interrupt-cells = <1>; -- cgit v1.2.3