From 27a7d071c0e0576eddeb641d1f68abe1b6205aee Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E5=BC=A0=E9=B9=8F?= Date: Wed, 14 Oct 2020 15:47:35 +0800 Subject: ath79: add support for Qxwlan E750G v8 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Qxwlan E750G v8 is based on Qualcomm QCA9344 + QCA9334. Specification: - 560/450/225 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 8/16 MB of FLASH (SPI NOR) - 2T2R 2.4G GHz (AR9344) - 2x 10/100/1000 Mbps Ethernet (one port with PoE support) - 7x LED (6 driven by GPIO) - 1x button (reset) - 1x DC jack for main power input (9-48 V) - UART (J23) and LEDs (J2) headers on PCB Flash instruction: 1.Using tftp mode with UART connection and original LEDE image - Configure PC with static IP 192.168.1.10 and tftp server. - Rename "openwrt-ar71xx-generic-xxx-squashfs-sysupgrade.bin" to "firmware.bin" and place it in tftp server directory. - Connect PC with one of LAN ports, power up the router and press key "Enter" to access U-Boot CLI. - Use the following commands to update the device to LEDE: run lfw - After that the device will reboot and boot to LEDE. - Wait until all LEDs stops flashing and use the router. 2.Using httpd mode with Web UI connection and original LEDE image - Configure PC with static IP 192.168.1.xxx(2-255) and tftp server. - Connect PC with one of LAN ports,press the reset button, power up the router and keep button pressed for around 6-7 seconds, until leds flashing. - Open your browser and enter 192.168.1.1,You will see the upgrade interface, select "openwrt-ar71xx-generic-xxx-squashfs- sysupgrade.bin" and click the upgrade button. - After that the device will reboot and boot to LEDE. - Wait until all LEDs stops flashing and use the router. Signed-off-by: 张鹏 [cut out of bigger patch, keep swconfig] Signed-off-by: Adrian Schmutzler --- .../linux/ath79/dts/ar9344_qxwlan_e750g-v8-16m.dts | 48 ++++++++++++++++++++++ .../linux/ath79/dts/ar9344_qxwlan_e750g-v8-8m.dts | 48 ++++++++++++++++++++++ 2 files changed, 96 insertions(+) create mode 100644 target/linux/ath79/dts/ar9344_qxwlan_e750g-v8-16m.dts create mode 100644 target/linux/ath79/dts/ar9344_qxwlan_e750g-v8-8m.dts (limited to 'target/linux/ath79/dts') diff --git a/target/linux/ath79/dts/ar9344_qxwlan_e750g-v8-16m.dts b/target/linux/ath79/dts/ar9344_qxwlan_e750g-v8-16m.dts new file mode 100644 index 0000000000..fb200fae35 --- /dev/null +++ b/target/linux/ath79/dts/ar9344_qxwlan_e750g-v8-16m.dts @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "ar9344_qxwlan_e750x.dtsi" + +/ { + model = "Qxwlan E750G v8 16M"; + compatible = "qxwlan,e750g-v8-16m", "qca,ar9344"; +}; + +&mdio0 { + status = "okay"; + + phy-mask = <0>; + + phy0: ethernet-phy@0 { + reg = <0>; + phy-mode = "rgmii"; + + qca,ar8327-initvals = < + 0x04 0x07600000 /* PORT0 PAD MODE CTRL */ + 0x10 0x81000080 /* POWER_ON_STRAP */ + 0x50 0xcc35cc35 /* LED_CTRL0 */ + 0x54 0xca35ca35 /* LED_CTRL1 */ + 0x58 0xc935c935 /* LED_CTRL2 */ + 0x5c 0x03ffff00 /* LED_CTRL3 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + >; + }; +}; + +ð0 { + status = "okay"; + + pll-data = <0x06000000 0x00000101 0x00001616>; + + mtd-mac-address = <&pridata 0x400>; + + phy-mode = "rgmii"; + phy-handle = <&phy0>; +}; + +&partitions { + partition@70000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x070000 0xf90000>; + }; +}; diff --git a/target/linux/ath79/dts/ar9344_qxwlan_e750g-v8-8m.dts b/target/linux/ath79/dts/ar9344_qxwlan_e750g-v8-8m.dts new file mode 100644 index 0000000000..75ef13ec13 --- /dev/null +++ b/target/linux/ath79/dts/ar9344_qxwlan_e750g-v8-8m.dts @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "ar9344_qxwlan_e750x.dtsi" + +/ { + model = "Qxwlan E750G v8 8M"; + compatible = "qxwlan,e750g-v8-8m", "qca,ar9344"; +}; + +&mdio0 { + status = "okay"; + + phy-mask = <0>; + + phy0: ethernet-phy@0 { + reg = <0>; + phy-mode = "rgmii"; + + qca,ar8327-initvals = < + 0x04 0x07600000 /* PORT0 PAD MODE CTRL */ + 0x10 0x81000080 /* POWER_ON_STRAP */ + 0x50 0xcc35cc35 /* LED_CTRL0 */ + 0x54 0xca35ca35 /* LED_CTRL1 */ + 0x58 0xc935c935 /* LED_CTRL2 */ + 0x5c 0x03ffff00 /* LED_CTRL3 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + >; + }; +}; + +ð0 { + status = "okay"; + + pll-data = <0x06000000 0x00000101 0x00001616>; + + mtd-mac-address = <&pridata 0x400>; + + phy-mode = "rgmii"; + phy-handle = <&phy0>; +}; + +&partitions { + partition@70000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x070000 0x790000>; + }; +}; -- cgit v1.2.3