From f07e572f6447465d8938679533d604e402b0f066 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Thu, 18 Feb 2021 18:04:33 +0100 Subject: bcm27xx: import latest patches from the RPi foundation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas --- ...7-Add-support-for-non-continuous-clock-mo.patch | 79 ++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 target/linux/bcm27xx/patches-5.4/950-0151-media-ov5647-Add-support-for-non-continuous-clock-mo.patch (limited to 'target/linux/bcm27xx/patches-5.4/950-0151-media-ov5647-Add-support-for-non-continuous-clock-mo.patch') diff --git a/target/linux/bcm27xx/patches-5.4/950-0151-media-ov5647-Add-support-for-non-continuous-clock-mo.patch b/target/linux/bcm27xx/patches-5.4/950-0151-media-ov5647-Add-support-for-non-continuous-clock-mo.patch new file mode 100644 index 0000000000..0fc4fa3420 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0151-media-ov5647-Add-support-for-non-continuous-clock-mo.patch @@ -0,0 +1,79 @@ +From fd539af952dfb820dc3d285a4f1311ee17bdbc79 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:56:47 +0000 +Subject: [PATCH] media: ov5647: Add support for non-continuous clock + mode + +The driver was only supporting continuous clock mode +although this was not stated anywhere. +Non-continuous clock saves a small amount of power and +on some SoCs is easier to interface with. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/ov5647.c | 17 ++++++++++++++--- + 1 file changed, 14 insertions(+), 3 deletions(-) + +--- a/drivers/media/i2c/ov5647.c ++++ b/drivers/media/i2c/ov5647.c +@@ -44,6 +44,7 @@ + #define PWDN_ACTIVE_DELAY_MS 20 + + #define MIPI_CTRL00_CLOCK_LANE_GATE BIT(5) ++#define MIPI_CTRL00_LINE_SYNC_ENABLE BIT(4) + #define MIPI_CTRL00_BUS_IDLE BIT(2) + #define MIPI_CTRL00_CLOCK_LANE_DISABLE BIT(0) + +@@ -95,6 +96,7 @@ struct ov5647 { + int power_count; + struct clk *xclk; + struct gpio_desc *pwdn; ++ unsigned int flags; + }; + + static inline struct ov5647 *to_state(struct v4l2_subdev *sd) +@@ -269,9 +271,15 @@ static int ov5647_set_virtual_channel(st + + static int ov5647_stream_on(struct v4l2_subdev *sd) + { ++ struct ov5647 *ov5647 = to_state(sd); ++ u8 val = MIPI_CTRL00_BUS_IDLE; + int ret; + +- ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, MIPI_CTRL00_BUS_IDLE); ++ if (ov5647->flags & V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK) ++ val |= MIPI_CTRL00_CLOCK_LANE_GATE | ++ MIPI_CTRL00_LINE_SYNC_ENABLE; ++ ++ ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, val); + if (ret < 0) + return ret; + +@@ -568,7 +576,7 @@ static const struct v4l2_subdev_internal + .open = ov5647_open, + }; + +-static int ov5647_parse_dt(struct device_node *np) ++static int ov5647_parse_dt(struct device_node *np, struct ov5647 *sensor) + { + struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 }; + struct device_node *ep; +@@ -581,6 +589,9 @@ static int ov5647_parse_dt(struct device + + ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &bus_cfg); + ++ if (!ret) ++ sensor->flags = bus_cfg.bus.mipi_csi2.flags; ++ + of_node_put(ep); + return ret; + } +@@ -599,7 +610,7 @@ static int ov5647_probe(struct i2c_clien + return -ENOMEM; + + if (IS_ENABLED(CONFIG_OF) && np) { +- ret = ov5647_parse_dt(np); ++ ret = ov5647_parse_dt(np, sensor); + if (ret) { + dev_err(dev, "DT parsing error: %d\n", ret); + return ret; -- cgit v1.2.3