From 08d8a3646b938a22c5dc312bb73bc1d81c00f992 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Tue, 2 Mar 2021 20:19:30 +0100 Subject: bmips: backport accepted pinctrl patches MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These patches have been accepted for linux v5.13. External interrupts not supported for now. Signed-off-by: Álvaro Fernández Rojas --- ...5-v5.13-pinctrl-bcm-add-bcm63xx-base-code.patch | 208 +++++++++++++++++++++ 1 file changed, 208 insertions(+) create mode 100644 target/linux/bmips/patches-5.10/055-v5.13-pinctrl-bcm-add-bcm63xx-base-code.patch (limited to 'target/linux/bmips/patches-5.10/055-v5.13-pinctrl-bcm-add-bcm63xx-base-code.patch') diff --git a/target/linux/bmips/patches-5.10/055-v5.13-pinctrl-bcm-add-bcm63xx-base-code.patch b/target/linux/bmips/patches-5.10/055-v5.13-pinctrl-bcm-add-bcm63xx-base-code.patch new file mode 100644 index 0000000000..eec8b98a49 --- /dev/null +++ b/target/linux/bmips/patches-5.10/055-v5.13-pinctrl-bcm-add-bcm63xx-base-code.patch @@ -0,0 +1,208 @@ +From 132f95016db0a0a0659e99b471a7d3fd0c60f961 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 24 Mar 2021 09:19:05 +0100 +Subject: [PATCH 04/22] pinctrl: bcm: add bcm63xx base code +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add a helper for registering BCM63XX pin controllers. + +Co-developed-by: Jonas Gorski +Signed-off-by: Jonas Gorski +Signed-off-by: Álvaro Fernández Rojas +Link: https://lore.kernel.org/r/20210324081923.20379-5-noltari@gmail.com +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/bcm/Kconfig | 7 ++ + drivers/pinctrl/bcm/Makefile | 1 + + drivers/pinctrl/bcm/pinctrl-bcm63xx.c | 109 ++++++++++++++++++++++++++ + drivers/pinctrl/bcm/pinctrl-bcm63xx.h | 43 ++++++++++ + 4 files changed, 160 insertions(+) + create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm63xx.c + create mode 100644 drivers/pinctrl/bcm/pinctrl-bcm63xx.h + +--- a/drivers/pinctrl/bcm/Kconfig ++++ b/drivers/pinctrl/bcm/Kconfig +@@ -29,6 +29,13 @@ config PINCTRL_BCM2835 + help + Say Y here to enable the Broadcom BCM2835 GPIO driver. + ++config PINCTRL_BCM63XX ++ bool ++ select GENERIC_PINCONF ++ select GPIO_REGMAP ++ select PINCONF ++ select PINMUX ++ + config PINCTRL_IPROC_GPIO + bool "Broadcom iProc GPIO (with PINCONF) driver" + depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST) +--- a/drivers/pinctrl/bcm/Makefile ++++ b/drivers/pinctrl/bcm/Makefile +@@ -3,6 +3,7 @@ + + obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o + obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o ++obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o + obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o + obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o + obj-$(CONFIG_PINCTRL_NS) += pinctrl-ns.o +--- /dev/null ++++ b/drivers/pinctrl/bcm/pinctrl-bcm63xx.c +@@ -0,0 +1,109 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Driver for BCM63xx GPIO unit (pinctrl + GPIO) ++ * ++ * Copyright (C) 2021 Álvaro Fernández Rojas ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM63XX_BANK_SIZE 4 ++ ++#define BCM63XX_DIROUT_REG 0x04 ++#define BCM63XX_DATA_REG 0x0c ++ ++static int bcm63xx_reg_mask_xlate(struct gpio_regmap *gpio, ++ unsigned int base, unsigned int offset, ++ unsigned int *reg, unsigned int *mask) ++{ ++ unsigned int line = offset % BCM63XX_BANK_GPIOS; ++ unsigned int stride = offset / BCM63XX_BANK_GPIOS; ++ ++ *reg = base - stride * BCM63XX_BANK_SIZE; ++ *mask = BIT(line); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm63xx_gpio_of_match[] = { ++ { .compatible = "brcm,bcm6318-gpio", }, ++ { .compatible = "brcm,bcm6328-gpio", }, ++ { .compatible = "brcm,bcm6358-gpio", }, ++ { .compatible = "brcm,bcm6362-gpio", }, ++ { .compatible = "brcm,bcm6368-gpio", }, ++ { .compatible = "brcm,bcm63268-gpio", }, ++ { /* sentinel */ } ++}; ++ ++static int bcm63xx_gpio_probe(struct device *dev, struct device_node *node, ++ const struct bcm63xx_pinctrl_soc *soc, ++ struct bcm63xx_pinctrl *pc) ++{ ++ struct gpio_regmap_config grc = {0}; ++ ++ grc.parent = dev; ++ grc.fwnode = &node->fwnode; ++ grc.ngpio = soc->ngpios; ++ grc.ngpio_per_reg = BCM63XX_BANK_GPIOS; ++ grc.regmap = pc->regs; ++ grc.reg_dat_base = BCM63XX_DATA_REG; ++ grc.reg_dir_out_base = BCM63XX_DIROUT_REG; ++ grc.reg_set_base = BCM63XX_DATA_REG; ++ grc.reg_mask_xlate = bcm63xx_reg_mask_xlate; ++ ++ return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &grc)); ++} ++ ++int bcm63xx_pinctrl_probe(struct platform_device *pdev, ++ const struct bcm63xx_pinctrl_soc *soc, ++ void *driver_data) ++{ ++ struct device *dev = &pdev->dev; ++ struct bcm63xx_pinctrl *pc; ++ struct device_node *node; ++ int err; ++ ++ pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL); ++ if (!pc) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, pc); ++ ++ pc->dev = dev; ++ pc->driver_data = driver_data; ++ ++ pc->regs = syscon_node_to_regmap(dev->parent->of_node); ++ if (IS_ERR(pc->regs)) ++ return PTR_ERR(pc->regs); ++ ++ pc->pctl_desc.name = dev_name(dev); ++ pc->pctl_desc.pins = soc->pins; ++ pc->pctl_desc.npins = soc->npins; ++ pc->pctl_desc.pctlops = soc->pctl_ops; ++ pc->pctl_desc.pmxops = soc->pmx_ops; ++ pc->pctl_desc.owner = THIS_MODULE; ++ ++ pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc); ++ if (IS_ERR(pc->pctl_dev)) ++ return PTR_ERR(pc->pctl_dev); ++ ++ for_each_child_of_node(dev->parent->of_node, node) { ++ if (of_match_node(bcm63xx_gpio_of_match, node)) { ++ err = bcm63xx_gpio_probe(dev, node, soc, pc); ++ if (err) { ++ dev_err(dev, "could not add GPIO chip\n"); ++ of_node_put(node); ++ return err; ++ } ++ } ++ } ++ ++ return 0; ++} +--- /dev/null ++++ b/drivers/pinctrl/bcm/pinctrl-bcm63xx.h +@@ -0,0 +1,43 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2021 Álvaro Fernández Rojas ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#ifndef __PINCTRL_BCM63XX_H__ ++#define __PINCTRL_BCM63XX_H__ ++ ++#include ++ ++#define BCM63XX_BANK_GPIOS 32 ++ ++struct bcm63xx_pinctrl_soc { ++ struct pinctrl_ops *pctl_ops; ++ struct pinmux_ops *pmx_ops; ++ ++ const struct pinctrl_pin_desc *pins; ++ unsigned npins; ++ ++ unsigned int ngpios; ++}; ++ ++struct bcm63xx_pinctrl { ++ struct device *dev; ++ struct regmap *regs; ++ ++ struct pinctrl_desc pctl_desc; ++ struct pinctrl_dev *pctl_dev; ++ ++ void *driver_data; ++}; ++ ++static inline unsigned int bcm63xx_bank_pin(unsigned int pin) ++{ ++ return pin % BCM63XX_BANK_GPIOS; ++} ++ ++int bcm63xx_pinctrl_probe(struct platform_device *pdev, ++ const struct bcm63xx_pinctrl_soc *soc, ++ void *driver_data); ++ ++#endif /* __PINCTRL_BCM63XX_H__ */ -- cgit v1.2.3