From c2308a7e4adbb2acc8ff149f91d1ca46801c135e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Mon, 23 Dec 2019 17:25:19 +0100 Subject: brcm2708: update to latest patches from RPi Foundation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also removes reverted patches. Signed-off-by: Álvaro Fernández Rojas --- ...-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 target/linux/brcm2708/patches-4.19/950-0025-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch (limited to 'target/linux/brcm2708/patches-4.19/950-0025-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch') diff --git a/target/linux/brcm2708/patches-4.19/950-0025-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch b/target/linux/brcm2708/patches-4.19/950-0025-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch new file mode 100644 index 0000000000..2df0d37b8d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0025-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch @@ -0,0 +1,38 @@ +From 6272fd1e55945522b156a28c1f605b69ae6e05b7 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 9 May 2016 17:28:18 -0700 +Subject: [PATCH] clk: bcm2835: Mark GPIO clocks enabled at boot as + critical. + +These divide off of PLLD_PER and are used for the ethernet and wifi +PHYs source PLLs. Neither of them is currently represented by a phy +device that would grab the clock for us. + +This keeps other drivers from killing the networking PHYs when they +disable their own clocks and trigger PLLD_PER's refcount going to 0. + +v2: Skip marking as critical if they aren't on at boot. + +Signed-off-by: Eric Anholt +--- + drivers/clk/bcm/clk-bcm2835.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -1454,6 +1454,15 @@ static struct clk_hw *bcm2835_register_c + init.flags = data->flags | CLK_IGNORE_UNUSED; + + /* ++ * Some GPIO clocks for ethernet/wifi PLLs are marked as ++ * critical (since some platforms use them), but if the ++ * firmware didn't have them turned on then they clearly ++ * aren't actually critical. ++ */ ++ if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0) ++ init.flags &= ~CLK_IS_CRITICAL; ++ ++ /* + * Pass the CLK_SET_RATE_PARENT flag if we are allowed to propagate + * rate changes on at least of the parents. + */ -- cgit v1.2.3