From e7bfda2c243e66a75ff966ba04c28b1590b5d24c Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Sat, 8 Feb 2020 20:33:30 +0100 Subject: brcm63xx: rename target to bcm63xx This change makes the names of Broadcom targets consistent by using the common notation based on SoC/CPU ID (which is used internally anyway), bcmXXXX instead of brcmXXXX. This is even used for target TITLE in make menuconfig already, only the short target name used brcm so far. Signed-off-by: Adrian Schmutzler --- .../brcm63xx/patches-4.14/534-board_hw556.patch | 123 --------------------- 1 file changed, 123 deletions(-) delete mode 100644 target/linux/brcm63xx/patches-4.14/534-board_hw556.patch (limited to 'target/linux/brcm63xx/patches-4.14/534-board_hw556.patch') diff --git a/target/linux/brcm63xx/patches-4.14/534-board_hw556.patch b/target/linux/brcm63xx/patches-4.14/534-board_hw556.patch deleted file mode 100644 index cf55255cd1..0000000000 --- a/target/linux/brcm63xx/patches-4.14/534-board_hw556.patch +++ /dev/null @@ -1,123 +0,0 @@ ---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c -+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1123,6 +1124,92 @@ static struct board_info __initdata boar - }, - }; - -+static struct board_info __initdata board_HW556_C = { -+ .name = "HW556_C", -+ .expected_cpu_id = 0x6358, -+ -+ .has_pci = 1, -+ .has_ohci0 = 1, -+ .has_ehci0 = 1, -+ .num_usbh_ports = 2, -+ -+ .has_caldata = 1, -+ .caldata = { -+ { -+ .vendor = PCI_VENDOR_ID_RALINK, -+ .caldata_offset = 0xeffe00, -+ .slot = 1, -+ .eeprom = "rt2x00.eeprom", -+ }, -+ }, -+ -+ .has_enet1 = 1, -+ .enet1 = { -+ .has_phy = 1, -+ .phy_id = 0, -+ .force_speed_100 = 1, -+ .force_duplex_full = 1, -+ }, -+}; -+static struct board_info __initdata board_HW556_A = { -+ .name = "HW556_A", -+ .expected_cpu_id = 0x6358, -+ -+ .has_pci = 1, -+ .has_ohci0 = 1, -+ .has_ehci0 = 1, -+ .num_usbh_ports = 2, -+ -+ .has_caldata = 1, -+ .caldata = { -+ { -+ .vendor = PCI_VENDOR_ID_ATHEROS, -+ .caldata_offset = 0xf7e000, -+ .slot = 1, -+ .endian_check = 1, -+ .led_pin = 2, -+ .led_active_high = 1, -+ }, -+ }, -+ -+ .has_enet1 = 1, -+ .enet1 = { -+ .has_phy = 1, -+ .phy_id = 0, -+ .force_speed_100 = 1, -+ .force_duplex_full = 1, -+ }, -+}; -+static struct board_info __initdata board_HW556_B = { -+ .name = "HW556_B", -+ .expected_cpu_id = 0x6358, -+ -+ .has_pci = 1, -+ .has_ohci0 = 1, -+ .has_ehci0 = 1, -+ .num_usbh_ports = 2, -+ -+ .has_caldata = 1, -+ .caldata = { -+ { -+ .vendor = PCI_VENDOR_ID_ATHEROS, -+ .caldata_offset = 0xefe000, -+ .slot = 1, -+ .endian_check = 1, -+ .led_pin = 2, -+ .led_active_high = 1, -+ }, -+ }, -+ -+ .has_enet1 = 1, -+ .enet1 = { -+ .has_phy = 1, -+ .phy_id = 0, -+ .force_speed_100 = 1, -+ .force_duplex_full = 1, -+ }, -+}; -+ - /* T-Home Speedport W 303V Typ B */ - static struct board_info __initdata board_spw303v = { - .name = "96358-502V", -@@ -1341,6 +1428,9 @@ static const struct board_info __initcon - &board_nb4_fxc_r1, - &board_ct6373_1, - &board_HW553, -+ &board_HW556_A, -+ &board_HW556_B, -+ &board_HW556_C, - &board_spw303v, - &board_DVAG3810BN, - #endif -@@ -1413,6 +1503,9 @@ static struct of_device_id const bcm963x - { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, - { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, }, - { .compatible = "huawei,echolife-hg553", .data = &board_HW553, }, -+ { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, }, -+ { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, }, -+ { .compatible = "huawei,echolife-hg556a-c", .data = &board_HW556_C, }, - { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, - { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, - { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, }, -- cgit v1.2.3