From 42ff43386a094cf5ab5822a1dd97ff8e05eb8471 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 19 Dec 2008 10:19:00 +0000 Subject: fix register definitions for bcm6358, thanks SGDA SVN-Revision: 13688 --- .../brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'target/linux/brcm63xx') diff --git a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h index 5e3cd9100a..4c8c3fd8b8 100644 --- a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h +++ b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h @@ -120,15 +120,15 @@ enum bcm63xx_regs_set { #define BCM_6358_PERF_BASE (0xfffe0000) #define BCM_6358_TIMER_BASE (0xfffe0040) #define BCM_6358_WDT_BASE (0xfffe005c) -#define BCM_6358_UART0_BASE (0xfffe0100) #define BCM_6358_GPIO_BASE (0xfffe0080) -#define BCM_6358_SPI_BASE (0xdeadbeef) -#define BCM_6358_UDC0_BASE (0xfffe0800) +#define BCM_6358_UART0_BASE (0xfffe0100) +#define BCM_6358_UDC0_BASE (0xfffe0400) +#define BCM_6358_SPI_BASE (0xfffe0800) +#define BCM_6358_MPI_BASE (0xfffe1000) +#define BCM_6358_PCMCIA_BASE (0xfffe1054) #define BCM_6358_OHCI0_BASE (0xfffe1400) #define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef) #define BCM_6358_USBH_PRIV_BASE (0xfffe1500) -#define BCM_6358_MPI_BASE (0xfffe1000) -#define BCM_6358_PCMCIA_BASE (0xfffe1054) #define BCM_6358_SDRAM_REGS_BASE (0xfffe2300) #define BCM_6358_DSL_BASE (0xfffe3000) #define BCM_6358_ENET0_BASE (0xfffe4000) -- cgit v1.2.3