From a9790dff532e154a93b12abaeccd7889d9159791 Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Mon, 31 Aug 2020 19:46:35 +0200 Subject: cns3xxx: drop target This target has not been updated to 5.4 yet, and the only person trying it (Koen) decided to retreat based on the following reasons: - The target is not DT-aware at all - The huge amount of effort required - The SoC itself reached EoL at Cavium for some time now - Upstream removed some important parts as it's also slowly getting EoL over there - The commercial product that used this will fade out shortly - The amount of download for this binary suggest that the target is not that popular Since nobody has picked up the work since then, and this is the last remaining 4.19-only target, finally drop it now. Signed-off-by: Adrian Schmutzler --- target/linux/cns3xxx/patches-4.19/030-pcie_clock.patch | 11 ----------- 1 file changed, 11 deletions(-) delete mode 100644 target/linux/cns3xxx/patches-4.19/030-pcie_clock.patch (limited to 'target/linux/cns3xxx/patches-4.19/030-pcie_clock.patch') diff --git a/target/linux/cns3xxx/patches-4.19/030-pcie_clock.patch b/target/linux/cns3xxx/patches-4.19/030-pcie_clock.patch deleted file mode 100644 index 66c3a99ae1..0000000000 --- a/target/linux/cns3xxx/patches-4.19/030-pcie_clock.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/pcie.c -+++ b/arch/arm/mach-cns3xxx/pcie.c -@@ -281,8 +281,6 @@ void __init cns3xxx_pcie_init_late(void) - "imprecise external abort"); - - for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { -- cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_PCIE(i)); -- cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i)); - cns3xxx_pcie_check_link(&cns3xxx_pcie[i]); - cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); - private_data = &cns3xxx_pcie[i]; -- cgit v1.2.3