From 102c8c55f217606cdbdc9a449667e034676b3e75 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Wed, 23 Oct 2019 22:25:14 +0200 Subject: ipq40xx: add support for Aruba AP-303 Hardware -------- SoC: Qualcomm IPQ4029 RAM: 512M DDR3 FLASH: - 128MB NAND (Macronix MX30LF1G18AC) - 4MB SPI-NOR (Macronix MX25R3235F) TPM: Atmel AT97SC3203 BLE: Texas Instruments CC2540T attached to ttyMSM0 ETH: Atheros AR8035 LED: WiFi (amber / green) System (red / green) BTN: Reset To connect to the serial console, you can solder to the labled pads next to the USB port or use your Aruba supplied UARt adapter. Do NOT plug a standard USB cable into the Console labled USB-port! Aruba/HPE simply put UART on the micro-USB pins. You can solder yourself an adapter cable: VCC - NC D+ - TX D- - RX GND - GND The console setting in bootloader and OS is 9600 8N1. Voltage level is 3.3V. To enable a full list of commands in the U-Boot "help" command, execute the literal "diag" command. Installation ------------ 1. Get the OpenWrt initramfs image. Rename it to ipq40xx.ari and put it into the TFTP server root directory. Configure the TFTP server to be reachable at 192.168.1.75/24. Connect the machine running the TFTP server to the ethernet port of the access point. 2. Connect to the serial console. Interrupt autobooting by pressing Enter when prompted. 3. Configure the bootargs and bootcmd for OpenWrt. $ setenv bootargs_openwrt "setenv bootargs console=ttyMSM1,9600n8" $ setenv nandboot_openwrt "run bootargs_openwrt; ubi part aos1; ubi read 0x85000000 kernel; bootm 0x85000000" $ setenv ramboot_openwrt "run bootargs_openwrt; setenv ipaddr 192.168.1.105; setenv serverip 192.168.1.75; netget; set fdt_high 0x87000000; bootm" $ setenv bootcmd "run nandboot_openwrt" $ saveenv 4. Load OpenWrt into RAM: $ run ramboot_openwrt 5. After OpenWrt booted, transfer the OpenWrt sysupgrade image to the /tmp folder on the device. 6. Flash OpenWrt: $ ubidetach -p /dev/mtd1 $ ubiformat /dev/mtd1 $ sysupgrade -n /tmp/openwrt-sysupgrade.bin To go back to the stock firmware, simply reset the bootcmd in the bootloader to the original value: $ setenv bootcmd "boot" $ saveenv Signed-off-by: David Bauer --- .../arch/arm/boot/dts/qcom-ipq4029-ap-303.dts | 419 +++++++++++++++++++++ 1 file changed, 419 insertions(+) create mode 100644 target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts (limited to 'target/linux/ipq40xx/files-4.19/arch') diff --git a/target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts b/target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts new file mode 100644 index 0000000000..24e5dc2809 --- /dev/null +++ b/target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts @@ -0,0 +1,419 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Aruba AP-303"; + compatible = "aruba,ap-303"; + + aliases { + led-boot = &led_system_green; + led-failsafe = &led_system_red; + led-running = &led_system_green; + led-upgrade = &led_system_red; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + /delete-node/ ethernet-phy@0; + /delete-node/ ethernet-phy@2; + /delete-node/ ethernet-phy@3; + /delete-node/ ethernet-phy@4; + + ethernet-phy@5 { + reg = <0x5>; + }; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + ess-switch@c000000 { + switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */ + switch_lan_bmp = <0x0>; /* lan port bitmap */ + switch_wan_bmp = <0x10>; /* wan port bitmap */ + }; + + edma@c080000 { + qcom,single-phy; + qcom,num_gmac = <1>; + phy-mode = "rgmii-id"; + status = "okay"; + }; + + i2c_0: i2c@78b7000 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "ok"; + + tpm@29 { + /* No Driver */ + compatible = "atmel,at97sc3203"; + reg = <0x29>; + read-only; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + wifi_green { + label = "ap-303:green:wifi"; + gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wifi_amber { + label = "ap-303:amber:wifi"; + gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + + led_system_red: system_red { + label = "ap-303:red:system"; + gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; + }; + + led_system_green: system_green { + label = "ap-303:green:system"; + gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "Reset button"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + /* Texas Instruments CC2540T BLE radio */ + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart2 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac0 { + qcom,phy_mdio_addr = <5>; + qcom,poll_required = <1>; + vlan_tag = <0 0x20>; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + /* + * In addition to the Pins listed below, + * the following GPIOs have "features": + * 54 - out - active low to force HW reset + * 41 - out - active low to reset TPM + * 43 - out - active low to reset BLE radio + * 19 - in - active high when DC powered + */ + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio10", "gpio11"; + function = "blsp_i2c0"; + drive-strength = <4>; + bias-disable; + }; + }; + + serial_0_pins: serial_0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial_1_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + phy-reset { + line-name = "PHY-reset"; + gpios = <42 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + /* 'aos0' in Aruba firmware */ + label = "aos0"; + reg = <0x0 0x2000000>; + read-only; + }; + + partition@2000000 { + /* 'aos1' in AVM firmware */ + label = "ubi"; + reg = <0x2000000 0x2000000>; + }; + + partition@4000000 { + label = "aruba-ubifs"; + reg = <0x4000000 0x4000000>; + read-only; + }; + }; + }; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* + * There is no partition map for the NOR flash + * in the stock firmware. + * + * All partitions here are based on offsets + * found in the U-Boot GPL code and information + * from smem. + */ + + partition@0 { + label = "sbl1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "mibib"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "qsee"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "cdt"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "ddrparams"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "ART"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "appsbl"; + reg = <0xf0000 0xf0000>; + read-only; + }; + + partition@1e0000 { + label = "mfginfo"; + reg = <0x1e0000 0x10000>; + read-only; + }; + + partition@1f0000 { + label = "apcd"; + reg = <0x1f0000 0x10000>; + read-only; + }; + + partition@200000 { + label = "osss"; + reg = <0x200000 0x180000>; + read-only; + }; + + partition@380000 { + /* This is empty */ + label = "appsblenv"; + reg = <0x380000 0x10000>; + read-only; + }; + + partition@390000 { + label = "pds"; + reg = <0x390000 0x10000>; + read-only; + }; + + partition@3a0000 { + label = "fcache"; + reg = <0x3a0000 0x10000>; + read-only; + }; + + partition@3b0000 { + /* Called osss1 in smem */ + label = "u-boot-env-bak"; + reg = <0x3b0000 0x10000>; + read-only; + }; + + partition@3f0000 { + label = "u-boot-env"; + reg = <0x3f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "Aruba-AP-303"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "Aruba-AP-303"; +}; -- cgit v1.2.3