From 5159d71983e649a89568e46d9ff02731beedd571 Mon Sep 17 00:00:00 2001 From: Biwen Li Date: Mon, 6 May 2019 12:13:14 +0800 Subject: layerscape: update patches-4.14 to LSDK 19.03 All patches of LSDK 19.03 were ported to Openwrt kernel. We still used an all-in-one patch for each IP/feature for OpenWrt. Below are the changes this patch introduced. - Updated original IP/feature patches to LSDK 19.03. - Added new IP/feature patches for eTSEC/PTP/TMU. - Squashed scattered patches into IP/feature patches. - Updated config-4.14 correspondingly. - Refreshed all patches. More info about LSDK and the kernel: - https://lsdk.github.io/components.html - https://source.codeaurora.org/external/qoriq/qoriq-components/linux Signed-off-by: Biwen Li Signed-off-by: Yangbo Lu --- .../patches-4.14/302-dts-support-layerscape.patch | 6869 ++++++++++++++++---- 1 file changed, 5465 insertions(+), 1404 deletions(-) (limited to 'target/linux/layerscape/patches-4.14/302-dts-support-layerscape.patch') diff --git a/target/linux/layerscape/patches-4.14/302-dts-support-layerscape.patch b/target/linux/layerscape/patches-4.14/302-dts-support-layerscape.patch index afe8d450d9..871a8068cb 100644 --- a/target/linux/layerscape/patches-4.14/302-dts-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.14/302-dts-support-layerscape.patch @@ -1,8 +1,12 @@ -From caecd8632a257759735ed6dd9354091cae8a5746 Mon Sep 17 00:00:00 2001 +From cc1d1d1b68d18a31aeb8a572ca6b3929b083855c Mon Sep 17 00:00:00 2001 From: Biwen Li -Date: Fri, 16 Nov 2018 17:11:32 +0800 -Subject: [PATCH] dts: support layerscape This is an integrated patch of dts - for layerscape +Date: Wed, 17 Apr 2019 18:58:33 +0800 +Subject: [PATCH] dts: support layerscape +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This is an integrated patch of dts for layerscape Signed-off-by: Abhimanyu Saini Signed-off-by: Akhil Goyal @@ -10,9 +14,7 @@ Signed-off-by: Alan Wang Signed-off-by: Alison Wang Signed-off-by: Amrita Kumari Signed-off-by: Anjaneyulu Jagarlmudi -Signed-off-by: Ashish Kumar Signed-off-by: Ashish Kumar -Signed-off-by: Bao Xiaowei Signed-off-by: Bharat Bhushan Signed-off-by: Bhaskar Upadhaya Signed-off-by: Bhupesh Sharma @@ -20,101 +22,132 @@ Signed-off-by: Biwen Li Signed-off-by: Bogdan Purcareata Signed-off-by: Calvin Johnson Signed-off-by: Camelia Groza +Signed-off-by: Catalin Neacsu Signed-off-by: Changming Huang +Signed-off-by: Chuanhua Han Signed-off-by: Constantin Tudor +Signed-off-by: David S. Miller +Signed-off-by: Florin Chiculita Signed-off-by: Florinel Iordache Signed-off-by: Guanhua Gao Signed-off-by: Honghua Yin +Signed-off-by: Horia Geantă Signed-off-by: Hou Zhiqiang Signed-off-by: Ioana Radulescu Signed-off-by: Iordache Florinel-R70177 Signed-off-by: Jagdish Gediya -Signed-off-by: Biwen Li +Signed-off-by: jiaheng.fan +Signed-off-by: Laurentiu Tudor +Signed-off-by: Li Yang +Signed-off-by: Madalin Bucur +Signed-off-by: Mathew McBride +Signed-off-by: Nipun Gupta +Signed-off-by: Pankaj Bansal +Signed-off-by: Pankaj Gupta +Signed-off-by: Peng Ma +Signed-off-by: Po Liu +Signed-off-by: Prabhakar Kushwaha +Signed-off-by: Pratiyush Mohan Srivastava +Signed-off-by: Priyanka Jain +Signed-off-by: Raghav Dogra +Signed-off-by: Rai Harninder +Signed-off-by: Ramneek Mehresh +Signed-off-by: Ran Wang +Signed-off-by: Roy Pledge +Signed-off-by: Sakar Arora +Signed-off-by: Santan Kumar +Signed-off-by: Scott Wood +Signed-off-by: Shaohui Xie +Signed-off-by: Shawn Guo +Signed-off-by: Sriram Dash +Signed-off-by: Sumit Garg +Signed-off-by: Suresh Gupta +Signed-off-by: Tang Yuantian +Signed-off-by: Tao Yang +Signed-off-by: Vabhav Sharma +Signed-off-by: Vicentiu Galanopulo +Signed-off-by: Vladimir Oltean +Signed-off-by: Wasim Khan +Signed-off-by: Xiaowei Bao +Signed-off-by: Yangbo Lu +Signed-off-by: Yinbo Zhu +Signed-off-by: Yogesh Gaur +Signed-off-by: Yuantian Tang +Signed-off-by: Yuan Yao +Signed-off-by: Zhang Ying-22455 +Signed-off-by: Zhao Chenhui +Signed-off-by: Zhao Qiang --- - arch/arm/boot/dts/ls1021a-qds.dts | 28 + - arch/arm/boot/dts/ls1021a-twr.dts | 27 + - arch/arm/boot/dts/ls1021a.dtsi | 105 +++- - arch/arm64/boot/dts/freescale/Makefile | 9 + - .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 123 +++++ - .../boot/dts/freescale/fsl-ls1012a-frdm.dts | 96 ++-- - .../boot/dts/freescale/fsl-ls1012a-frwy.dts | 177 +++++++ - .../boot/dts/freescale/fsl-ls1012a-qds.dts | 133 +++-- - .../boot/dts/freescale/fsl-ls1012a-rdb.dts | 100 ++-- - .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 179 +++++-- - .../boot/dts/freescale/fsl-ls1043-post.dtsi | 3 +- - .../dts/freescale/fsl-ls1043a-qds-sdk.dts | 71 +++ - .../boot/dts/freescale/fsl-ls1043a-qds.dts | 201 ++++++-- - .../dts/freescale/fsl-ls1043a-rdb-sdk.dts | 71 +++ - .../dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 117 +++++ - .../boot/dts/freescale/fsl-ls1043a-rdb.dts | 75 ++- - .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 196 +++++-- - .../boot/dts/freescale/fsl-ls1046-post.dtsi | 2 +- - .../dts/freescale/fsl-ls1046a-qds-sdk.dts | 79 +++ - .../boot/dts/freescale/fsl-ls1046a-qds.dts | 189 +++++-- - .../dts/freescale/fsl-ls1046a-rdb-sdk.dts | 115 +++++ - .../dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 110 ++++ - .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 44 +- - .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 182 +++++-- - .../boot/dts/freescale/fsl-ls1088a-qds.dts | 88 ++-- - .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 150 ++++-- - .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 486 ++++++++++++++++-- - .../boot/dts/freescale/fsl-ls2080a-qds.dts | 100 ++-- - .../boot/dts/freescale/fsl-ls2080a-rdb.dts | 118 +++-- - .../boot/dts/freescale/fsl-ls2080a-simu.dts | 38 +- - .../arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 42 +- - .../boot/dts/freescale/fsl-ls2081a-rdb.dts | 163 ++++++ - .../boot/dts/freescale/fsl-ls2088a-qds.dts | 158 ++++-- - .../boot/dts/freescale/fsl-ls2088a-rdb.dts | 118 +++-- - .../arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 44 +- - .../boot/dts/freescale/fsl-ls208xa-qds.dtsi | 43 +- - .../boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 60 +-- - .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 210 ++++++-- - .../dts/freescale/qoriq-bman-portals-sdk.dtsi | 55 ++ - .../dts/freescale/qoriq-bman-portals.dtsi | 8 +- - .../boot/dts/freescale/qoriq-dpaa-eth.dtsi | 97 ++++ - .../dts/freescale/qoriq-fman3-0-10g-0.dtsi | 11 +- - .../dts/freescale/qoriq-fman3-0-10g-1.dtsi | 11 +- - .../dts/freescale/qoriq-fman3-0-1g-0.dtsi | 7 +- - .../dts/freescale/qoriq-fman3-0-1g-1.dtsi | 7 +- - .../dts/freescale/qoriq-fman3-0-1g-2.dtsi | 7 +- - .../dts/freescale/qoriq-fman3-0-1g-3.dtsi | 7 +- - .../dts/freescale/qoriq-fman3-0-1g-4.dtsi | 7 +- - .../dts/freescale/qoriq-fman3-0-1g-5.dtsi | 7 +- - .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 ++ - .../boot/dts/freescale/qoriq-fman3-0.dtsi | 54 +- - .../dts/freescale/qoriq-qman-portals-sdk.dtsi | 38 ++ - .../dts/freescale/qoriq-qman-portals.dtsi | 9 +- - .../boot/dts/fsl/qoriq-fman-0-10g-0.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-0-1g-0.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-0-1g-1.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-0-1g-2.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-0-1g-3.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-0-1g-4.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-1-10g-0.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-1-1g-0.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-1-1g-1.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-1-1g-2.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-1-1g-3.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman-1-1g-4.dtsi | 4 +- - .../fsl/qoriq-fman3-0-10g-0-best-effort.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 4 +- - .../fsl/qoriq-fman3-0-10g-1-best-effort.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi | 4 +- - .../boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi | 4 +- - 83 files changed, 3742 insertions(+), 1000 deletions(-) + arch/arm/boot/dts/Makefile | 3 +- + arch/arm/boot/dts/imx25.dtsi | 4 +- + arch/arm/boot/dts/imx28.dtsi | 4 +- + arch/arm/boot/dts/imx35.dtsi | 4 +- + arch/arm/boot/dts/imx53.dtsi | 4 +- + arch/arm/boot/dts/ls1021a-iot.dts | 262 ++++ + arch/arm/boot/dts/ls1021a-qds.dts | 32 + + arch/arm/boot/dts/ls1021a-twr.dts | 27 + + arch/arm/boot/dts/ls1021a.dtsi | 111 +- + arch/arm64/boot/dts/freescale/Makefile | 16 +- + .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 126 ++ + .../boot/dts/freescale/fsl-ls1012a-frdm.dts | 97 +- + .../boot/dts/freescale/fsl-ls1012a-frwy.dts | 179 +++ + .../boot/dts/freescale/fsl-ls1012a-qds.dts | 136 +- + .../boot/dts/freescale/fsl-ls1012a-rdb.dts | 100 +- + .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 210 ++- + .../boot/dts/freescale/fsl-ls1043-post.dtsi | 3 +- + .../dts/freescale/fsl-ls1043a-qds-sdk.dts | 263 ++++ + .../boot/dts/freescale/fsl-ls1043a-qds.dts | 206 ++- + .../dts/freescale/fsl-ls1043a-rdb-sdk.dts | 262 ++++ + .../dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 140 ++ + .../boot/dts/freescale/fsl-ls1043a-rdb.dts | 76 +- + .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 382 +++-- + .../boot/dts/freescale/fsl-ls1046-post.dtsi | 2 +- + .../dts/freescale/fsl-ls1046a-qds-sdk.dts | 268 ++++ + .../boot/dts/freescale/fsl-ls1046a-qds.dts | 194 ++- + .../dts/freescale/fsl-ls1046a-rdb-sdk.dts | 307 ++++ + .../dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 133 ++ + .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 48 +- + .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 386 +++-- + .../boot/dts/freescale/fsl-ls1088a-qds.dts | 88 +- + .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 150 +- + .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 546 ++++++- + .../boot/dts/freescale/fsl-ls2080a-qds.dts | 100 +- + .../boot/dts/freescale/fsl-ls2080a-rdb.dts | 118 +- + .../boot/dts/freescale/fsl-ls2080a-simu.dts | 38 +- + .../arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 50 +- + .../boot/dts/freescale/fsl-ls2081a-rdb.dts | 163 ++ + .../boot/dts/freescale/fsl-ls2088a-qds.dts | 158 +- + .../boot/dts/freescale/fsl-ls2088a-rdb.dts | 118 +- + .../arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 52 +- + .../boot/dts/freescale/fsl-ls208xa-qds.dtsi | 43 +- + .../boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 60 +- + .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 299 ++-- + .../boot/dts/freescale/fsl-lx2160a-qds.dts | 353 +++++ + .../boot/dts/freescale/fsl-lx2160a-rdb.dts | 241 +++ + .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 1318 +++++++++++++++++ + .../boot/dts/freescale/fsl-tmu-map1.dtsi | 99 ++ + .../boot/dts/freescale/fsl-tmu-map2.dtsi | 99 ++ + .../boot/dts/freescale/fsl-tmu-map3.dtsi | 99 ++ + arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 ++++ + .../dts/freescale/qoriq-bman-portals-sdk.dtsi | 55 + + .../dts/freescale/qoriq-bman-portals.dtsi | 8 +- + .../boot/dts/freescale/qoriq-dpaa-eth.dtsi | 97 ++ + .../dts/freescale/qoriq-fman3-0-10g-0.dtsi | 11 +- + .../dts/freescale/qoriq-fman3-0-10g-1.dtsi | 11 +- + .../dts/freescale/qoriq-fman3-0-1g-0.dtsi | 7 +- + .../dts/freescale/qoriq-fman3-0-1g-1.dtsi | 7 +- + .../dts/freescale/qoriq-fman3-0-1g-2.dtsi | 7 +- + .../dts/freescale/qoriq-fman3-0-1g-3.dtsi | 7 +- + .../dts/freescale/qoriq-fman3-0-1g-4.dtsi | 7 +- + .../dts/freescale/qoriq-fman3-0-1g-5.dtsi | 7 +- + .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 + + .../boot/dts/freescale/qoriq-fman3-0.dtsi | 67 +- + .../dts/freescale/qoriq-qman-portals-sdk.dtsi | 38 + + .../dts/freescale/qoriq-qman-portals.dtsi | 9 +- + .../boot/dts/freescale/traverse-ls1043s.dts | 29 + + .../boot/dts/freescale/traverse-ls1043v.dts | 29 + + 68 files changed, 7660 insertions(+), 1211 deletions(-) + create mode 100644 arch/arm/boot/dts/ls1021a-iot.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts @@ -124,11 +157,375 @@ Signed-off-by: Biwen Li create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts + create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts + create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts + create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi + create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi + create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi + create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi + create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi create mode 100644 arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi create mode 100644 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -496,7 +496,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \ + imx7s-warp.dtb + dtb-$(CONFIG_SOC_LS1021A) += \ + ls1021a-qds.dtb \ +- ls1021a-twr.dtb ++ ls1021a-twr.dtb \ ++ ls1021a-iot.dtb + dtb-$(CONFIG_SOC_VF610) += \ + vf500-colibri-eval-v3.dtb \ + vf610-colibri-eval-v3.dtb \ +--- a/arch/arm/boot/dts/imx25.dtsi ++++ b/arch/arm/boot/dts/imx25.dtsi +@@ -122,7 +122,7 @@ + }; + + can1: can@43f88000 { +- compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; ++ compatible = "fsl,imx25-flexcan"; + reg = <0x43f88000 0x4000>; + interrupts = <43>; + clocks = <&clks 75>, <&clks 75>; +@@ -131,7 +131,7 @@ + }; + + can2: can@43f8c000 { +- compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan"; ++ compatible = "fsl,imx25-flexcan"; + reg = <0x43f8c000 0x4000>; + interrupts = <44>; + clocks = <&clks 76>, <&clks 76>; +--- a/arch/arm/boot/dts/imx28.dtsi ++++ b/arch/arm/boot/dts/imx28.dtsi +@@ -1038,7 +1038,7 @@ + }; + + can0: can@80032000 { +- compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; ++ compatible = "fsl,imx28-flexcan"; + reg = <0x80032000 0x2000>; + interrupts = <8>; + clocks = <&clks 58>, <&clks 58>; +@@ -1047,7 +1047,7 @@ + }; + + can1: can@80034000 { +- compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; ++ compatible = "fsl,imx28-flexcan"; + reg = <0x80034000 0x2000>; + interrupts = <9>; + clocks = <&clks 59>, <&clks 59>; +--- a/arch/arm/boot/dts/imx35.dtsi ++++ b/arch/arm/boot/dts/imx35.dtsi +@@ -303,7 +303,7 @@ + }; + + can1: can@53fe4000 { +- compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan"; ++ compatible = "fsl,imx35-flexcan"; + reg = <0x53fe4000 0x1000>; + clocks = <&clks 33>, <&clks 33>; + clock-names = "ipg", "per"; +@@ -312,7 +312,7 @@ + }; + + can2: can@53fe8000 { +- compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan"; ++ compatible = "fsl,imx35-flexcan"; + reg = <0x53fe8000 0x1000>; + clocks = <&clks 34>, <&clks 34>; + clock-names = "ipg", "per"; +--- a/arch/arm/boot/dts/imx53.dtsi ++++ b/arch/arm/boot/dts/imx53.dtsi +@@ -536,7 +536,7 @@ + }; + + can1: can@53fc8000 { +- compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; ++ compatible = "fsl,imx53-flexcan"; + reg = <0x53fc8000 0x4000>; + interrupts = <82>; + clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, +@@ -546,7 +546,7 @@ + }; + + can2: can@53fcc000 { +- compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; ++ compatible = "fsl,imx53-flexcan"; + reg = <0x53fcc000 0x4000>; + interrupts = <83>; + clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>, +--- /dev/null ++++ b/arch/arm/boot/dts/ls1021a-iot.dts +@@ -0,0 +1,262 @@ ++/* ++ * Copyright 2013-2016 Freescale Semiconductor, Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++/dts-v1/; ++#include "ls1021a.dtsi" ++ ++/ { ++ model = "LS1021A IOT Board"; ++ ++ sys_mclk: clock-mclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <24576000>; ++ }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ reg_3p3v: regulator@0 { ++ compatible = "regulator-fixed"; ++ reg = <0>; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ reg_2p5v: regulator@1 { ++ compatible = "regulator-fixed"; ++ reg = <1>; ++ regulator-name = "2P5V"; ++ regulator-min-microvolt = <2500000>; ++ regulator-max-microvolt = <2500000>; ++ regulator-always-on; ++ }; ++ }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,widgets = ++ "Microphone", "Microphone Jack", ++ "Headphone", "Headphone Jack", ++ "Speaker", "Speaker Ext", ++ "Line", "Line In Jack"; ++ simple-audio-card,routing = ++ "MIC_IN", "Microphone Jack", ++ "Microphone Jack", "Mic Bias", ++ "LINE_IN", "Line In Jack", ++ "Headphone Jack", "HP_OUT", ++ "Speaker Ext", "LINE_OUT"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&sai2>; ++ frame-master; ++ bitclock-master; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&codec>; ++ frame-master; ++ bitclock-master; ++ }; ++ }; ++ ++ firmware { ++ optee { ++ compatible = "linaro,optee-tz"; ++ method = "smc"; ++ }; ++ }; ++}; ++ ++&enet0 { ++ tbi-handle = <&tbi1>; ++ phy-handle = <&phy1>; ++ phy-connection-type = "sgmii"; ++ status = "okay"; ++}; ++ ++&enet1 { ++ tbi-handle = <&tbi1>; ++ phy-handle = <&phy3>; ++ phy-connection-type = "sgmii"; ++ status = "okay"; ++}; ++ ++&enet2 { ++ fixed-link = <0 1 1000 0 0>; ++ phy-connection-type = "rgmii-id"; ++ status = "okay"; ++}; ++ ++&can0{ ++ status = "disabled"; ++}; ++ ++&can1{ ++ status = "disabled"; ++}; ++ ++&can2{ ++ status = "disabled"; ++}; ++ ++&can3{ ++ status = "okay"; ++}; ++ ++&esdhc{ ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ max1239@35 { ++ compatible = "maxim,max1239"; ++ reg = <0x35>; ++ #io-channel-cells = <1>; ++ }; ++ ++ codec: sgtl5000@2a { ++ #sound-dai-cells=<0x0>; ++ compatible = "fsl,sgtl5000"; ++ reg = <0x2a>; ++ VDDA-supply = <®_3p3v>; ++ VDDIO-supply = <®_2p5v>; ++ clocks = <&sys_mclk 1>; ++ }; ++ ++ pca9555: pca9555@23 { ++ compatible = "nxp,pca9555"; ++ /*pinctrl-names = "default";*/ ++ /*interrupt-parent = <&gpio2>; ++ interrupts = <19 0x2>;*/ ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ reg = <0x23>; ++ }; ++ ++ ina220@44 { ++ compatible = "ti,ina220"; ++ reg = <0x44>; ++ shunt-resistor = <1000>; ++ }; ++ ++ ina220@45 { ++ compatible = "ti,ina220"; ++ reg = <0x45>; ++ shunt-resistor = <1000>; ++ }; ++ ++ lm75b@48 { ++ compatible = "nxp,lm75a"; ++ reg = <0x48>; ++ }; ++ ++ adt7461a@4c { ++ compatible = "adt7461a"; ++ reg = <0x4c>; ++ }; ++ ++ hdmi: sii9022a@39 { ++ compatible = "fsl,sii902x"; ++ reg = <0x39>; ++ interrupts = ; ++ }; ++}; ++ ++&i2c1 { ++ status = "disabled"; ++}; ++ ++&ifc { ++ status = "disabled"; ++}; ++ ++&lpuart0 { ++ status = "okay"; ++}; ++ ++&mdio0 { ++ phy0: ethernet-phy@0 { ++ reg = <0x0>; ++ }; ++ phy1: ethernet-phy@1 { ++ reg = <0x1>; ++ }; ++ phy2: ethernet-phy@2 { ++ reg = <0x2>; ++ }; ++ phy3: ethernet-phy@3 { ++ reg = <0x3>; ++ }; ++ tbi1: tbi-phy@1f { ++ reg = <0x1f>; ++ device_type = "tbi-phy"; ++ }; ++}; ++ ++&qspi { ++ num-cs = <2>; ++ status = "okay"; ++ ++ qflash0: s25fl128s@0 { ++ compatible = "spansion,s25fl129p1"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ }; ++}; ++ ++&sai2 { ++ status = "okay"; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; ++}; ++ ++&dcu { ++ display = <&display>; ++ status = "okay"; ++ ++ display: display@0 { ++ bits-per-pixel = <24>; ++ ++ display-timings { ++ native-mode = <&timing0>; ++ ++ timing0: mode0 { ++ clock-frequency = <25000000>; ++ hactive = <640>; ++ vactive = <480>; ++ hback-porch = <80>; ++ hfront-porch = <80>; ++ vback-porch = <16>; ++ vfront-porch = <16>; ++ hsync-len = <12>; ++ vsync-len = <2>; ++ hsync-active = <1>; ++ vsync-active = <1>; ++ }; ++ }; ++ }; ++}; --- a/arch/arm/boot/dts/ls1021a-qds.dts +++ b/arch/arm/boot/dts/ls1021a-qds.dts @@ -124,6 +124,21 @@ @@ -165,7 +562,18 @@ Signed-off-by: Biwen Li fpga: board-control@3,0 { #address-cells = <1>; #size-cells = <1>; -@@ -331,3 +351,11 @@ +@@ -316,6 +336,10 @@ + }; + }; + ++&esdhc { ++ status = "okay"; ++}; ++ + &sai2 { + status = "okay"; + }; +@@ -331,3 +355,11 @@ &uart1 { status = "okay"; }; @@ -241,7 +649,7 @@ Signed-off-by: Biwen Li big-endian; }; -@@ -334,25 +335,41 @@ +@@ -334,25 +335,44 @@ status = "disabled"; }; @@ -268,6 +676,9 @@ Signed-off-by: Biwen Li interrupts = ; clock-names = "i2c"; clocks = <&clockgen 4 1>; ++ dma-names = "tx", "rx"; ++ dmas = <&edma0 1 39>, ++ <&edma0 1 38>; + fsl-scl-gpio = <&gpio3 23 0>; status = "disabled"; }; @@ -285,7 +696,7 @@ Signed-off-by: Biwen Li status = "disabled"; }; -@@ -497,6 +514,17 @@ +@@ -497,6 +517,17 @@ status = "disabled"; }; @@ -303,7 +714,7 @@ Signed-off-by: Biwen Li wdog0: watchdog@2ad0000 { compatible = "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>; -@@ -550,6 +578,25 @@ +@@ -550,6 +581,25 @@ <&clockgen 4 1>; }; @@ -329,7 +740,7 @@ Signed-off-by: Biwen Li dcu: dcu@2ce0000 { compatible = "fsl,ls1021a-dcu"; reg = <0x0 0x2ce0000 0x0 0x10000>; -@@ -684,6 +731,10 @@ +@@ -684,6 +734,11 @@ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; @@ -337,10 +748,11 @@ Signed-off-by: Biwen Li + usb3-lpm-capable; + snps,dis-u1u2-when-u3-quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; }; pcie@3400000 { -@@ -691,7 +742,9 @@ +@@ -691,7 +746,9 @@ reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; @@ -351,7 +763,15 @@ Signed-off-by: Biwen Li fsl,pcie-scfg = <&scfg 0>; #address-cells = <3>; #size-cells = <2>; -@@ -714,7 +767,9 @@ +@@ -707,6 +764,7 @@ + <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; + }; + + pcie@3500000 { +@@ -714,7 +772,9 @@ reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */ 0x48 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; @@ -362,10 +782,12 @@ Signed-off-by: Biwen Li fsl,pcie-scfg = <&scfg 1>; #address-cells = <3>; #size-cells = <2>; -@@ -731,5 +786,45 @@ +@@ -730,6 +790,47 @@ + <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; - }; ++ status = "disabled"; ++ }; + + can0: can@2a70000 { + compatible = "fsl,ls1021ar2-flexcan"; @@ -405,12 +827,12 @@ Signed-off-by: Biwen Li + clock-names = "ipg", "per"; + big-endian; + status = "disabled"; -+ }; + }; }; }; --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile -@@ -1,15 +1,24 @@ +@@ -1,19 +1,33 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb @@ -435,9 +857,19 @@ Signed-off-by: Biwen Li dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb +- ++dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb ++dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb ++ ++dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043v.dtb ++dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043s.dtb ++ + always := $(dtb-y) + subdir-y := $(dts-dirs) + clean-files := *.dtb --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts -@@ -0,0 +1,123 @@ +@@ -0,0 +1,126 @@ +/* + * Device Tree file for NXP LS1012A 2G5RDB Board. + * @@ -529,35 +961,38 @@ Signed-off-by: Biwen Li + #address-cells = <1>; + #size-cells = <0>; + -+ ethernet@0 { ++ pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ -+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */ -+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii-2500"; -+ fsl,pfe-phy-if-flags = <0x0>; -+ -+ mdio@0 { -+ reg = <0x1>; /* enabled/disabled */ -+ }; ++ phy-handle = <&sgmii_phy1>; + }; + -+ ethernet@1 { ++ pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ -+ fsl,gemac-bus-id = < 0x0>; /* BUS_ID */ -+ fsl,gemac-phy-id = < 0x2>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii-2500"; -+ fsl,pfe-phy-if-flags = <0x0>; ++ phy-handle = <&sgmii_phy2>; ++ }; ++ ++ mdio@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; + -+ mdio@0 { -+ reg = <0x0>; /* enabled/disabled */ ++ sgmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ reg = <0x1>; ++ }; ++ ++ sgmii_phy2: ethernet-phy@2 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ reg = <0x2>; + }; + }; +}; @@ -622,7 +1057,7 @@ Signed-off-by: Biwen Li sys_mclk: clock-mclk { compatible = "fixed-clock"; #clock-cells = <0>; -@@ -110,6 +79,44 @@ +@@ -110,6 +79,45 @@ }; }; @@ -631,35 +1066,36 @@ Signed-off-by: Biwen Li + #address-cells = <1>; + #size-cells = <0>; + -+ ethernet@0 { ++ pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ -+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */ -+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; -+ fsl,pfe-phy-if-flags = <0x0>; -+ -+ mdio@0 { -+ reg = <0x1>; /* enabled/disabled */ -+ }; ++ phy-handle = <&sgmii_phy1>; + }; + -+ ethernet@1 { ++ pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ -+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */ -+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; -+ fsl,pfe-phy-if-flags = <0x0>; ++ phy-handle = <&sgmii_phy2>; ++ }; + -+ mdio@0 { -+ reg = <0x0>; /* enabled/disabled */ ++ mdio@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sgmii_phy1: ethernet-phy@2 { ++ reg = <0x2>; ++ }; ++ ++ sgmii_phy2: ethernet-phy@1 { ++ reg = <0x1>; + }; + }; +}; @@ -667,7 +1103,7 @@ Signed-off-by: Biwen Li &sai2 { status = "okay"; }; -@@ -117,3 +124,18 @@ +@@ -117,3 +125,18 @@ &sata { status = "okay"; }; @@ -688,7 +1124,7 @@ Signed-off-by: Biwen Li +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts -@@ -0,0 +1,177 @@ +@@ -0,0 +1,179 @@ +/* + * Device Tree file for NXP LS1012A FRWY Board. + * @@ -830,35 +1266,37 @@ Signed-off-by: Biwen Li + #address-cells = <1>; + #size-cells = <0>; + -+ ethernet@0 { ++ pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,gemac-bus-id = <0x0>; /* BUS_ID */ -+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; -+ fsl,pfe-phy-if-flags = <0x0>; -+ -+ mdio@0 { -+ reg = <0x1>; /* enabled/disabled */ -+ }; ++ phy-handle = <&sgmii_phy1>; + }; + -+ ethernet@1 { ++ pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ -+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */ -+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; -+ fsl,pfe-phy-if-flags = <0x0>; ++ phy-handle = <&sgmii_phy2>; ++ }; ++ ++ mdio@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sgmii_phy1: ethernet-phy@2 { ++ reg = <0x2>; ++ }; + -+ mdio@0 { -+ reg = <0x0>; /* enabled/disabled */ ++ sgmii_phy2: ethernet-phy@1 { ++ reg = <0x1>; + }; + }; +}; @@ -971,7 +1409,7 @@ Signed-off-by: Biwen Li &duart0 { status = "okay"; }; -@@ -131,6 +137,44 @@ +@@ -131,6 +137,47 @@ }; }; @@ -980,35 +1418,38 @@ Signed-off-by: Biwen Li + #address-cells = <1>; + #size-cells = <0>; + -+ ethernet@0 { ++ pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ -+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */ -+ fsl,gemac-phy-id = <0x1>; /* PHY_ID */ + fsl,mdio-mux-val = <0x2>; + phy-mode = "sgmii-2500"; -+ fsl,pfe-phy-if-flags = <0x0>; -+ -+ mdio@0 { -+ reg = <0x1>; /* enabled/disabled */ -+ }; ++ phy-handle = <&sgmii_phy1>; + }; + -+ ethernet@1 { ++ pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ -+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */ -+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */ + fsl,mdio-mux-val = <0x3>; + phy-mode = "sgmii-2500"; -+ fsl,pfe-phy-if-flags = <0x0>; ++ phy-handle = <&sgmii_phy2>; ++ }; ++ ++ mdio@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; + -+ mdio@0 { -+ reg = <0x0>; /* enabled/disabled */ ++ sgmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ reg = <0x1>; ++ }; ++ ++ sgmii_phy2: ethernet-phy@2 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ reg = <0x2>; + }; + }; +}; @@ -1016,7 +1457,7 @@ Signed-off-by: Biwen Li &sai2 { status = "okay"; }; -@@ -138,3 +182,18 @@ +@@ -138,3 +185,18 @@ &sata { status = "okay"; }; @@ -1110,35 +1551,35 @@ Signed-off-by: Biwen Li + #address-cells = <1>; + #size-cells = <0>; + -+ ethernet@0 { ++ pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ -+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */ -+ fsl,gemac-phy-id = <0x2>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; -+ fsl,pfe-phy-if-flags = <0x0>; -+ -+ mdio@0 { -+ reg = <0x1>; /* enabled/disabled */ -+ }; ++ phy-handle = <&sgmii_phy>; + }; + -+ ethernet@1 { ++ pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ -+ fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */ -+ fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "rgmii-txid"; -+ fsl,pfe-phy-if-flags = <0x0>; ++ phy-handle = <&rgmii_phy>; ++ }; ++ mdio@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sgmii_phy: ethernet-phy@2 { ++ reg = <0x2>; ++ }; + -+ mdio@0 { -+ reg = <0x0>; /* enabled/disabled */ ++ rgmii_phy: ethernet-phy@1 { ++ reg = <0x1>; + }; + }; +}; @@ -1206,7 +1647,14 @@ Signed-off-by: Biwen Li */ #include -@@ -70,6 +34,24 @@ +@@ -64,12 +28,30 @@ + #address-cells = <1>; + #size-cells = <0>; + +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; reg = <0x0>; clocks = <&clockgen 1 0>; #cooling-cells = <2>; @@ -1240,10 +1688,40 @@ Signed-off-by: Biwen Li big-endian; }; -@@ -335,13 +317,23 @@ - }; +@@ -304,44 +286,25 @@ + #thermal-sensor-cells = <1>; }; +- thermal-zones { +- cpu_thermal: cpu-thermal { +- polling-delay-passive = <1000>; +- polling-delay = <5000>; +- thermal-sensors = <&tmu 0>; +- +- trips { +- cpu_alert: cpu-alert { +- temperature = <85000>; +- hysteresis = <2000>; +- type = "passive"; +- }; +- +- cpu_crit: cpu-crit { +- temperature = <95000>; +- hysteresis = <2000>; +- type = "critical"; +- }; +- }; ++ #include "fsl-tmu.dtsi" + +- cooling-maps { +- map0 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- }; +- }; + ftm0: ftm0@29d0000 { + compatible = "fsl,ls1012a-ftm-alarm"; + reg = <0x0 0x29d0000 0x0 0x10000>, @@ -1251,8 +1729,8 @@ Signed-off-by: Biwen Li + reg-names = "ftm", "pmctrl"; + interrupts = <0 86 0x4>; + big-endian; -+ }; -+ + }; + i2c0: i2c@2180000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls1012a-vf610-i2c"; @@ -1262,11 +1740,11 @@ Signed-off-by: Biwen Li interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen 4 3>; -+ fsl-scl-gpio = <&gpio0 13 0>; ++ scl-gpios = <&gpio0 13 0>; status = "disabled"; }; -@@ -351,7 +343,20 @@ +@@ -351,7 +314,20 @@ #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; @@ -1287,7 +1765,7 @@ Signed-off-by: Biwen Li status = "disabled"; }; -@@ -400,6 +405,20 @@ +@@ -400,6 +376,20 @@ big-endian; }; @@ -1308,15 +1786,16 @@ Signed-off-by: Biwen Li sai1: sai@2b50000 { #sound-dai-cells = <0>; compatible = "fsl,vf610-sai"; -@@ -451,6 +470,7 @@ +@@ -451,6 +441,8 @@ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; }; sata: sata@3200000 { -@@ -471,5 +491,84 @@ +@@ -471,5 +463,85 @@ dr_mode = "host"; phy_type = "ulpi"; }; @@ -1387,11 +1866,6 @@ Signed-off-by: Biwen Li + clock-names = "pfe"; + + status = "okay"; -+ pfe_mac0: ethernet@0 { -+ }; -+ -+ pfe_mac1: ethernet@1 { -+ }; + }; + + firmware { @@ -1399,7 +1873,13 @@ Signed-off-by: Biwen Li + compatible = "linaro,optee-tz"; + method = "smc"; + }; - }; ++ }; ++}; ++ ++&thermal_zones { ++ thermal-zone0 { ++ status = "okay"; + }; }; --- a/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi @@ -1416,7 +1896,7 @@ Signed-off-by: Biwen Li &soc { --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts -@@ -0,0 +1,71 @@ +@@ -0,0 +1,263 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * @@ -1481,12 +1961,204 @@ Signed-off-by: Biwen Li +}; + +&soc { ++/delete-property/ dma-coherent; ++ +#include "qoriq-dpaa-eth.dtsi" +#include "qoriq-fman3-0-6oh.dtsi" ++ ++pcie@3400000 { ++ /delete-property/ iommu-map; ++ dma-coherent; ++}; ++ ++pcie@3500000 { ++ /delete-property/ iommu-map; ++ dma-coherent; ++}; ++ ++pcie@3600000 { ++ /delete-property/ iommu-map; ++ dma-coherent; ++}; ++ ++/delete-node/ iommu@9000000; +}; + +&fman0 { + compatible = "fsl,fman", "simple-bus"; ++ dma-coherent; ++}; ++ ++&clockgen { ++ dma-coherent; ++}; ++ ++&scfg { ++ dma-coherent; ++}; ++ ++&crypto { ++ dma-coherent; ++}; ++ ++&dcfg { ++ dma-coherent; ++}; ++ ++&ifc { ++ dma-coherent; ++}; ++ ++&qspi { ++ dma-coherent; ++}; ++ ++&esdhc { ++ dma-coherent; ++}; ++ ++&ddr { ++ dma-coherent; ++}; ++ ++&tmu { ++ dma-coherent; ++}; ++ ++&qman { ++ dma-coherent; ++}; ++ ++&bman { ++ dma-coherent; ++}; ++ ++&bportals { ++ dma-coherent; ++}; ++ ++&qportals { ++ dma-coherent; ++}; ++ ++&dspi0 { ++ dma-coherent; ++}; ++ ++&dspi1 { ++ dma-coherent; ++}; ++ ++&i2c0 { ++ dma-coherent; ++}; ++ ++&i2c1 { ++ dma-coherent; ++}; ++ ++&i2c2 { ++ dma-coherent; ++}; ++ ++&i2c3 { ++ dma-coherent; ++}; ++ ++&duart0 { ++ dma-coherent; ++}; ++ ++&duart1 { ++ dma-coherent; ++}; ++ ++&duart2 { ++ dma-coherent; ++}; ++ ++&duart3 { ++ dma-coherent; ++}; ++ ++&gpio1 { ++ dma-coherent; ++}; ++ ++&gpio2 { ++ dma-coherent; ++}; ++ ++&gpio3 { ++ dma-coherent; ++}; ++ ++&gpio4 { ++ dma-coherent; ++}; ++ ++&uqe { ++ dma-coherent; ++}; ++ ++&lpuart0 { ++ dma-coherent; ++}; ++ ++&lpuart1 { ++ dma-coherent; ++}; ++ ++&lpuart2 { ++ dma-coherent; ++}; ++ ++&lpuart3 { ++ dma-coherent; ++}; ++ ++&lpuart4 { ++ dma-coherent; ++}; ++ ++&lpuart5 { ++ dma-coherent; ++}; ++ ++&ftm0 { ++ dma-coherent; ++}; ++ ++&wdog0 { ++ dma-coherent; ++}; ++ ++&edma0 { ++ dma-coherent; ++}; ++ ++&qdma { ++ dma-coherent; ++}; ++ ++&msi1 { ++ dma-coherent; ++}; ++ ++&msi2 { ++ dma-coherent; ++}; ++ ++&msi3 { ++ dma-coherent; ++}; ++ ++&ptp_timer0 { ++ dma-coherent; ++}; ++ ++&fsldpaa { ++ dma-coherent; +}; --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts @@ -1562,7 +2234,20 @@ Signed-off-by: Biwen Li }; chosen { -@@ -179,7 +158,153 @@ +@@ -97,8 +76,11 @@ + }; + + fpga: board-control@2,0 { +- compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis"; ++ compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-bus"; + reg = <0x2 0x0 0x0000100>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0 2 0 0x100>; + }; + }; + +@@ -179,7 +161,153 @@ #size-cells = <1>; spi-max-frequency = <20000000>; reg = <0>; @@ -1718,7 +2403,7 @@ Signed-off-by: Biwen Li +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts -@@ -0,0 +1,71 @@ +@@ -0,0 +1,262 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * @@ -1783,16 +2468,207 @@ Signed-off-by: Biwen Li +}; + +&soc { ++/delete-property/ dma-coherent; ++ +#include "qoriq-dpaa-eth.dtsi" +#include "qoriq-fman3-0-6oh.dtsi" ++ ++pcie@3400000 { ++ /delete-property/ iommu-map; ++ dma-coherent; ++}; ++ ++pcie@3500000 { ++ /delete-property/ iommu-map; ++ dma-coherent; ++}; ++ ++pcie@3600000 { ++ /delete-property/ iommu-map; ++ dma-coherent; ++}; ++ ++/delete-node/ iommu@9000000; +}; + +&fman0 { + compatible = "fsl,fman", "simple-bus"; +}; ++ ++&clockgen { ++ dma-coherent; ++}; ++ ++&scfg { ++ dma-coherent; ++}; ++ ++&crypto { ++ dma-coherent; ++}; ++ ++&dcfg { ++ dma-coherent; ++}; ++ ++&ifc { ++ dma-coherent; ++}; ++ ++&qspi { ++ dma-coherent; ++}; ++ ++&esdhc { ++ dma-coherent; ++}; ++ ++&ddr { ++ dma-coherent; ++}; ++ ++&tmu { ++ dma-coherent; ++}; ++ ++&qman { ++ dma-coherent; ++}; ++ ++&bman { ++ dma-coherent; ++}; ++ ++&bportals { ++ dma-coherent; ++}; ++ ++&qportals { ++ dma-coherent; ++}; ++ ++&dspi0 { ++ dma-coherent; ++}; ++ ++&dspi1 { ++ dma-coherent; ++}; ++ ++&i2c0 { ++ dma-coherent; ++}; ++ ++&i2c1 { ++ dma-coherent; ++}; ++ ++&i2c2 { ++ dma-coherent; ++}; ++ ++&i2c3 { ++ dma-coherent; ++}; ++ ++&duart0 { ++ dma-coherent; ++}; ++ ++&duart1 { ++ dma-coherent; ++}; ++ ++&duart2 { ++ dma-coherent; ++}; ++ ++&duart3 { ++ dma-coherent; ++}; ++ ++&gpio1 { ++ dma-coherent; ++}; ++ ++&gpio2 { ++ dma-coherent; ++}; ++ ++&gpio3 { ++ dma-coherent; ++}; ++ ++&gpio4 { ++ dma-coherent; ++}; ++ ++&lpuart0 { ++ dma-coherent; ++}; ++ ++&lpuart1 { ++ dma-coherent; ++}; ++ ++&lpuart2 { ++ dma-coherent; ++}; ++ ++&lpuart3 { ++ dma-coherent; ++}; ++ ++&lpuart4 { ++ dma-coherent; ++}; ++ ++&lpuart5 { ++ dma-coherent; ++}; ++ ++&ftm0 { ++ dma-coherent; ++}; ++ ++&wdog0 { ++ dma-coherent; ++}; ++ ++&edma0 { ++ dma-coherent; ++}; ++ ++&qdma { ++ dma-coherent; ++}; ++ ++&msi1 { ++ dma-coherent; ++}; ++ ++&msi2 { ++ dma-coherent; ++}; ++ ++&msi3 { ++ dma-coherent; ++}; ++ ++&fman0 { ++ dma-coherent; ++}; ++ ++&ptp_timer0 { ++ dma-coherent; ++}; ++ ++&fsldpaa { ++ dma-coherent; ++}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts -@@ -0,0 +1,117 @@ +@@ -0,0 +1,140 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * @@ -1811,6 +2687,7 @@ Signed-off-by: Biwen Li + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; ++ dma-coherent; + }; + + bp8: buffer-pool@8 { @@ -1818,6 +2695,7 @@ Signed-off-by: Biwen Li + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; ++ dma-coherent; + }; + + bp9: buffer-pool@9 { @@ -1825,10 +2703,12 @@ Signed-off-by: Biwen Li + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; ++ dma-coherent; + }; + + fsl,dpaa { + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus"; ++ dma-coherent; + + ethernet@0 { + compatible = "fsl,dpa-ethernet-init"; @@ -1887,6 +2767,20 @@ Signed-off-by: Biwen Li + fsl,fman-oh-port = <&fman0_oh2>; + }; + }; ++ ++ pcie@3400000 { ++ /delete-property/ iommu-map; ++ }; ++ ++ pcie@3500000 { ++ /delete-property/ iommu-map; ++ }; ++ ++ pcie@3600000 { ++ /delete-property/ iommu-map; ++ }; ++ ++ /delete-node/ iommu@9000000; +}; +/ { + reserved-memory { @@ -1894,11 +2788,16 @@ Signed-off-by: Biwen Li + #size-cells = <2>; + ranges; + ++ /* For legacy usdpaa based use-cases, update the size and ++ alignment parameters. e.g. to allocate 256 MB memory: ++ size = <0 0x10000000>; ++ alignment = <0 0x10000000>; ++ */ + usdpaa_mem: usdpaa_mem { + compatible = "fsl,usdpaa-mem"; + alloc-ranges = <0 0 0x10000 0>; -+ size = <0 0x10000000>; -+ alignment = <0 0x10000000>; ++ size = <0 0x1000>; ++ alignment = <0 0x1000>; + }; + }; +}; @@ -1961,7 +2860,15 @@ Signed-off-by: Biwen Li */ /dts-v1/; -@@ -86,6 +49,10 @@ +@@ -51,7 +14,6 @@ + model = "LS1043A RDB Board"; + + aliases { +- crypto = &crypto; + serial0 = &duart0; + serial1 = &duart1; + serial2 = &duart2; +@@ -86,6 +48,10 @@ compatible = "pericom,pt7c4338"; reg = <0x68>; }; @@ -1972,7 +2879,7 @@ Signed-off-by: Biwen Li }; &ifc { -@@ -130,6 +97,38 @@ +@@ -130,6 +96,38 @@ reg = <0>; spi-max-frequency = <1000000>; /* input clock */ }; @@ -2062,7 +2969,23 @@ Signed-off-by: Biwen Li */ #include -@@ -81,6 +44,7 @@ +@@ -54,6 +17,7 @@ + #size-cells = <2>; + + aliases { ++ crypto = &crypto; + fman0 = &fman0; + ethernet0 = &enet0; + ethernet1 = &enet1; +@@ -74,13 +38,14 @@ + * + * Currently supported enable-method is psci v0.2 + */ +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; clocks = <&clockgen 1 0>; next-level-cache = <&l2>; #cooling-cells = <2>; @@ -2070,7 +2993,7 @@ Signed-off-by: Biwen Li }; cpu1: cpu@1 { -@@ -89,6 +53,7 @@ +@@ -89,6 +54,7 @@ reg = <0x1>; clocks = <&clockgen 1 0>; next-level-cache = <&l2>; @@ -2078,7 +3001,7 @@ Signed-off-by: Biwen Li }; cpu2: cpu@2 { -@@ -97,6 +62,7 @@ +@@ -97,6 +63,7 @@ reg = <0x2>; clocks = <&clockgen 1 0>; next-level-cache = <&l2>; @@ -2086,7 +3009,7 @@ Signed-off-by: Biwen Li }; cpu3: cpu@3 { -@@ -105,6 +71,7 @@ +@@ -105,6 +72,7 @@ reg = <0x3>; clocks = <&clockgen 1 0>; next-level-cache = <&l2>; @@ -2094,7 +3017,7 @@ Signed-off-by: Biwen Li }; l2: l2-cache { -@@ -112,6 +79,23 @@ +@@ -112,6 +80,23 @@ }; }; @@ -2118,7 +3041,66 @@ Signed-off-by: Biwen Li memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0 0x80000000>; -@@ -255,7 +239,7 @@ +@@ -196,6 +181,8 @@ + #address-cells = <2>; + #size-cells = <2>; + ranges; ++ dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; ++ dma-coherent; + + clockgen: clocking@1ee1000 { + compatible = "fsl,ls1043a-clockgen"; +@@ -204,6 +191,49 @@ + clocks = <&sysclk>; + }; + ++ smmu: iommu@9000000 { ++ compatible = "arm,mmu-500"; ++ reg = <0 0x9000000 0 0x400000>; ++ dma-coherent; ++ stream-match-mask = <0x7f00>; ++ #global-interrupts = <2>; ++ #iommu-cells = <1>; ++ interrupts = , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; ++ }; ++ + scfg: scfg@1570000 { + compatible = "fsl,ls1043a-scfg", "syscon"; + reg = <0x0 0x1570000 0x0 0x10000>; +@@ -255,7 +285,7 @@ dcfg: dcfg@1ee0000 { compatible = "fsl,ls1043a-dcfg", "syscon"; @@ -2127,7 +3109,45 @@ Signed-off-by: Biwen Li big-endian; }; -@@ -422,7 +406,7 @@ +@@ -342,36 +372,7 @@ + #thermal-sensor-cells = <1>; + }; + +- thermal-zones { +- cpu_thermal: cpu-thermal { +- polling-delay-passive = <1000>; +- polling-delay = <5000>; +- +- thermal-sensors = <&tmu 3>; +- +- trips { +- cpu_alert: cpu-alert { +- temperature = <85000>; +- hysteresis = <2000>; +- type = "passive"; +- }; +- cpu_crit: cpu-crit { +- temperature = <95000>; +- hysteresis = <2000>; +- type = "critical"; +- }; +- }; +- +- cooling-maps { +- map0 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- }; +- }; +- }; ++ #include "fsl-tmu.dtsi" + + qman: qman@1880000 { + compatible = "fsl,qman"; +@@ -422,7 +423,7 @@ }; i2c0: i2c@2180000 { @@ -2136,15 +3156,15 @@ Signed-off-by: Biwen Li #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; -@@ -432,6 +416,7 @@ +@@ -432,6 +433,7 @@ dmas = <&edma0 1 39>, <&edma0 1 38>; dma-names = "tx", "rx"; -+ fsl-scl-gpio = <&gpio4 12 0>; ++ scl-gpios = <&gpio4 12 0>; status = "disabled"; }; -@@ -536,6 +521,72 @@ +@@ -536,6 +538,72 @@ #interrupt-cells = <2>; }; @@ -2217,7 +3237,7 @@ Signed-off-by: Biwen Li lpuart0: serial@2950000 { compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2950000 0x0 0x1000>; -@@ -590,6 +641,16 @@ +@@ -590,6 +658,16 @@ status = "disabled"; }; @@ -2234,40 +3254,101 @@ Signed-off-by: Biwen Li wdog0: wdog@2ad0000 { compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>; -@@ -622,6 +683,9 @@ - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; -+ usb3-lpm-capable; -+ snps,dis-u1u2-when-u3-quirk; -+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - usb1: usb3@3000000 { -@@ -631,6 +695,9 @@ - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; -+ usb3-lpm-capable; -+ snps,dis-u1u2-when-u3-quirk; -+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - usb2: usb3@3100000 { -@@ -640,6 +707,9 @@ - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; -+ usb3-lpm-capable; -+ snps,dis-u1u2-when-u3-quirk; -+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - sata: sata@3200000 { -@@ -652,6 +722,27 @@ - dma-coherent; +@@ -615,41 +693,81 @@ + <&clockgen 4 0>; }; +- usb0: usb3@2f00000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0x2f00000 0x0 0x10000>; +- interrupts = <0 60 0x4>; +- dr_mode = "host"; +- snps,quirk-frame-length-adjustment = <0x20>; +- snps,dis_rxdet_inp3_quirk; +- }; +- +- usb1: usb3@3000000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0x3000000 0x0 0x10000>; +- interrupts = <0 61 0x4>; +- dr_mode = "host"; +- snps,quirk-frame-length-adjustment = <0x20>; +- snps,dis_rxdet_inp3_quirk; +- }; +- +- usb2: usb3@3100000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0x3100000 0x0 0x10000>; +- interrupts = <0 63 0x4>; +- dr_mode = "host"; +- snps,quirk-frame-length-adjustment = <0x20>; +- snps,dis_rxdet_inp3_quirk; +- }; +- +- sata: sata@3200000 { +- compatible = "fsl,ls1043a-ahci"; +- reg = <0x0 0x3200000 0x0 0x10000>, +- <0x0 0x20140520 0x0 0x4>; +- reg-names = "ahci", "sata-ecc"; +- interrupts = <0 69 0x4>; +- clocks = <&clockgen 4 0>; +- dma-coherent; ++ aux_bus: aux_bus { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ compatible = "simple-bus"; ++ ranges; ++ dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>; ++ ++ usb0: usb3@2f00000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x2f00000 0x0 0x10000>; ++ interrupts = <0 60 0x4>; ++ dr_mode = "host"; ++ snps,quirk-frame-length-adjustment = <0x20>; ++ snps,dis_rxdet_inp3_quirk; ++ usb3-lpm-capable; ++ snps,dis-u1u2-when-u3-quirk; ++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; ++ }; ++ ++ usb1: usb3@3000000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x3000000 0x0 0x10000>; ++ interrupts = <0 61 0x4>; ++ dr_mode = "host"; ++ snps,quirk-frame-length-adjustment = <0x20>; ++ snps,dis_rxdet_inp3_quirk; ++ usb3-lpm-capable; ++ snps,dis-u1u2-when-u3-quirk; ++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; ++ }; ++ ++ usb2: usb3@3100000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x3100000 0x0 0x10000>; ++ interrupts = <0 63 0x4>; ++ dr_mode = "host"; ++ snps,quirk-frame-length-adjustment = <0x20>; ++ snps,dis_rxdet_inp3_quirk; ++ usb3-lpm-capable; ++ snps,dis-u1u2-when-u3-quirk; ++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; ++ }; ++ ++ sata: sata@3200000 { ++ compatible = "fsl,ls1043a-ahci"; ++ reg = <0x0 0x3200000 0x0 0x10000>, ++ <0x0 0x20140520 0x0 0x4>; ++ reg-names = "ahci", "sata-ecc"; ++ interrupts = <0 69 0x4>; ++ clocks = <&clockgen 4 0>; ++ }; ++ }; ++ + qdma: qdma@8380000 { + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma"; + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */ @@ -2287,12 +3368,10 @@ Signed-off-by: Biwen Li + status-sizes = <64>; + queue-sizes = <64 64>; + big-endian; -+ }; -+ + }; + msi1: msi-controller1@1571000 { - compatible = "fsl,ls1043a-msi"; - reg = <0x0 0x1571000 0x0 0x8>; -@@ -678,9 +769,9 @@ +@@ -678,13 +796,13 @@ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; @@ -2305,7 +3384,20 @@ Signed-off-by: Biwen Li #address-cells = <3>; #size-cells = <2>; device_type = "pci"; -@@ -703,9 +794,9 @@ +- dma-coherent; ++ iommu-map = <0 &smmu 0 1>; + num-lanes = <4>; + bus-range = <0x0 0xff>; + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ +@@ -696,6 +814,7 @@ + <0000 0 0 2 &gic 0 111 0x4>, + <0000 0 0 3 &gic 0 112 0x4>, + <0000 0 0 4 &gic 0 113 0x4>; ++ status = "disabled"; + }; + + pcie@3500000 { +@@ -703,13 +822,13 @@ reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ 0x48 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; @@ -2318,7 +3410,20 @@ Signed-off-by: Biwen Li #address-cells = <3>; #size-cells = <2>; device_type = "pci"; -@@ -728,9 +819,9 @@ +- dma-coherent; ++ iommu-map = <0 &smmu 0 1>; + num-lanes = <2>; + bus-range = <0x0 0xff>; + ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ +@@ -721,6 +840,7 @@ + <0000 0 0 2 &gic 0 121 0x4>, + <0000 0 0 3 &gic 0 122 0x4>, + <0000 0 0 4 &gic 0 123 0x4>; ++ status = "disabled"; + }; + + pcie@3600000 { +@@ -728,13 +848,13 @@ reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ 0x50 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; @@ -2331,20 +3436,56 @@ Signed-off-by: Biwen Li #address-cells = <3>; #size-cells = <2>; device_type = "pci"; -@@ -749,6 +840,13 @@ - }; - }; - +- dma-coherent; ++ iommu-map = <0 &smmu 0 1>; + num-lanes = <2>; + bus-range = <0x0 0xff>; + ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */ +@@ -746,6 +866,14 @@ + <0000 0 0 2 &gic 0 155 0x4>, + <0000 0 0 3 &gic 0 156 0x4>, + <0000 0 0 4 &gic 0 157 0x4>; ++ status = "disabled"; ++ }; ++ }; ++ + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; -+ }; -+ }; -+ - }; + }; + }; + +@@ -753,3 +881,29 @@ #include "qoriq-qman-portals.dtsi" + #include "qoriq-bman-portals.dtsi" ++ ++&thermal_zones { ++ thermal-zone0 { ++ status = "okay"; ++ }; ++ ++ thermal-zone1 { ++ status = "okay"; ++ }; ++ ++ thermal-zone2 { ++ status = "okay"; ++ }; ++ ++ thermal-zone3 { ++ status = "okay"; ++ }; ++ ++ thermal-zone4 { ++ status = "okay"; ++ }; ++ ++ thermal-zone5 { ++ status = "okay"; ++ }; ++}; --- a/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi @@ -1,9 +1,9 @@ @@ -2360,7 +3501,7 @@ Signed-off-by: Biwen Li &soc { --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts -@@ -0,0 +1,79 @@ +@@ -0,0 +1,268 @@ +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * @@ -2425,8 +3566,24 @@ Signed-off-by: Biwen Li +}; + +&soc { ++/delete-property/ dma-coherent; ++ +#include "qoriq-dpaa-eth.dtsi" +#include "qoriq-fman3-0-6oh.dtsi" ++ ++pcie@3400000 { ++ /delete-property/ iommu-map; ++}; ++ ++pcie@3500000 { ++ /delete-property/ iommu-map; ++}; ++ ++pcie@3600000 { ++ /delete-property/ iommu-map; ++}; ++ ++/delete-node/ iommu@9000000; +}; + +&fsldpaa { @@ -2439,6 +3596,179 @@ Signed-off-by: Biwen Li + +&fman0 { + compatible = "fsl,fman", "simple-bus"; ++ dma-coherent; ++}; ++ ++&clockgen { ++ dma-coherent; ++}; ++ ++&scfg { ++ dma-coherent; ++}; ++ ++&crypto { ++ dma-coherent; ++}; ++ ++&dcfg { ++ dma-coherent; ++}; ++ ++&ifc { ++ dma-coherent; ++}; ++ ++&qspi { ++ dma-coherent; ++}; ++ ++&esdhc { ++ dma-coherent; ++}; ++ ++&ddr { ++ dma-coherent; ++}; ++ ++&tmu { ++ dma-coherent; ++}; ++ ++&qman { ++ dma-coherent; ++}; ++ ++&bman { ++ dma-coherent; ++}; ++ ++&bportals { ++ dma-coherent; ++}; ++ ++&qportals { ++ dma-coherent; ++}; ++ ++&dspi { ++ dma-coherent; ++}; ++ ++&i2c0 { ++ dma-coherent; ++}; ++ ++&i2c1 { ++ dma-coherent; ++}; ++ ++&i2c2 { ++ dma-coherent; ++}; ++ ++&i2c3 { ++ dma-coherent; ++}; ++ ++&duart0 { ++ dma-coherent; ++}; ++ ++&duart1 { ++ dma-coherent; ++}; ++ ++&duart2 { ++ dma-coherent; ++}; ++ ++&duart3 { ++ dma-coherent; ++}; ++ ++&gpio0 { ++ dma-coherent; ++}; ++ ++&gpio1 { ++ dma-coherent; ++}; ++ ++&gpio2 { ++ dma-coherent; ++}; ++ ++&gpio3 { ++ dma-coherent; ++}; ++ ++&lpuart0 { ++ dma-coherent; ++}; ++ ++&lpuart1 { ++ dma-coherent; ++}; ++ ++&lpuart2 { ++ dma-coherent; ++}; ++ ++&lpuart3 { ++ dma-coherent; ++}; ++ ++&lpuart4 { ++ dma-coherent; ++}; ++ ++&lpuart5 { ++ dma-coherent; ++}; ++ ++&ftm0 { ++ dma-coherent; ++}; ++ ++&wdog0 { ++ dma-coherent; ++}; ++ ++&edma0 { ++ dma-coherent; ++}; ++ ++&sata { ++ dma-coherent; ++}; ++ ++&qdma { ++ dma-coherent; ++}; ++ ++&msi1 { ++ dma-coherent; ++}; ++ ++&msi2 { ++ dma-coherent; ++}; ++ ++&msi3 { ++ dma-coherent; ++}; ++ ++&ptp_timer0 { ++ dma-coherent; ++}; ++ ++&serdes1 { ++ dma-coherent; ++}; ++ ++&fsldpaa { ++ dma-coherent; +}; --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts @@ -2512,9 +3842,23 @@ Signed-off-by: Biwen Li }; chosen { -@@ -208,7 +185,143 @@ +@@ -188,8 +165,9 @@ + }; + + fpga: board-control@2,0 { +- compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis"; ++ compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-bus"; + reg = <0x2 0x0 0x0000100>; ++ ranges = <0 2 0 0x100>; + }; + }; + +@@ -206,9 +184,145 @@ + compatible = "spansion,m25p80"; + #address-cells = <1>; #size-cells = <1>; - spi-max-frequency = <20000000>; +- spi-max-frequency = <20000000>; ++ spi-max-frequency = <50000000>; reg = <0>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; @@ -2658,7 +4002,7 @@ Signed-off-by: Biwen Li +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts -@@ -0,0 +1,115 @@ +@@ -0,0 +1,307 @@ +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * @@ -2723,8 +4067,24 @@ Signed-off-by: Biwen Li +}; + +&soc { ++/delete-property/ dma-coherent; ++ +#include "qoriq-dpaa-eth.dtsi" +#include "qoriq-fman3-0-6oh.dtsi" ++ ++pcie@3400000 { ++ /delete-property/ iommu-map; ++}; ++ ++pcie@3500000 { ++ /delete-property/ iommu-map; ++}; ++ ++pcie@3600000 { ++ /delete-property/ iommu-map; ++}; ++ ++/delete-node/ iommu@9000000; +}; + +&fsldpaa { @@ -2774,65 +4134,245 @@ Signed-off-by: Biwen Li + * phy-handle = <&pcsphy7>; + *}; +*/ ---- /dev/null -+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts -@@ -0,0 +1,110 @@ -+/* -+ * Device Tree Include file for Freescale Layerscape-1046A family SoC. -+ * -+ * Copyright (C) 2016, Freescale Semiconductor -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ + -+#include "fsl-ls1046a-rdb-sdk.dts" ++&clockgen { ++ dma-coherent; ++}; + -+&soc { -+ bp7: buffer-pool@7 { -+ compatible = "fsl,ls1046a-bpool", "fsl,bpool"; -+ fsl,bpid = <7>; -+ fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; -+ fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; -+ }; ++&scfg { ++ dma-coherent; ++}; + -+ bp8: buffer-pool@8 { -+ compatible = "fsl,ls1046a-bpool", "fsl,bpool"; -+ fsl,bpid = <8>; -+ fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; -+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; -+ }; ++&crypto { ++ dma-coherent; ++}; + -+ bp9: buffer-pool@9 { -+ compatible = "fsl,ls1046a-bpool", "fsl,bpool"; -+ fsl,bpid = <9>; -+ fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>; -+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; -+ }; ++&dcfg { ++ dma-coherent; ++}; + -+ fsl,dpaa { -+ compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus"; ++&ifc { ++ dma-coherent; ++}; + -+ ethernet@2 { -+ compatible = "fsl,dpa-ethernet-init"; -+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; -+ fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; -+ fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; -+ }; ++&qspi { ++ dma-coherent; ++}; + -+ ethernet@3 { -+ compatible = "fsl,dpa-ethernet-init"; -+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; -+ fsl,qman-frame-queues-rx = <0x56 1 0x57 1>; -+ fsl,qman-frame-queues-tx = <0x76 1 0x77 1>; -+ }; ++&esdhc { ++ dma-coherent; ++}; + -+ ethernet@4 { -+ compatible = "fsl,dpa-ethernet-init"; -+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; -+ fsl,qman-frame-queues-rx = <0x58 1 0x59 1>; -+ fsl,qman-frame-queues-tx = <0x78 1 0x79 1>; ++&ddr { ++ dma-coherent; ++}; ++ ++&tmu { ++ dma-coherent; ++}; ++ ++&qman { ++ dma-coherent; ++}; ++ ++&bman { ++ dma-coherent; ++}; ++ ++&bportals { ++ dma-coherent; ++}; ++ ++&qportals { ++ dma-coherent; ++}; ++ ++&dspi { ++ dma-coherent; ++}; ++ ++&i2c0 { ++ dma-coherent; ++}; ++ ++&i2c1 { ++ dma-coherent; ++}; ++ ++&i2c2 { ++ dma-coherent; ++}; ++ ++&i2c3 { ++ dma-coherent; ++}; ++ ++&duart0 { ++ dma-coherent; ++}; ++ ++&duart1 { ++ dma-coherent; ++}; ++ ++&duart2 { ++ dma-coherent; ++}; ++ ++&duart3 { ++ dma-coherent; ++}; ++ ++&gpio0 { ++ dma-coherent; ++}; ++ ++&gpio1 { ++ dma-coherent; ++}; ++ ++&gpio2 { ++ dma-coherent; ++}; ++ ++&gpio3 { ++ dma-coherent; ++}; ++ ++&lpuart0 { ++ dma-coherent; ++}; ++ ++&lpuart1 { ++ dma-coherent; ++}; ++ ++&lpuart2 { ++ dma-coherent; ++}; ++ ++&lpuart3 { ++ dma-coherent; ++}; ++ ++&lpuart4 { ++ dma-coherent; ++}; ++ ++&lpuart5 { ++ dma-coherent; ++}; ++ ++&ftm0 { ++ dma-coherent; ++}; ++ ++&wdog0 { ++ dma-coherent; ++}; ++ ++&edma0 { ++ dma-coherent; ++}; ++ ++&sata { ++ dma-coherent; ++}; ++ ++&qdma { ++ dma-coherent; ++}; ++ ++&msi1 { ++ dma-coherent; ++}; ++ ++&msi2 { ++ dma-coherent; ++}; ++ ++&msi3 { ++ dma-coherent; ++}; ++ ++&fman0 { ++ dma-coherent; ++}; ++ ++&ptp_timer0 { ++ dma-coherent; ++}; ++ ++&serdes1 { ++ dma-coherent; ++}; ++ ++&fsldpaa { ++ dma-coherent; ++}; +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts +@@ -0,0 +1,133 @@ ++/* ++ * Device Tree Include file for Freescale Layerscape-1046A family SoC. ++ * ++ * Copyright (C) 2016, Freescale Semiconductor ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++ */ ++ ++#include "fsl-ls1046a-rdb-sdk.dts" ++ ++&soc { ++ bp7: buffer-pool@7 { ++ compatible = "fsl,ls1046a-bpool", "fsl,bpool"; ++ fsl,bpid = <7>; ++ fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; ++ fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; ++ dma-coherent; ++ }; ++ ++ bp8: buffer-pool@8 { ++ compatible = "fsl,ls1046a-bpool", "fsl,bpool"; ++ fsl,bpid = <8>; ++ fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; ++ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; ++ dma-coherent; ++ }; ++ ++ bp9: buffer-pool@9 { ++ compatible = "fsl,ls1046a-bpool", "fsl,bpool"; ++ fsl,bpid = <9>; ++ fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>; ++ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; ++ dma-coherent; ++ }; ++ ++ fsl,dpaa { ++ compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus"; ++ dma-coherent; ++ ++ ethernet@2 { ++ compatible = "fsl,dpa-ethernet-init"; ++ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; ++ fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; ++ fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; ++ }; ++ ++ ethernet@3 { ++ compatible = "fsl,dpa-ethernet-init"; ++ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; ++ fsl,qman-frame-queues-rx = <0x56 1 0x57 1>; ++ fsl,qman-frame-queues-tx = <0x76 1 0x77 1>; ++ }; ++ ++ ethernet@4 { ++ compatible = "fsl,dpa-ethernet-init"; ++ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; ++ fsl,qman-frame-queues-rx = <0x58 1 0x59 1>; ++ fsl,qman-frame-queues-tx = <0x78 1 0x79 1>; + }; + + ethernet@5 { @@ -2864,6 +4404,20 @@ Signed-off-by: Biwen Li + fsl,fman-oh-port = <&fman0_oh2>; + }; + }; ++ ++ pcie@3400000 { ++ /delete-property/ iommu-map; ++ }; ++ ++ pcie@3500000 { ++ /delete-property/ iommu-map; ++ }; ++ ++ pcie@3600000 { ++ /delete-property/ iommu-map; ++ }; ++ ++ /delete-node/ iommu@9000000; +}; +/ { + reserved-memory { @@ -2871,11 +4425,16 @@ Signed-off-by: Biwen Li + #size-cells = <2>; + ranges; + ++ /* For legacy usdpaa based use-cases, update the size and ++ alignment parameters. e.g. to allocate 256 MB memory: ++ size = <0 0x10000000>; ++ alignment = <0 0x10000000>; ++ */ + usdpaa_mem: usdpaa_mem { + compatible = "fsl,usdpaa-mem"; + alloc-ranges = <0 0 0x10000 0>; -+ size = <0 0x10000000>; -+ alignment = <0 0x10000000>; ++ size = <0 0x1000>; ++ alignment = <0 0x1000>; + }; + }; +}; @@ -2938,7 +4497,7 @@ Signed-off-by: Biwen Li */ /dts-v1/; -@@ -139,6 +102,7 @@ +@@ -139,21 +102,26 @@ num-cs = <2>; bus-num = <0>; status = "okay"; @@ -2946,18 +4505,21 @@ Signed-off-by: Biwen Li qflash0: s25fs512s@0 { compatible = "spansion,m25p80"; -@@ -146,6 +110,8 @@ + #address-cells = <1>; #size-cells = <1>; - spi-max-frequency = <20000000>; +- spi-max-frequency = <20000000>; ++ spi-max-frequency = <50000000>; reg = <0>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; qflash1: s25fs512s@1 { -@@ -154,6 +120,8 @@ + compatible = "spansion,m25p80"; + #address-cells = <1>; #size-cells = <1>; - spi-max-frequency = <20000000>; +- spi-max-frequency = <20000000>; ++ spi-max-frequency = <50000000>; reg = <1>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; @@ -3015,6 +4577,15 @@ Signed-off-by: Biwen Li */ #include +@@ -70,7 +33,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x0>; @@ -122,7 +85,7 @@ CPU_PH20: cpu-ph20 { compatible = "arm,idle-state"; @@ -3024,7 +4595,16 @@ Signed-off-by: Biwen Li entry-latency-us = <1000>; exit-latency-us = <1000>; min-residency-us = <3000>; -@@ -214,7 +177,6 @@ +@@ -188,6 +151,8 @@ + #address-cells = <2>; + #size-cells = <2>; + ranges; ++ dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; ++ dma-coherent; + + ddr: memory-controller@1080000 { + compatible = "fsl,qoriq-memory-controller"; +@@ -214,7 +179,6 @@ clock-names = "qspi_en", "qspi"; clocks = <&clockgen 4 1>, <&clockgen 4 1>; big-endian; @@ -3032,7 +4612,57 @@ Signed-off-by: Biwen Li status = "disabled"; }; -@@ -304,7 +266,7 @@ +@@ -229,6 +193,49 @@ + bus-width = <4>; + }; + ++ smmu: iommu@9000000 { ++ compatible = "arm,mmu-500"; ++ reg = <0 0x9000000 0 0x400000>; ++ dma-coherent; ++ stream-match-mask = <0x7f00>; ++ #global-interrupts = <2>; ++ #iommu-cells = <1>; ++ interrupts = , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; ++ }; ++ + scfg: scfg@1570000 { + compatible = "fsl,ls1046a-scfg", "syscon"; + reg = <0x0 0x1570000 0x0 0x10000>; +@@ -304,7 +311,7 @@ dcfg: dcfg@1ee0000 { compatible = "fsl,ls1046a-dcfg", "syscon"; @@ -3041,7 +4671,45 @@ Signed-off-by: Biwen Li big-endian; }; -@@ -407,7 +369,7 @@ +@@ -362,36 +369,7 @@ + #thermal-sensor-cells = <1>; + }; + +- thermal-zones { +- cpu_thermal: cpu-thermal { +- polling-delay-passive = <1000>; +- polling-delay = <5000>; +- thermal-sensors = <&tmu 3>; +- +- trips { +- cpu_alert: cpu-alert { +- temperature = <85000>; +- hysteresis = <2000>; +- type = "passive"; +- }; +- +- cpu_crit: cpu-crit { +- temperature = <95000>; +- hysteresis = <2000>; +- type = "critical"; +- }; +- }; +- +- cooling-maps { +- map0 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- }; +- }; +- }; ++ #include "fsl-tmu.dtsi" + + dspi: dspi@2100000 { + compatible = "fsl,ls1021a-v1.0-dspi"; +@@ -407,7 +385,7 @@ }; i2c0: i2c@2180000 { @@ -3050,15 +4718,15 @@ Signed-off-by: Biwen Li #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; -@@ -416,6 +378,7 @@ +@@ -416,6 +394,7 @@ dmas = <&edma0 1 39>, <&edma0 1 38>; dma-names = "tx", "rx"; -+ fsl-scl-gpio = <&gpio3 12 0>; ++ scl-gpios = <&gpio3 12 0>; status = "disabled"; }; -@@ -440,12 +403,13 @@ +@@ -440,12 +419,13 @@ }; i2c3: i2c@21b0000 { @@ -3069,11 +4737,11 @@ Signed-off-by: Biwen Li reg = <0x0 0x21b0000 0x0 0x10000>; interrupts = ; clocks = <&clockgen 4 1>; -+ fsl-scl-gpio = <&gpio3 12 0>; ++ scl-gpios = <&gpio3 12 0>; status = "disabled"; }; -@@ -571,6 +535,15 @@ +@@ -571,6 +551,15 @@ status = "disabled"; }; @@ -3089,40 +4757,100 @@ Signed-off-by: Biwen Li wdog0: watchdog@2ad0000 { compatible = "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>; -@@ -602,6 +575,9 @@ - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; -+ usb3-lpm-capable; -+ snps,dis-u1u2-when-u3-quirk; -+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - usb1: usb@3000000 { -@@ -611,6 +587,9 @@ - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; -+ usb3-lpm-capable; -+ snps,dis-u1u2-when-u3-quirk; -+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - usb2: usb@3100000 { -@@ -620,6 +599,9 @@ - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; -+ usb3-lpm-capable; -+ snps,dis-u1u2-when-u3-quirk; -+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - sata: sata@3200000 { -@@ -631,6 +613,27 @@ - clocks = <&clockgen 4 1>; +@@ -595,40 +584,81 @@ + <&clockgen 4 1>; }; +- usb0: usb@2f00000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0x2f00000 0x0 0x10000>; +- interrupts = ; +- dr_mode = "host"; +- snps,quirk-frame-length-adjustment = <0x20>; +- snps,dis_rxdet_inp3_quirk; +- }; +- +- usb1: usb@3000000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0x3000000 0x0 0x10000>; +- interrupts = ; +- dr_mode = "host"; +- snps,quirk-frame-length-adjustment = <0x20>; +- snps,dis_rxdet_inp3_quirk; +- }; +- +- usb2: usb@3100000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0x3100000 0x0 0x10000>; +- interrupts = ; +- dr_mode = "host"; +- snps,quirk-frame-length-adjustment = <0x20>; +- snps,dis_rxdet_inp3_quirk; +- }; +- +- sata: sata@3200000 { +- compatible = "fsl,ls1046a-ahci"; +- reg = <0x0 0x3200000 0x0 0x10000>, +- <0x0 0x20140520 0x0 0x4>; +- reg-names = "ahci", "sata-ecc"; +- interrupts = ; +- clocks = <&clockgen 4 1>; ++ aux_bus: aux_bus { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ compatible = "simple-bus"; ++ ranges; ++ dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>; ++ ++ usb0: usb@2f00000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x2f00000 0x0 0x10000>; ++ interrupts = ; ++ dr_mode = "host"; ++ snps,quirk-frame-length-adjustment = <0x20>; ++ snps,dis_rxdet_inp3_quirk; ++ usb3-lpm-capable; ++ snps,dis-u1u2-when-u3-quirk; ++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; ++ }; ++ ++ usb1: usb@3000000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x3000000 0x0 0x10000>; ++ interrupts = ; ++ dr_mode = "host"; ++ snps,quirk-frame-length-adjustment = <0x20>; ++ snps,dis_rxdet_inp3_quirk; ++ usb3-lpm-capable; ++ snps,dis-u1u2-when-u3-quirk; ++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; ++ }; ++ ++ usb2: usb@3100000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x3100000 0x0 0x10000>; ++ interrupts = ; ++ dr_mode = "host"; ++ snps,quirk-frame-length-adjustment = <0x20>; ++ snps,dis_rxdet_inp3_quirk; ++ usb3-lpm-capable; ++ snps,dis-u1u2-when-u3-quirk; ++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; ++ }; ++ ++ sata: sata@3200000 { ++ compatible = "fsl,ls1046a-ahci"; ++ reg = <0x0 0x3200000 0x0 0x10000>, ++ <0x0 0x20140520 0x0 0x4>; ++ reg-names = "ahci", "sata-ecc"; ++ interrupts = ; ++ clocks = <&clockgen 4 1>; ++ }; ++ }; ++ + qdma: qdma@8380000 { + compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma"; + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */ @@ -3142,12 +4870,10 @@ Signed-off-by: Biwen Li + status-sizes = <64>; + queue-sizes = <64 64>; + big-endian; -+ }; -+ + }; + msi1: msi-controller@1580000 { - compatible = "fsl,ls1046a-msi"; - msi-controller; -@@ -661,6 +664,92 @@ +@@ -661,6 +691,125 @@ ; }; @@ -3163,9 +4889,8 @@ Signed-off-by: Biwen Li + #size-cells = <2>; + device_type = "pci"; + dma-coherent; ++ iommu-map = <0 &smmu 0 1>; + num-lanes = <4>; -+ num-ib-windows = <6>; -+ num-ob-windows = <6>; + bus-range = <0x0 0xff>; + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -3176,6 +4901,18 @@ Signed-off-by: Biwen Li + <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ pcie_ep@3400000 { ++ compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; ++ reg = <0x00 0x03400000 0x0 0x00100000 ++ 0x40 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ib-windows = <6>; ++ num-ob-windows = <8>; ++ num-lanes = <2>; ++ status = "disabled"; + }; + + pcie@3500000 { @@ -3190,9 +4927,8 @@ Signed-off-by: Biwen Li + #size-cells = <2>; + device_type = "pci"; + dma-coherent; ++ iommu-map = <0 &smmu 0 1>; + num-lanes = <2>; -+ num-ib-windows = <6>; -+ num-ob-windows = <6>; + bus-range = <0x0 0xff>; + ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -3203,6 +4939,18 @@ Signed-off-by: Biwen Li + <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ pcie_ep@3500000 { ++ compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; ++ reg = <0x00 0x03500000 0x0 0x00100000 ++ 0x48 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ib-windows = <6>; ++ num-ob-windows = <8>; ++ num-lanes = <2>; ++ status = "disabled"; + }; + + pcie@3600000 { @@ -3217,9 +4965,8 @@ Signed-off-by: Biwen Li + #size-cells = <2>; + device_type = "pci"; + dma-coherent; ++ iommu-map = <0 &smmu 0 1>; + num-lanes = <2>; -+ num-ib-windows = <6>; -+ num-ob-windows = <6>; + bus-range = <0x0 0xff>; + ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -3230,6 +4977,18 @@ Signed-off-by: Biwen Li + <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ pcie_ep@3600000 { ++ compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"; ++ reg = <0x00 0x03600000 0x0 0x00100000 ++ 0x50 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ib-windows = <6>; ++ num-ob-windows = <8>; ++ num-lanes = <2>; ++ status = "disabled"; + }; + + serdes1: serdes@1ea0000 { @@ -3240,7 +4999,7 @@ Signed-off-by: Biwen Li }; reserved-memory { -@@ -689,6 +778,13 @@ +@@ -689,7 +838,36 @@ no-map; }; }; @@ -3254,6 +5013,29 @@ Signed-off-by: Biwen Li }; #include "qoriq-qman-portals.dtsi" + #include "qoriq-bman-portals.dtsi" ++ ++&thermal_zones { ++ thermal-zone0 { ++ status = "okay"; ++ }; ++ ++ thermal-zone1 { ++ status = "okay"; ++ }; ++ ++ thermal-zone2 { ++ status = "okay"; ++ }; ++ ++ thermal-zone3 { ++ status = "okay"; ++ }; ++ ++ thermal-zone4 { ++ status = "okay"; ++ }; ++}; --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts @@ -1,3 +1,4 @@ @@ -3598,8 +5380,26 @@ Signed-off-by: Biwen Li */ #include #include -@@ -130,7 +94,7 @@ - CPU_PH20: cpu-ph20 { +@@ -61,7 +25,7 @@ + #size-cells = <0>; + + /* We have 2 clusters having 4 Cortex-A53 cores each */ +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; +@@ -94,7 +58,7 @@ + cpu-idle-states = <&CPU_PH20>; + }; + +- cpu4: cpu@100 { ++ cooling_map1: cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x100>; +@@ -130,7 +94,7 @@ + CPU_PH20: cpu-ph20 { compatible = "arm,idle-state"; idle-state-name = "PH20"; - arm,psci-suspend-param = <0x00010000>; @@ -3655,7 +5455,52 @@ Signed-off-by: Biwen Li clockgen: clocking@1300000 { compatible = "fsl,ls1088a-clockgen"; -@@ -283,6 +276,62 @@ +@@ -229,43 +222,7 @@ + #thermal-sensor-cells = <1>; + }; + +- thermal-zones { +- cpu_thermal: cpu-thermal { +- polling-delay-passive = <1000>; +- polling-delay = <5000>; +- thermal-sensors = <&tmu 0>; +- +- trips { +- cpu_alert: cpu-alert { +- temperature = <85000>; +- hysteresis = <2000>; +- type = "passive"; +- }; +- +- cpu_crit: cpu-crit { +- temperature = <95000>; +- hysteresis = <2000>; +- type = "critical"; +- }; +- }; +- +- cooling-maps { +- map0 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- +- map1 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu4 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- }; +- }; +- }; ++ #include "fsl-tmu.dtsi" + + duart0: serial@21c0500 { + compatible = "fsl,ns16550", "ns16550a"; +@@ -283,6 +240,62 @@ status = "disabled"; }; @@ -3718,7 +5563,7 @@ Signed-off-by: Biwen Li gpio0: gpio@2300000 { compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>; -@@ -323,6 +372,72 @@ +@@ -323,6 +336,72 @@ #interrupt-cells = <2>; }; @@ -3791,7 +5636,7 @@ Signed-off-by: Biwen Li ifc: ifc@2240000 { compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x2240000 0x0 0x20000>; -@@ -333,13 +448,22 @@ +@@ -333,13 +412,22 @@ status = "disabled"; }; @@ -3812,11 +5657,11 @@ Signed-off-by: Biwen Li interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 3>; + clocks = <&clockgen 4 7>; -+ fsl-scl-gpio = <&gpio3 30 0>; ++ scl-gpios = <&gpio3 30 0>; status = "disabled"; }; -@@ -349,7 +473,7 @@ +@@ -349,7 +437,7 @@ #size-cells = <0>; reg = <0x0 0x2010000 0x0 0x10000>; interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; @@ -3825,7 +5670,7 @@ Signed-off-by: Biwen Li status = "disabled"; }; -@@ -359,7 +483,7 @@ +@@ -359,7 +447,7 @@ #size-cells = <0>; reg = <0x0 0x2020000 0x0 0x10000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; @@ -3834,7 +5679,7 @@ Signed-off-by: Biwen Li status = "disabled"; }; -@@ -369,7 +493,7 @@ +@@ -369,7 +457,7 @@ #size-cells = <0>; reg = <0x0 0x2030000 0x0 0x10000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; @@ -3843,7 +5688,7 @@ Signed-off-by: Biwen Li status = "disabled"; }; -@@ -385,6 +509,26 @@ +@@ -385,6 +473,28 @@ status = "disabled"; }; @@ -3855,6 +5700,7 @@ Signed-off-by: Biwen Li + configure-gfladj; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; + }; + + usb1: usb3@3110000 { @@ -3865,12 +5711,13 @@ Signed-off-by: Biwen Li + configure-gfladj; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; + }; + sata: sata@3200000 { compatible = "fsl,ls1088a-ahci"; reg = <0x0 0x3200000 0x0 0x10000>, -@@ -395,6 +539,17 @@ +@@ -395,6 +505,17 @@ dma-coherent; status = "disabled"; }; @@ -3888,7 +5735,7 @@ Signed-off-by: Biwen Li crypto: crypto@8000000 { compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; -@@ -434,6 +589,251 @@ +@@ -434,6 +555,267 @@ interrupts = ; }; }; @@ -3916,6 +5763,7 @@ Signed-off-by: Biwen Li + <0000 0 0 2 &gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; + }; + + pcie@3500000 { @@ -3941,6 +5789,7 @@ Signed-off-by: Biwen Li + <0000 0 0 2 &gic 0 0 0 115 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 0 116 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; + }; + + pcie@3600000 { @@ -3966,6 +5815,7 @@ Signed-off-by: Biwen Li + <0000 0 0 2 &gic 0 0 0 120 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; + }; + + fsl_mc: fsl-mc@80c000000 { @@ -4128,8 +5978,9 @@ Signed-off-by: Biwen Li + }; + + serdes1: serdes@1ea0000 { -+ reg = <0x0 0x1ea0000 0 0x00002000>; + compatible = "fsl,serdes-10g"; ++ reg = <0x0 0x1ea0000 0 0x00002000>; ++ little-endian; + }; }; @@ -4138,6 +5989,18 @@ Signed-off-by: Biwen Li + compatible = "linaro,optee-tz"; + method = "smc"; + }; ++ }; ++}; ++ ++#include "fsl-tmu-map1.dtsi" ++ ++&thermal_zones { ++ thermal-zone0 { ++ status = "okay"; ++ }; ++ ++ thermal-zone1 { ++ status = "okay"; + }; }; --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts @@ -4450,7 +6313,7 @@ Signed-off-by: Biwen Li /* * Device Tree Include file for Freescale Layerscape-2080A family SoC. * -@@ -6,43 +7,6 @@ +@@ -6,49 +7,12 @@ * Abhimanyu Saini * Bhupesh Sharma * @@ -4494,6 +6357,40 @@ Signed-off-by: Biwen Li */ #include "fsl-ls208xa.dtsi" + + &cpu { +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0>; +@@ -67,7 +31,7 @@ + next-level-cache = <&cluster0_l2>; + }; + +- cpu2: cpu@100 { ++ cooling_map1: cpu2: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x100>; +@@ -86,7 +50,7 @@ + next-level-cache = <&cluster1_l2>; + }; + +- cpu4: cpu@200 { ++ cooling_map2: cpu4: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x200>; +@@ -105,7 +69,7 @@ + next-level-cache = <&cluster2_l2>; + }; + +- cpu6: cpu@300 { ++ cooling_map3: cpu6: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x300>; @@ -150,6 +114,10 @@ }; }; @@ -4988,7 +6885,7 @@ Signed-off-by: Biwen Li /* * Device Tree Include file for Freescale Layerscape-2088A family SoC. * -@@ -6,43 +7,6 @@ +@@ -6,49 +7,12 @@ * * Abhimanyu Saini * @@ -5032,6 +6929,40 @@ Signed-off-by: Biwen Li */ #include "fsl-ls208xa.dtsi" + + &cpu { +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x0>; +@@ -67,7 +31,7 @@ + next-level-cache = <&cluster0_l2>; + }; + +- cpu2: cpu@100 { ++ cooling_map1: cpu2: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x100>; +@@ -86,7 +50,7 @@ + next-level-cache = <&cluster1_l2>; + }; + +- cpu4: cpu@200 { ++ cooling_map2: cpu4: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x200>; +@@ -105,7 +69,7 @@ + next-level-cache = <&cluster2_l2>; + }; + +- cpu6: cpu@300 { ++ cooling_map3: cpu6: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x300>; @@ -143,7 +107,7 @@ CPU_PW20: cpu-pw20 { compatible = "arm,idle-state"; @@ -5314,7 +7245,63 @@ Signed-off-by: Biwen Li clockgen: clocking@1300000 { compatible = "fsl,ls2080a-clockgen"; -@@ -357,6 +321,8 @@ +@@ -194,54 +158,7 @@ + #thermal-sensor-cells = <1>; + }; + +- thermal-zones { +- cpu_thermal: cpu-thermal { +- polling-delay-passive = <1000>; +- polling-delay = <5000>; +- +- thermal-sensors = <&tmu 4>; +- +- trips { +- cpu_alert: cpu-alert { +- temperature = <75000>; +- hysteresis = <2000>; +- type = "passive"; +- }; +- cpu_crit: cpu-crit { +- temperature = <85000>; +- hysteresis = <2000>; +- type = "critical"; +- }; +- }; +- +- cooling-maps { +- map0 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- map1 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu2 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- map2 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu4 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- map3 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu6 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- }; +- }; +- }; ++ #include "fsl-tmu.dtsi" + + serial0: serial@21c0500 { + compatible = "fsl,ns16550", "ns16550a"; +@@ -357,6 +274,8 @@ reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ msi-parent = <&its>; @@ -5323,7 +7310,7 @@ Signed-off-by: Biwen Li #address-cells = <3>; #size-cells = <1>; -@@ -460,6 +426,8 @@ +@@ -460,6 +379,8 @@ compatible = "arm,mmu-500"; reg = <0 0x5000000 0 0x800000>; #global-interrupts = <12>; @@ -5332,7 +7319,7 @@ Signed-off-by: Biwen Li interrupts = <0 13 4>, /* global secure fault */ <0 14 4>, /* combined secure interrupt */ <0 15 4>, /* global non-secure fault */ -@@ -502,7 +470,6 @@ +@@ -502,7 +423,6 @@ <0 204 4>, <0 205 4>, <0 206 4>, <0 207 4>, <0 208 4>, <0 209 4>; @@ -5340,7 +7327,7 @@ Signed-off-by: Biwen Li }; dspi: dspi@2100000 { -@@ -574,15 +541,126 @@ +@@ -574,15 +494,126 @@ #interrupt-cells = <2>; }; @@ -5465,11 +7452,11 @@ Signed-off-by: Biwen Li clock-names = "i2c"; - clocks = <&clockgen 4 3>; + clocks = <&clockgen 4 1>; -+ fsl-scl-gpio = <&gpio3 10 0>; ++ scl-gpios = <&gpio3 10 0>; }; i2c1: i2c@2010000 { -@@ -593,7 +671,7 @@ +@@ -593,7 +624,7 @@ reg = <0x0 0x2010000 0x0 0x10000>; interrupts = <0 34 0x4>; /* Level high type */ clock-names = "i2c"; @@ -5478,7 +7465,7 @@ Signed-off-by: Biwen Li }; i2c2: i2c@2020000 { -@@ -604,7 +682,7 @@ +@@ -604,7 +635,7 @@ reg = <0x0 0x2020000 0x0 0x10000>; interrupts = <0 35 0x4>; /* Level high type */ clock-names = "i2c"; @@ -5487,7 +7474,7 @@ Signed-off-by: Biwen Li }; i2c3: i2c@2030000 { -@@ -615,7 +693,7 @@ +@@ -615,7 +646,7 @@ reg = <0x0 0x2030000 0x0 0x10000>; interrupts = <0 35 0x4>; /* Level high type */ clock-names = "i2c"; @@ -5496,7 +7483,7 @@ Signed-off-by: Biwen Li }; ifc: ifc@2240000 { -@@ -648,8 +726,8 @@ +@@ -648,8 +679,8 @@ compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"; reg-names = "regs", "config"; @@ -5507,7 +7494,7 @@ Signed-off-by: Biwen Li #address-cells = <3>; #size-cells = <2>; device_type = "pci"; -@@ -657,6 +735,7 @@ +@@ -657,20 +688,22 @@ num-lanes = <4>; bus-range = <0x0 0xff>; msi-parent = <&its>; @@ -5515,7 +7502,13 @@ Signed-off-by: Biwen Li #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>, -@@ -669,8 +748,8 @@ + <0000 0 0 2 &gic 0 0 0 110 4>, + <0000 0 0 3 &gic 0 0 0 111 4>, + <0000 0 0 4 &gic 0 0 0 112 4>; ++ status = "disabled"; + }; + + pcie2: pcie@3500000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"; reg-names = "regs", "config"; @@ -5526,7 +7519,7 @@ Signed-off-by: Biwen Li #address-cells = <3>; #size-cells = <2>; device_type = "pci"; -@@ -678,6 +757,7 @@ +@@ -678,20 +711,22 @@ num-lanes = <4>; bus-range = <0x0 0xff>; msi-parent = <&its>; @@ -5534,7 +7527,13 @@ Signed-off-by: Biwen Li #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>, -@@ -690,8 +770,8 @@ + <0000 0 0 2 &gic 0 0 0 115 4>, + <0000 0 0 3 &gic 0 0 0 116 4>, + <0000 0 0 4 &gic 0 0 0 117 4>; ++ status = "disabled"; + }; + + pcie3: pcie@3600000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"; reg-names = "regs", "config"; @@ -5545,7 +7544,7 @@ Signed-off-by: Biwen Li #address-cells = <3>; #size-cells = <2>; device_type = "pci"; -@@ -699,6 +779,7 @@ +@@ -699,20 +734,22 @@ num-lanes = <8>; bus-range = <0x0 0xff>; msi-parent = <&its>; @@ -5553,7 +7552,13 @@ Signed-off-by: Biwen Li #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>, -@@ -711,8 +792,8 @@ + <0000 0 0 2 &gic 0 0 0 120 4>, + <0000 0 0 3 &gic 0 0 0 121 4>, + <0000 0 0 4 &gic 0 0 0 122 4>; ++ status = "disabled"; + }; + + pcie4: pcie@3700000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"; reg-names = "regs", "config"; @@ -5564,7 +7569,7 @@ Signed-off-by: Biwen Li #address-cells = <3>; #size-cells = <2>; device_type = "pci"; -@@ -720,6 +801,7 @@ +@@ -720,12 +757,14 @@ num-lanes = <4>; bus-range = <0x0 0xff>; msi-parent = <&its>; @@ -5572,28 +7577,38 @@ Signed-off-by: Biwen Li #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>, -@@ -754,6 +836,7 @@ + <0000 0 0 2 &gic 0 0 0 125 4>, + <0000 0 0 3 &gic 0 0 0 126 4>, + <0000 0 0 4 &gic 0 0 0 127 4>; ++ status = "disabled"; + }; + + sata0: sata@3200000 { +@@ -754,6 +793,8 @@ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; }; usb1: usb3@3110000 { -@@ -764,6 +847,12 @@ +@@ -764,6 +805,14 @@ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; + }; + + serdes1: serdes@1ea0000 { -+ reg = <0x0 0x1ea0000 0 0x00002000>; + compatible = "fsl,serdes-10g"; ++ reg = <0x0 0x1ea0000 0 0x00002000>; ++ little-endian; }; ccn@4000000 { -@@ -771,6 +860,14 @@ +@@ -771,6 +820,14 @@ reg = <0x0 0x04000000 0x0 0x01000000>; interrupts = <0 12 4>; }; @@ -5608,7 +7623,7 @@ Signed-off-by: Biwen Li }; ddr1: memory-controller@1080000 { -@@ -786,4 +883,11 @@ +@@ -786,4 +843,44 @@ interrupts = <0 18 0x4>; little-endian; }; @@ -5619,624 +7634,2518 @@ Signed-off-by: Biwen Li + method = "smc"; + }; + }; - }; ---- /dev/null -+++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi -@@ -0,0 +1,55 @@ -+/* -+ * QorIQ BMan SDK Portals device tree nodes -+ * -+ * Copyright 2011-2016 Freescale Semiconductor Inc. -+ * Copyright 2017 NXP -+ * -+ * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -+ */ ++}; + -+&bportals { -+ bman-portal@0 { -+ cell-index = <0>; ++#include "fsl-tmu-map1.dtsi" ++#include "fsl-tmu-map2.dtsi" ++#include "fsl-tmu-map3.dtsi" ++&thermal_zones { ++ thermal-zone1 { ++ status = "okay"; + }; + -+ bman-portal@10000 { -+ cell-index = <1>; ++ thermal-zone2{ ++ status = "okay"; + }; + -+ bman-portal@20000 { -+ cell-index = <2>; ++ thermal-zone3{ ++ status = "okay"; + }; + -+ bman-portal@30000 { -+ cell-index = <3>; ++ thermal-zone4{ ++ status = "okay"; + }; + -+ bman-portal@40000 { -+ cell-index = <4>; ++ thermal-zone5{ ++ status = "okay"; + }; + -+ bman-portal@50000 { -+ cell-index = <5>; ++ thermal-zone6{ ++ status = "okay"; + }; + -+ bman-portal@60000 { -+ cell-index = <6>; ++ thermal-zone7 { ++ status = "okay"; + }; + }; +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +@@ -0,0 +1,353 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++// ++// Device Tree file for LX2160AQDS ++// ++// Copyright 2018 NXP + -+ bman-portal@70000 { -+ cell-index = <7>; ++/dts-v1/; ++ ++#include "fsl-lx2160a.dtsi" ++ ++/ { ++ model = "NXP Layerscape LX2160AQDS"; ++ compatible = "fsl,lx2160a-qds", "fsl,lx2160a"; ++ ++ aliases { ++ crypto = &crypto; ++ serial0 = &uart0; + }; + -+ bman-portal@80000 { -+ cell-index = <8>; ++ chosen { ++ stdout-path = "serial0:115200n8"; + }; + -+ bman-portal@90000 { -+ cell-index = <9>; ++ sb_3v3: regulator-sb3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "MC34717-3.3VSB"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; + }; + -+ bman-bpids@0 { -+ compatible = "fsl,bpid-range"; -+ fsl,bpid-range = <32 32>; ++ mdio-mux-1 { ++ compatible = "mdio-mux-multiplexer"; ++ mux-controls = <&mux 0>; ++ mdio-parent-bus = <&emdio1>; ++ #address-cells=<1>; ++ #size-cells = <0>; ++ ++ mdio@0 { /* On-board PHY #1 RGMI1*/ ++ reg = <0x00>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@8 { /* On-board PHY #2 RGMI2*/ ++ reg = <0x8>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@18 { /* Slot #1 */ ++ reg = <0x18>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@19 { /* Slot #2 */ ++ reg = <0x19>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@1a { /* Slot #3 */ ++ reg = <0x1a>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@1b { /* Slot #4 */ ++ reg = <0x1b>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@1c { /* Slot #5 */ ++ reg = <0x1c>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@1d { /* Slot #6 */ ++ reg = <0x1d>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@1e { /* Slot #7 */ ++ reg = <0x1e>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@1f { /* Slot #8 */ ++ reg = <0x1f>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++ ++ mdio-mux-2 { ++ compatible = "mdio-mux-multiplexer"; ++ mux-controls = <&mux 1>; ++ mdio-parent-bus = <&emdio2>; ++ #address-cells=<1>; ++ #size-cells = <0>; ++ ++ mdio@0 { /* Slot #1 (secondary EMI) */ ++ reg = <0x00>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@1 { /* Slot #2 (secondary EMI) */ ++ reg = <0x01>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@2 { /* Slot #3 (secondary EMI) */ ++ reg = <0x02>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@3 { /* Slot #4 (secondary EMI) */ ++ reg = <0x03>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@4 { /* Slot #5 (secondary EMI) */ ++ reg = <0x04>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@5 { /* Slot #6 (secondary EMI) */ ++ reg = <0x05>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@6 { /* Slot #7 (secondary EMI) */ ++ reg = <0x06>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mdio@7 { /* Slot #8 (secondary EMI) */ ++ reg = <0x07>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; + }; +}; ---- a/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi -@@ -1,9 +1,9 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ BMan Portals device tree - * - * Copyright 2011-2016 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - &bportals { -@@ -68,4 +68,10 @@ - reg = <0x80000 0x4000>, <0x4080000 0x4000>; - interrupts = ; - }; + -+ bman-portal@90000 { -+ compatible = "fsl,bman-portal"; -+ reg = <0x90000 0x4000>, <0x4090000 0x4000>; -+ interrupts = ; ++&crypto { ++ status = "okay"; ++}; ++ ++&dspi0 { ++ status = "okay"; ++ ++ dflash0: flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <1000000>; + }; - }; ---- /dev/null -+++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi -@@ -0,0 +1,97 @@ -+/* -+ * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ] -+ * -+ * Copyright 2012 - 2015 Freescale Semiconductor Inc. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Freescale Semiconductor nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * -+ * ALTERNATIVELY, this software may be distributed under the terms of the -+ * GNU General Public License ("GPL") as published by the Free Software -+ * Foundation, either version 2 of that License or (at your option) any -+ * later version. -+ * -+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY -+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ ++}; + -+fsldpaa: fsl,dpaa { -+ compatible = "fsl,ls1043a-dpaa", "simple-bus", "fsl,dpaa"; -+ ethernet@0 { -+ compatible = "fsl,dpa-ethernet"; -+ fsl,fman-mac = <&enet0>; -+ dma-coherent; ++&dspi1 { ++ status = "okay"; ++ ++ dflash1: flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <1000000>; + }; -+ ethernet@1 { -+ compatible = "fsl,dpa-ethernet"; -+ fsl,fman-mac = <&enet1>; -+ dma-coherent; ++}; ++ ++&dspi2 { ++ status = "okay"; ++ ++ dflash2: flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <1000000>; + }; -+ ethernet@2 { -+ compatible = "fsl,dpa-ethernet"; -+ fsl,fman-mac = <&enet2>; -+ dma-coherent; ++}; ++ ++&emdio1 { ++ status = "okay"; ++}; ++ ++&emdio2 { ++ status = "okay"; ++}; ++ ++&esdhc0 { ++ status = "okay"; ++}; ++ ++&esdhc1 { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ fpga@66 { ++ compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c", ++ "simple-mfd"; ++ reg = <0x66>; ++ ++ mux: mux-controller { ++ compatible = "reg-mux"; ++ #mux-control-cells = <1>; ++ mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */ ++ <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */ ++ }; + }; -+ ethernet@3 { -+ compatible = "fsl,dpa-ethernet"; -+ fsl,fman-mac = <&enet3>; -+ dma-coherent; ++ ++ i2c-mux@77 { ++ compatible = "nxp,pca9547"; ++ reg = <0x77>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ i2c@2 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x2>; ++ ++ power-monitor@40 { ++ compatible = "ti,ina220"; ++ reg = <0x40>; ++ shunt-resistor = <500>; ++ }; ++ ++ power-monitor@41 { ++ compatible = "ti,ina220"; ++ reg = <0x41>; ++ shunt-resistor = <1000>; ++ }; ++ }; ++ ++ i2c@3 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x3>; ++ ++ temperature-sensor@4c { ++ compatible = "nxp,sa56004"; ++ reg = <0x4c>; ++ vcc-supply = <&sb_3v3>; ++ }; ++ ++ temperature-sensor@4d { ++ compatible = "nxp,sa56004"; ++ reg = <0x4d>; ++ vcc-supply = <&sb_3v3>; ++ }; ++ ++ rtc@51 { ++ compatible = "nxp,pcf2129"; ++ reg = <0x51>; ++ }; ++ }; + }; -+ ethernet@4 { -+ compatible = "fsl,dpa-ethernet"; -+ fsl,fman-mac = <&enet4>; -+ dma-coherent; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; ++}; ++ ++&usb0 { ++ status = "okay"; ++}; ++ ++&usb1 { ++ status = "okay"; ++}; ++ ++&pcs_mdio1 { ++ pcs_phy1: ethernet-phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ backplane-mode = "40gbase-kr"; ++ reg = <0x0>; ++ fsl,lane-handle = <&serdes1>; ++ fsl,lane-reg = <0xF00 0xE00 0xD00 0xC00>; /* lanes H, G, F, E */ + }; -+ ethernet@5 { -+ compatible = "fsl,dpa-ethernet"; -+ fsl,fman-mac = <&enet5>; -+ dma-coherent; ++}; ++ ++&pcs_mdio2 { ++ pcs_phy2: ethernet-phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ backplane-mode = "40gbase-kr"; ++ reg = <0x0>; ++ fsl,lane-handle = <&serdes1>; ++ fsl,lane-reg = <0xB00 0xA00 0x900 0x800>; /* lanes D, C, B, A */ + }; -+ ethernet@8 { -+ compatible = "fsl,dpa-ethernet"; -+ fsl,fman-mac = <&enet6>; -+ dma-coherent; ++}; ++ ++&pcs_mdio3 { ++ pcs_phy3: ethernet-phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ backplane-mode = "10gbase-kr"; ++ reg = <0x0>; ++ fsl,lane-handle = <&serdes1>; ++ fsl,lane-reg = <0xF00 0x100>; /* lane H */ + }; -+ ethernet@6 { -+ compatible = "fsl,im-ethernet"; -+ fsl,fman-mac = <&enet2>; -+ dma-coherent; -+ fpmevt-sel = <0>; ++}; ++ ++&pcs_mdio4 { ++ pcs_phy4: ethernet-phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ backplane-mode = "10gbase-kr"; ++ reg = <0x0>; ++ fsl,lane-handle = <&serdes1>; ++ fsl,lane-reg = <0xE00 0x100>; /* lane G */ + }; -+ ethernet@7 { -+ compatible = "fsl,im-ethernet"; -+ fsl,fman-mac = <&enet3>; -+ dma-coherent; -+ fpmevt-sel = <1>; ++}; ++ ++/* Update DPMAC connections to 40G backplane PHYs ++ * &dpmac1 { ++ * phy-handle = <&pcs_phy1>; ++ * }; ++ * ++ * &dpmac2 { ++ * phy-handle = <&pcs_phy2>; ++ * }; ++ */ ++ ++/* Update DPMAC connections to 10G backplane PHYs ++ * &dpmac3 { ++ * phy-handle = <&pcs_phy3>; ++ * }; ++ * ++ * &dpmac4 { ++ * phy-handle = <&pcs_phy4>; ++ * }; ++ */ +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +@@ -0,0 +1,233 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++// ++// Device Tree file for LX2160ARDB ++// ++// Copyright 2018 NXP ++ ++/dts-v1/; ++ ++#include "fsl-lx2160a.dtsi" ++ ++/ { ++ model = "NXP Layerscape LX2160ARDB"; ++ compatible = "fsl,lx2160a-rdb", "fsl,lx2160a"; ++ ++ aliases { ++ crypto = &crypto; ++ serial0 = &uart0; + }; -+ ethernet@10 { -+ compatible = "fsl,im-ethernet"; -+ fsl,fman-mac = <&enet4>; -+ dma-coherent; -+ fpmevt-sel = <2>; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; + }; -+ ethernet@11 { -+ compatible = "fsl,im-ethernet"; -+ fsl,fman-mac = <&enet5>; -+ dma-coherent; -+ fpmevt-sel = <3>; ++ ++ sb_3v3: regulator-sb3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "MC34717-3.3VSB"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; + }; +}; + ---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi -@@ -1,27 +1,28 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ FMan v3 10g port #0 device tree - * - * Copyright 2012-2015 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - fman@1a00000 { - fman0_rx_0x10: port@90000 { - cell-index = <0x10>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - fsl,fman-10g-port; - }; - - fman0_tx_0x30: port@b0000 { - cell-index = <0x30>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - fsl,fman-10g-port; -+ fsl,qman-channel-id = <0x800>; - }; - -- ethernet@f0000 { -+ mac9: ethernet@f0000 { - cell-index = <0x8>; - compatible = "fsl,fman-memac"; - reg = <0xf0000 0x1000>; -@@ -29,7 +30,7 @@ fman@1a00000 { - pcsphy-handle = <&pcsphy6>; - }; - -- mdio@f1000 { -+ mdio9: mdio@f1000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; ---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi -@@ -1,27 +1,28 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ FMan v3 10g port #1 device tree - * - * Copyright 2012-2015 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - fman@1a00000 { - fman0_rx_0x11: port@91000 { - cell-index = <0x11>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx"; - reg = <0x91000 0x1000>; - fsl,fman-10g-port; - }; - - fman0_tx_0x31: port@b1000 { - cell-index = <0x31>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx"; - reg = <0xb1000 0x1000>; - fsl,fman-10g-port; -+ fsl,qman-channel-id = <0x801>; - }; - -- ethernet@f2000 { -+ mac10: ethernet@f2000 { - cell-index = <0x9>; - compatible = "fsl,fman-memac"; - reg = <0xf2000 0x1000>; -@@ -29,7 +30,7 @@ fman@1a00000 { - pcsphy-handle = <&pcsphy7>; - }; - -- mdio@f3000 { -+ mdio10: mdio@f3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; ---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi -@@ -1,22 +1,23 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ FMan v3 1g port #0 device tree - * - * Copyright 2012-2015 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - fman@1a00000 { - fman0_rx_0x08: port@88000 { - cell-index = <0x8>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; - reg = <0x88000 0x1000>; - }; - - fman0_tx_0x28: port@a8000 { - cell-index = <0x28>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; - reg = <0xa8000 0x1000>; -+ fsl,qman-channel-id = <0x802>; - }; - - ethernet@e0000 { ---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi -@@ -1,22 +1,23 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ FMan v3 1g port #1 device tree - * - * Copyright 2012-2015 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - fman@1a00000 { - fman0_rx_0x09: port@89000 { - cell-index = <0x9>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; - reg = <0x89000 0x1000>; - }; - - fman0_tx_0x29: port@a9000 { - cell-index = <0x29>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; - reg = <0xa9000 0x1000>; -+ fsl,qman-channel-id = <0x803>; - }; - - ethernet@e2000 { ---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi -@@ -1,22 +1,23 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ FMan v3 1g port #2 device tree - * - * Copyright 2012-2015 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - fman@1a00000 { - fman0_rx_0x0a: port@8a000 { - cell-index = <0xa>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; - reg = <0x8a000 0x1000>; - }; - - fman0_tx_0x2a: port@aa000 { - cell-index = <0x2a>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; - reg = <0xaa000 0x1000>; -+ fsl,qman-channel-id = <0x804>; - }; - - ethernet@e4000 { ---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi -@@ -1,22 +1,23 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ FMan v3 1g port #3 device tree - * - * Copyright 2012-2015 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - fman@1a00000 { - fman0_rx_0x0b: port@8b000 { - cell-index = <0xb>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; - reg = <0x8b000 0x1000>; - }; - - fman0_tx_0x2b: port@ab000 { - cell-index = <0x2b>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; - reg = <0xab000 0x1000>; -+ fsl,qman-channel-id = <0x805>; - }; - - ethernet@e6000 { ---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi -@@ -1,22 +1,23 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ FMan v3 1g port #4 device tree - * - * Copyright 2012-2015 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - fman@1a00000 { - fman0_rx_0x0c: port@8c000 { - cell-index = <0xc>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; - reg = <0x8c000 0x1000>; - }; - - fman0_tx_0x2c: port@ac000 { - cell-index = <0x2c>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; - reg = <0xac000 0x1000>; -+ fsl,qman-channel-id = <0x806>; - }; - - ethernet@e8000 { ---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi -@@ -1,22 +1,23 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ FMan v3 1g port #5 device tree - * - * Copyright 2012-2015 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - fman@1a00000 { - fman0_rx_0x0d: port@8d000 { - cell-index = <0xd>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; - reg = <0x8d000 0x1000>; - }; - - fman0_tx_0x2d: port@ad000 { - cell-index = <0x2d>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; - reg = <0xad000 0x1000>; -+ fsl,qman-channel-id = <0x807>; - }; - - ethernet@ea000 { ++&crypto { ++ status = "okay"; ++}; ++ ++&emdio1 { ++ status = "okay"; ++}; ++ ++&emdio2 { ++ status = "okay"; ++}; ++ ++&esdhc0 { ++ sd-uhs-sdr104; ++ sd-uhs-sdr50; ++ sd-uhs-sdr25; ++ sd-uhs-sdr12; ++ status = "okay"; ++}; ++ ++&esdhc1 { ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ bus-width = <8>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ i2c-mux@77 { ++ compatible = "nxp,pca9547"; ++ reg = <0x77>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ i2c@2 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x2>; ++ ++ power-monitor@40 { ++ compatible = "ti,ina220"; ++ reg = <0x40>; ++ shunt-resistor = <1000>; ++ }; ++ }; ++ ++ i2c@3 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x3>; ++ ++ temperature-sensor@4c { ++ compatible = "nxp,sa56004"; ++ reg = <0x4c>; ++ vcc-supply = <&sb_3v3>; ++ }; ++ ++ temperature-sensor@4d { ++ compatible = "nxp,sa56004"; ++ reg = <0x4d>; ++ vcc-supply = <&sb_3v3>; ++ }; ++ }; ++ }; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ ++ rtc@51 { ++ compatible = "nxp,pcf2129"; ++ reg = <0x51>; ++ // IRQ10_B ++ interrupts = <0 150 0x4>; ++ }; ++}; ++ ++&fspi { ++ status = "okay"; ++ nxp,fspi-has-second-chip; ++ flash0: mt35xu512aba@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "micron,m25p80"; ++ m25p,fast-read; ++ spi-max-frequency = <50000000>; ++ reg = <0>; ++ /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ ++ spi-rx-bus-width = <8>; ++ spi-tx-bus-width = <1>; ++ }; ++ ++ flash1: mt35xu512aba@1 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "micron,m25p80"; ++ m25p,fast-read; ++ spi-max-frequency = <50000000>; ++ reg = <1>; ++ /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ ++ spi-rx-bus-width = <8>; ++ spi-tx-bus-width = <1>; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; ++}; ++ ++&usb0 { ++ status = "okay"; ++}; ++ ++&usb1 { ++ status = "okay"; ++}; ++ ++&emdio1 { ++ rgmii_phy1: ethernet-phy@1 { ++ /* AR8035 PHY - "compatible" property not strictly needed */ ++ compatible = "ethernet-phy-id004d.d072"; ++ reg = <0x1>; ++ /* Poll mode - no "interrupts" property defined */ ++ }; ++ rgmii_phy2: ethernet-phy@2 { ++ /* AR8035 PHY - "compatible" property not strictly needed */ ++ compatible = "ethernet-phy-id004d.d072"; ++ reg = <0x2>; ++ /* Poll mode - no "interrupts" property defined */ ++ }; ++ aquantia_phy1: ethernet-phy@4 { ++ /* AQR107 PHY - "compatible" property not strictly needed */ ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ reg = <0x4>; ++ /* Poll mode - no "interrupts" property defined */ ++ }; ++ aquantia_phy2: ethernet-phy@5 { ++ /* AQR107 PHY - "compatible" property not strictly needed */ ++ compatible = "ethernet-phy-ieee802.3-c45"; ++ reg = <0x5>; ++ /* Poll mode - no "interrupts" property defined */ ++ }; ++}; ++ ++&emdio2 { ++ inphi_phy: ethernet-phy@0 { ++ compatible = "ethernet-phy-id0210.7440"; ++ reg = <0x0>; ++ }; ++}; ++ ++&dpmac3 { ++ phy-handle = <&aquantia_phy1>; ++ phy-connection-type = "xgmii"; ++}; ++ ++&dpmac4 { ++ phy-handle = <&aquantia_phy2>; ++ phy-connection-type = "xgmii"; ++}; ++ ++&dpmac5 { ++ phy-handle = <&inphi_phy>; ++}; ++ ++&dpmac6 { ++ phy-handle = <&inphi_phy>; ++}; ++ ++&dpmac17 { ++ phy-handle = <&rgmii_phy1>; ++ phy-connection-type = "rgmii-id"; ++}; ++ ++&dpmac18 { ++ phy-handle = <&rgmii_phy2>; ++ phy-connection-type = "rgmii-id"; ++}; ++ ++&sata0 { ++ status = "okay"; ++}; ++ ++&sata1 { ++ status = "okay"; ++}; ++ ++&sata2 { ++ status = "okay"; ++}; ++ ++&sata3 { ++ status = "okay"; ++}; +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +@@ -0,0 +1,1318 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++// ++// Device Tree Include file for Layerscape-LX2160A family SoC. ++// ++// Copyright 2018 NXP ++ ++#include ++#include ++ ++/memreserve/ 0x80000000 0x00010000; ++ ++/ { ++ compatible = "fsl,lx2160a"; ++ interrupt-parent = <&gic>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ // 8 clusters having 2 Cortex-A72 cores each ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x0>; ++ clocks = <&clockgen 1 0>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster0_l2>; ++ }; ++ ++ cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x1>; ++ clocks = <&clockgen 1 0>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster0_l2>; ++ }; ++ ++ cpu@100 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x100>; ++ clocks = <&clockgen 1 1>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster1_l2>; ++ }; ++ ++ cpu@101 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x101>; ++ clocks = <&clockgen 1 1>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster1_l2>; ++ }; ++ ++ cpu@200 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x200>; ++ clocks = <&clockgen 1 2>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster2_l2>; ++ }; ++ ++ cpu@201 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x201>; ++ clocks = <&clockgen 1 2>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster2_l2>; ++ }; ++ ++ cpu@300 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x300>; ++ clocks = <&clockgen 1 3>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster3_l2>; ++ }; ++ ++ cpu@301 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x301>; ++ clocks = <&clockgen 1 3>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster3_l2>; ++ }; ++ ++ cpu@400 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x400>; ++ clocks = <&clockgen 1 4>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster4_l2>; ++ }; ++ ++ cpu@401 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x401>; ++ clocks = <&clockgen 1 4>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster4_l2>; ++ }; ++ ++ cpu@500 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x500>; ++ clocks = <&clockgen 1 5>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster5_l2>; ++ }; ++ ++ cpu@501 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x501>; ++ clocks = <&clockgen 1 5>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster5_l2>; ++ }; ++ ++ cpu@600 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x600>; ++ clocks = <&clockgen 1 6>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster6_l2>; ++ }; ++ ++ cpu@601 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x601>; ++ clocks = <&clockgen 1 6>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster6_l2>; ++ }; ++ ++ cpu@700 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x700>; ++ clocks = <&clockgen 1 7>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster7_l2>; ++ }; ++ ++ cpu@701 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ enable-method = "psci"; ++ reg = <0x701>; ++ clocks = <&clockgen 1 7>; ++ d-cache-size = <0x8000>; ++ d-cache-line-size = <64>; ++ d-cache-sets = <128>; ++ i-cache-size = <0xC000>; ++ i-cache-line-size = <64>; ++ i-cache-sets = <192>; ++ next-level-cache = <&cluster7_l2>; ++ }; ++ ++ cluster0_l2: l2-cache0 { ++ compatible = "cache"; ++ cache-size = <0x100000>; ++ cache-line-size = <64>; ++ cache-sets = <1024>; ++ cache-level = <2>; ++ }; ++ ++ cluster1_l2: l2-cache1 { ++ compatible = "cache"; ++ cache-size = <0x100000>; ++ cache-line-size = <64>; ++ cache-sets = <1024>; ++ cache-level = <2>; ++ }; ++ ++ cluster2_l2: l2-cache2 { ++ compatible = "cache"; ++ cache-size = <0x100000>; ++ cache-line-size = <64>; ++ cache-sets = <1024>; ++ cache-level = <2>; ++ }; ++ ++ cluster3_l2: l2-cache3 { ++ compatible = "cache"; ++ cache-size = <0x100000>; ++ cache-line-size = <64>; ++ cache-sets = <1024>; ++ cache-level = <2>; ++ }; ++ ++ cluster4_l2: l2-cache4 { ++ compatible = "cache"; ++ cache-size = <0x100000>; ++ cache-line-size = <64>; ++ cache-sets = <1024>; ++ cache-level = <2>; ++ }; ++ ++ cluster5_l2: l2-cache5 { ++ compatible = "cache"; ++ cache-size = <0x100000>; ++ cache-line-size = <64>; ++ cache-sets = <1024>; ++ cache-level = <2>; ++ }; ++ ++ cluster6_l2: l2-cache6 { ++ compatible = "cache"; ++ cache-size = <0x100000>; ++ cache-line-size = <64>; ++ cache-sets = <1024>; ++ cache-level = <2>; ++ }; ++ ++ cluster7_l2: l2-cache7 { ++ compatible = "cache"; ++ cache-size = <0x100000>; ++ cache-line-size = <64>; ++ cache-sets = <1024>; ++ cache-level = <2>; ++ }; ++ }; ++ ++ gic: interrupt-controller@6000000 { ++ compatible = "arm,gic-v3"; ++ reg = <0x0 0x06000000 0 0x10000>, // GIC Dist ++ <0x0 0x06200000 0 0x200000>, // GICR (RD_base + ++ // SGI_base) ++ <0x0 0x0c0c0000 0 0x2000>, // GICC ++ <0x0 0x0c0d0000 0 0x1000>, // GICH ++ <0x0 0x0c0e0000 0 0x20000>; // GICV ++ #interrupt-cells = <3>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ interrupt-controller; ++ interrupts = ; ++ ++ its: gic-its@6020000 { ++ compatible = "arm,gic-v3-its"; ++ msi-controller; ++ reg = <0x0 0x6020000 0 0x20000>; ++ }; ++ }; ++ ++ timer { ++ compatible = "arm,armv8-timer"; ++ interrupts = , ++ , ++ , ++ ; ++ }; ++ ++ pmu { ++ compatible = "arm,cortex-a72-pmu"; ++ interrupts = ; ++ }; ++ ++ psci { ++ compatible = "arm,psci-0.2"; ++ method = "smc"; ++ }; ++ ++ memory@80000000 { ++ // DRAM space - 1, size : 2 GB DRAM ++ device_type = "memory"; ++ reg = <0x00000000 0x80000000 0 0x80000000>; ++ }; ++ ++ ddr1: memory-controller@1080000 { ++ compatible = "fsl,qoriq-memory-controller"; ++ reg = <0x0 0x1080000 0x0 0x1000>; ++ interrupts = ; ++ little-endian; ++ }; ++ ++ ddr2: memory-controller@1090000 { ++ compatible = "fsl,qoriq-memory-controller"; ++ reg = <0x0 0x1090000 0x0 0x1000>; ++ interrupts = ; ++ little-endian; ++ }; ++ ++ sysclk: sysclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <100000000>; ++ clock-output-names = "sysclk"; ++ }; ++ ++ soc { ++ compatible = "simple-bus"; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; ++ ++ crypto: crypto@8000000 { ++ compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; ++ fsl,sec-era = <10>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0x0 0x00 0x8000000 0x100000>; ++ reg = <0x00 0x8000000 0x0 0x100000>; ++ interrupts = ; ++ dma-coherent; ++ status = "disabled"; ++ ++ sec_jr0: jr@10000 { ++ compatible = "fsl,sec-v5.0-job-ring", ++ "fsl,sec-v4.0-job-ring"; ++ reg = <0x10000 0x10000>; ++ interrupts = ; ++ }; ++ ++ sec_jr1: jr@20000 { ++ compatible = "fsl,sec-v5.0-job-ring", ++ "fsl,sec-v4.0-job-ring"; ++ reg = <0x20000 0x10000>; ++ interrupts = ; ++ }; ++ ++ sec_jr2: jr@30000 { ++ compatible = "fsl,sec-v5.0-job-ring", ++ "fsl,sec-v4.0-job-ring"; ++ reg = <0x30000 0x10000>; ++ interrupts = ; ++ }; ++ ++ sec_jr3: jr@40000 { ++ compatible = "fsl,sec-v5.0-job-ring", ++ "fsl,sec-v4.0-job-ring"; ++ reg = <0x40000 0x10000>; ++ interrupts = ; ++ }; ++ }; ++ ++ clockgen: clock-controller@1300000 { ++ compatible = "fsl,lx2160a-clockgen"; ++ reg = <0 0x1300000 0 0xa0000>; ++ #clock-cells = <2>; ++ clocks = <&sysclk>; ++ }; ++ ++ dcfg: syscon@1e00000 { ++ compatible = "fsl,lx2160a-dcfg", "syscon"; ++ reg = <0x0 0x1e00000 0x0 0x10000>; ++ little-endian; ++ }; ++ ++ /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */ ++ emdio1: mdio@8b96000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8b96000 0x0 0x1000>; ++ interrupts = ; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ little-endian; /* force the driver in LE mode */ ++ status = "disabled"; ++ }; ++ ++ /* WRIOP0: 0x8b8_0000, E-MDIO2: 0x1_7000 */ ++ emdio2: mdio@8b97000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8b97000 0x0 0x1000>; ++ interrupts = ; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ little-endian; /* force the driver in LE mode */ ++ status = "disabled"; ++ }; ++ ++ pcs_mdio1: mdio@0x8c07000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8c07000 0x0 0x1000>; ++ device_type = "mdio"; ++ little-endian; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ pcs_mdio2: mdio@0x8c0b000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8c0b000 0x0 0x1000>; ++ device_type = "mdio"; ++ little-endian; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ pcs_mdio3: mdio@0x8c0f000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8c0f000 0x0 0x1000>; ++ device_type = "mdio"; ++ little-endian; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ pcs_mdio4: mdio@0x8c13000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8c13000 0x0 0x1000>; ++ device_type = "mdio"; ++ little-endian; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ pcs_mdio5: mdio@0x8c17000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8c17000 0x0 0x1000>; ++ device_type = "mdio"; ++ little-endian; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ pcs_mdio6: mdio@0x8c1b000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8c1b000 0x0 0x1000>; ++ device_type = "mdio"; ++ little-endian; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ pcs_mdio7: mdio@0x8c1f000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8c1f000 0x0 0x1000>; ++ device_type = "mdio"; ++ little-endian; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ pcs_mdio8: mdio@0x8c23000 { ++ compatible = "fsl,fman-memac-mdio"; ++ reg = <0x0 0x8c23000 0x0 0x1000>; ++ device_type = "mdio"; ++ little-endian; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ serdes1: serdes@1ea0000 { ++ compatible = "fsl,serdes-28g"; ++ reg = <0x0 0x1ea0000 0 0x00002000>; ++ little-endian; ++ }; ++ ++ i2c0: i2c@2000000 { ++ compatible = "fsl,vf610-i2c"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2000000 0x0 0x10000>; ++ interrupts = ; ++ clock-names = "i2c"; ++ clocks = <&clockgen 4 7>; ++ scl-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>; ++ status = "disabled"; ++ }; ++ ++ i2c1: i2c@2010000 { ++ compatible = "fsl,vf610-i2c"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2010000 0x0 0x10000>; ++ interrupts = ; ++ clock-names = "i2c"; ++ clocks = <&clockgen 4 7>; ++ status = "disabled"; ++ }; ++ ++ i2c2: i2c@2020000 { ++ compatible = "fsl,vf610-i2c"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2020000 0x0 0x10000>; ++ interrupts = ; ++ clock-names = "i2c"; ++ clocks = <&clockgen 4 7>; ++ status = "disabled"; ++ }; ++ ++ i2c3: i2c@2030000 { ++ compatible = "fsl,vf610-i2c"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2030000 0x0 0x10000>; ++ interrupts = ; ++ clock-names = "i2c"; ++ clocks = <&clockgen 4 7>; ++ status = "disabled"; ++ }; ++ ++ i2c4: i2c@2040000 { ++ compatible = "fsl,vf610-i2c"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2040000 0x0 0x10000>; ++ interrupts = ; ++ clock-names = "i2c"; ++ clocks = <&clockgen 4 7>; ++ scl-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>; ++ status = "disabled"; ++ }; ++ ++ i2c5: i2c@2050000 { ++ compatible = "fsl,vf610-i2c"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2050000 0x0 0x10000>; ++ interrupts = ; ++ clock-names = "i2c"; ++ clocks = <&clockgen 4 7>; ++ status = "disabled"; ++ }; ++ ++ i2c6: i2c@2060000 { ++ compatible = "fsl,vf610-i2c"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2060000 0x0 0x10000>; ++ interrupts = ; ++ clock-names = "i2c"; ++ clocks = <&clockgen 4 7>; ++ status = "disabled"; ++ }; ++ ++ i2c7: i2c@2070000 { ++ compatible = "fsl,vf610-i2c"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2070000 0x0 0x10000>; ++ interrupts = ; ++ clock-names = "i2c"; ++ clocks = <&clockgen 4 7>; ++ status = "disabled"; ++ }; ++ ++ dspi0: spi@2100000 { ++ compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2100000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clockgen 4 7>; ++ clock-names = "dspi"; ++ spi-num-chipselects = <5>; ++ bus-num = <0>; ++ status = "disabled"; ++ }; ++ ++ dspi1: spi@2110000 { ++ compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2110000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clockgen 4 7>; ++ clock-names = "dspi"; ++ spi-num-chipselects = <5>; ++ bus-num = <1>; ++ status = "disabled"; ++ }; ++ ++ dspi2: spi@2120000 { ++ compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x2120000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clockgen 4 7>; ++ clock-names = "dspi"; ++ spi-num-chipselects = <5>; ++ bus-num = <2>; ++ status = "disabled"; ++ }; ++ ++ esdhc0: esdhc@2140000 { ++ compatible = "fsl,esdhc"; ++ reg = <0x0 0x2140000 0x0 0x10000>; ++ interrupts = <0 28 0x4>; /* Level high type */ ++ clocks = <&clockgen 4 1>; ++ voltage-ranges = <1800 1800 3300 3300>; ++ sdhci,auto-cmd12; ++ little-endian; ++ bus-width = <4>; ++ status = "disabled"; ++ }; ++ ++ esdhc1: esdhc@2150000 { ++ compatible = "fsl,esdhc"; ++ reg = <0x0 0x2150000 0x0 0x10000>; ++ interrupts = <0 63 0x4>; /* Level high type */ ++ clocks = <&clockgen 4 1>; ++ voltage-ranges = <1800 1800 3300 3300>; ++ sdhci,auto-cmd12; ++ broken-cd; ++ little-endian; ++ bus-width = <4>; ++ status = "disabled"; ++ }; ++ ++ uart0: serial@21c0000 { ++ compatible = "arm,sbsa-uart","arm,pl011"; ++ reg = <0x0 0x21c0000 0x0 0x1000>; ++ interrupts = ; ++ current-speed = <115200>; ++ status = "disabled"; ++ }; ++ ++ uart1: serial@21d0000 { ++ compatible = "arm,sbsa-uart","arm,pl011"; ++ reg = <0x0 0x21d0000 0x0 0x1000>; ++ interrupts = ; ++ current-speed = <115200>; ++ status = "disabled"; ++ }; ++ ++ uart2: serial@21e0000 { ++ compatible = "arm,sbsa-uart","arm,pl011"; ++ reg = <0x0 0x21e0000 0x0 0x1000>; ++ interrupts = ; ++ current-speed = <115200>; ++ status = "disabled"; ++ }; ++ ++ uart3: serial@21f0000 { ++ compatible = "arm,sbsa-uart","arm,pl011"; ++ reg = <0x0 0x21f0000 0x0 0x1000>; ++ interrupts = ; ++ current-speed = <115200>; ++ status = "disabled"; ++ }; ++ ++ gpio0: gpio@2300000 { ++ compatible = "fsl,qoriq-gpio"; ++ reg = <0x0 0x2300000 0x0 0x10000>; ++ interrupts = ; ++ gpio-controller; ++ little-endian; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ }; ++ ++ gpio1: gpio@2310000 { ++ compatible = "fsl,qoriq-gpio"; ++ reg = <0x0 0x2310000 0x0 0x10000>; ++ interrupts = ; ++ gpio-controller; ++ little-endian; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ }; ++ ++ gpio2: gpio@2320000 { ++ compatible = "fsl,qoriq-gpio"; ++ reg = <0x0 0x2320000 0x0 0x10000>; ++ interrupts = ; ++ gpio-controller; ++ little-endian; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ }; ++ ++ gpio3: gpio@2330000 { ++ compatible = "fsl,qoriq-gpio"; ++ reg = <0x0 0x2330000 0x0 0x10000>; ++ interrupts = ; ++ gpio-controller; ++ little-endian; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ }; ++ ++ watchdog@23a0000 { ++ compatible = "arm,sbsa-gwdt"; ++ reg = <0x0 0x23a0000 0 0x1000>, ++ <0x0 0x2390000 0 0x1000>; ++ interrupts = ; ++ timeout-sec = <30>; ++ }; ++ ++ ftm0: ftm0@2800000 { ++ compatible = "fsl,ftm-alarm", "fsl,lx2160a-ftm-alarm"; ++ reg = <0x0 0x2800000 0x0 0x10000>, ++ <0x0 0x1e34050 0x0 0x4>; ++ reg-names = "ftm", "FlexTimer1"; ++ interrupts = <0 44 0x4>; ++ status = "okay"; ++ }; ++ ++ usb0: usb@3100000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x3100000 0x0 0x10000>; ++ interrupts = ; ++ dr_mode = "host"; ++ snps,quirk-frame-length-adjustment = <0x20>; ++ snps,dis_rxdet_inp3_quirk; ++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; ++ status = "disabled"; ++ }; ++ ++ usb1: usb@3110000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0x3110000 0x0 0x10000>; ++ interrupts = ; ++ dr_mode = "host"; ++ snps,quirk-frame-length-adjustment = <0x20>; ++ snps,dis_rxdet_inp3_quirk; ++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ snps,host-vbus-glitches; ++ status = "disabled"; ++ }; ++ ++ smmu: iommu@5000000 { ++ compatible = "arm,mmu-500"; ++ reg = <0 0x5000000 0 0x800000>; ++ #iommu-cells = <1>; ++ #global-interrupts = <14>; ++ // global secure fault ++ interrupts = , ++ // combined secure ++ , ++ // global non-secure fault ++ , ++ // combined non-secure ++ , ++ // performance counter interrupts 0-9 ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ // per context interrupt, 64 interrupts ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; ++ dma-coherent; ++ }; ++ ++ fsl_mc: fsl-mc@80c000000 { ++ compatible = "fsl,qoriq-mc"; ++ reg = <0x00000008 0x0c000000 0 0x40>, ++ <0x00000000 0x08340000 0 0x40000>; ++ msi-parent = <&its>; ++ /* iommu-map property is fixed up by u-boot */ ++ iommu-map = <0 &smmu 0 0>; ++ dma-coherent; ++ #address-cells = <3>; ++ #size-cells = <1>; ++ ++ /* ++ * Region type 0x0 - MC portals ++ * Region type 0x1 - QBMAN portals ++ */ ++ ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000 ++ 0x1 0x0 0x0 0x8 0x18000000 0x8000000>; ++ ++ /* ++ * Define the maximum number of MACs present on the SoC. ++ */ ++ dpmacs { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ dpmac1: dpmac@1 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x1>; ++ }; ++ ++ dpmac2: dpmac@2 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x2>; ++ }; ++ ++ dpmac3: dpmac@3 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x3>; ++ }; ++ ++ dpmac4: dpmac@4 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x4>; ++ }; ++ ++ dpmac5: dpmac@5 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x5>; ++ }; ++ ++ dpmac6: dpmac@6 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x6>; ++ }; ++ ++ dpmac7: dpmac@7 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x7>; ++ }; ++ ++ dpmac8: dpmac@8 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x8>; ++ }; ++ ++ dpmac9: dpmac@9 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x9>; ++ }; ++ ++ dpmac10: dpmac@a { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0xa>; ++ }; ++ ++ dpmac11: dpmac@b { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0xb>; ++ }; ++ ++ dpmac12: dpmac@c { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0xc>; ++ }; ++ ++ dpmac13: dpmac@d { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0xd>; ++ }; ++ ++ dpmac14: dpmac@e { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0xe>; ++ }; ++ ++ dpmac15: dpmac@f { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0xf>; ++ }; ++ ++ dpmac16: dpmac@10 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x10>; ++ }; ++ ++ dpmac17: dpmac@11 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x11>; ++ }; ++ ++ dpmac18: dpmac@12 { ++ compatible = "fsl,qoriq-mc-dpmac"; ++ reg = <0x12>; ++ }; ++ }; ++ }; ++ ++ fspi: flexspi@20c0000 { ++ status = "disabled"; ++ compatible = "nxp,lx2160a-fspi"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0x20c0000 0x0 0x10000>, ++ <0x0 0x20000000 0x0 0x10000000>; ++ reg-names = "FSPI", "FSPI-memory"; ++ interrupts = <0 25 0x4>; /* Level high type */ ++ clocks = <&clockgen 4 3>, <&clockgen 4 3>; ++ clock-names = "fspi_en", "fspi"; ++ }; ++ ++ sata0: sata@3200000 { ++ status = "disabled"; ++ compatible = "fsl,lx2160a-ahci"; ++ reg = <0x0 0x3200000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clockgen 4 3>; ++ dma-coherent; ++ }; ++ ++ sata1: sata@3210000 { ++ status = "disabled"; ++ compatible = "fsl,lx2160a-ahci"; ++ reg = <0x0 0x3210000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clockgen 4 3>; ++ dma-coherent; ++ }; ++ ++ sata2: sata@3220000 { ++ status = "disabled"; ++ compatible = "fsl,lx2160a-ahci"; ++ reg = <0x0 0x3220000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clockgen 4 3>; ++ dma-coherent; ++ }; ++ ++ sata3: sata@3230000 { ++ status = "disabled"; ++ compatible = "fsl,lx2160a-ahci"; ++ reg = <0x0 0x3230000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clockgen 4 3>; ++ dma-coherent; ++ }; ++ ++ pcie@3400000 { ++ compatible = "fsl,lx2160a-pcie"; ++ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ ++ 0x80 0x00000000 0x0 0x00001000>; /* configuration space */ ++ reg-names = "csr_axi_slave", "config_axi_slave"; ++ interrupts = , /* AER interrupt */ ++ , /* PME interrupt */ ++ ; /* controller interrupt */ ++ interrupt-names = "aer", "pme", "intr"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ dma-coherent; ++ apio-wins = <8>; ++ ppio-wins = <8>; ++ bus-range = <0x0 0xff>; ++ ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ ++ msi-parent = <&its>; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 7>; ++ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ pcie_ep@3400000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03400000 0x0 0x00100000 ++ 0x80 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ status = "disabled"; ++ }; ++ ++ pcie@3500000 { ++ compatible = "fsl,lx2160a-pcie"; ++ reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ ++ 0x88 0x00000000 0x0 0x00001000>; /* configuration space */ ++ reg-names = "csr_axi_slave", "config_axi_slave"; ++ interrupts = , /* AER interrupt */ ++ , /* PME interrupt */ ++ ; /* controller interrupt */ ++ interrupt-names = "aer", "pme", "intr"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ dma-coherent; ++ apio-wins = <8>; ++ ppio-wins = <8>; ++ bus-range = <0x0 0xff>; ++ ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ ++ msi-parent = <&its>; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 7>; ++ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ pcie_ep@3500000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03500000 0x0 0x00100000 ++ 0x88 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ status = "disabled"; ++ }; ++ ++ pcie@3600000 { ++ compatible = "fsl,lx2160a-pcie"; ++ reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ ++ 0x90 0x00000000 0x0 0x00001000>; /* configuration space */ ++ reg-names = "csr_axi_slave", "config_axi_slave"; ++ interrupts = , /* AER interrupt */ ++ , /* PME interrupt */ ++ ; /* controller interrupt */ ++ interrupt-names = "aer", "pme", "intr"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ dma-coherent; ++ apio-wins = <8>; ++ ppio-wins = <8>; ++ bus-range = <0x0 0xff>; ++ ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ ++ msi-parent = <&its>; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 7>; ++ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ pcie_ep@3600000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03600000 0x0 0x00100000 ++ 0x90 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ max-functions = <2>; ++ status = "disabled"; ++ }; ++ ++ pcie@3700000 { ++ compatible = "fsl,lx2160a-pcie"; ++ reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ ++ 0x98 0x00000000 0x0 0x00001000>; /* configuration space */ ++ reg-names = "csr_axi_slave", "config_axi_slave"; ++ interrupts = , /* AER interrupt */ ++ , /* PME interrupt */ ++ ; /* controller interrupt */ ++ interrupt-names = "aer", "pme", "intr"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ dma-coherent; ++ apio-wins = <8>; ++ ppio-wins = <8>; ++ bus-range = <0x0 0xff>; ++ ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ ++ msi-parent = <&its>; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 7>; ++ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ pcie_ep@3700000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03700000 0x0 0x00100000 ++ 0x98 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ status = "disabled"; ++ }; ++ ++ pcie@3800000 { ++ compatible = "fsl,lx2160a-pcie"; ++ reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */ ++ 0xa0 0x00000000 0x0 0x00001000>; /* configuration space */ ++ reg-names = "csr_axi_slave", "config_axi_slave"; ++ interrupts = , /* AER interrupt */ ++ , /* PME interrupt */ ++ ; /* controller interrupt */ ++ interrupt-names = "aer", "pme", "intr"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ dma-coherent; ++ apio-wins = <8>; ++ ppio-wins = <8>; ++ bus-range = <0x0 0xff>; ++ ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ ++ msi-parent = <&its>; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 7>; ++ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ pcie_ep@3800000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03800000 0x0 0x00100000 ++ 0xa0 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ max-functions = <2>; ++ status = "disabled"; ++ }; ++ ++ pcie@3900000 { ++ compatible = "fsl,lx2160a-pcie"; ++ reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */ ++ 0xa8 0x00000000 0x0 0x00001000>; /* configuration space */ ++ reg-names = "csr_axi_slave", "config_axi_slave"; ++ interrupts = , /* AER interrupt */ ++ , /* PME interrupt */ ++ ; /* controller interrupt */ ++ interrupt-names = "aer", "pme", "intr"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ dma-coherent; ++ apio-wins = <8>; ++ ppio-wins = <8>; ++ bus-range = <0x0 0xff>; ++ ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ ++ msi-parent = <&its>; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 7>; ++ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; ++ }; ++ ++ pcie_ep@3900000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03900000 0x0 0x00100000 ++ 0xa8 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ status = "disabled"; ++ }; ++ ++ }; ++ ++ firmware { ++ optee { ++ compatible = "linaro,optee-tz"; ++ method = "smc"; ++ }; ++ }; ++}; --- /dev/null -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi -@@ -0,0 +1,47 @@ ++++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi +@@ -0,0 +1,99 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Device Tree Include file for Thermal Monitor Unit. ++ * ++ * Copyright 2018 NXP ++ * ++ * Tang Yuantian ++ * ++ */ ++ ++&thermal_zones { ++ thermal-zone0 { ++ cooling-maps { ++ map1 { ++ trip = <&alert0>; ++ cooling-device = ++ <&cooling_map1 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone1 { ++ cooling-maps { ++ map1 { ++ trip = <&alert1>; ++ cooling-device = ++ <&cooling_map1 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone2 { ++ cooling-maps { ++ map1 { ++ trip = <&alert2>; ++ cooling-device = ++ <&cooling_map1 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone3 { ++ cooling-maps { ++ map1 { ++ trip = <&alert3>; ++ cooling-device = ++ <&cooling_map1 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone4 { ++ cooling-maps { ++ map1 { ++ trip = <&alert4>; ++ cooling-device = ++ <&cooling_map1 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone5 { ++ cooling-maps { ++ map1 { ++ trip = <&alert5>; ++ cooling-device = ++ <&cooling_map1 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone6 { ++ cooling-maps { ++ map1 { ++ trip = <&alert6>; ++ cooling-device = ++ <&cooling_map1 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone7 { ++ cooling-maps { ++ map1 { ++ trip = <&alert7>; ++ cooling-device = ++ <&cooling_map1 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi +@@ -0,0 +1,99 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Device Tree Include file for Thermal Monitor Unit. ++ * ++ * Copyright 2018 NXP ++ * ++ * Tang Yuantian ++ * ++ */ ++ ++&thermal_zones { ++ thermal-zone0 { ++ cooling-maps { ++ map2 { ++ trip = <&alert0>; ++ cooling-device = ++ <&cooling_map2 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone1 { ++ cooling-maps { ++ map2 { ++ trip = <&alert1>; ++ cooling-device = ++ <&cooling_map2 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone2 { ++ cooling-maps { ++ map2 { ++ trip = <&alert2>; ++ cooling-device = ++ <&cooling_map2 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone3 { ++ cooling-maps { ++ map2 { ++ trip = <&alert3>; ++ cooling-device = ++ <&cooling_map2 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone4 { ++ cooling-maps { ++ map2 { ++ trip = <&alert4>; ++ cooling-device = ++ <&cooling_map2 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone5 { ++ cooling-maps { ++ map2 { ++ trip = <&alert5>; ++ cooling-device = ++ <&cooling_map2 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone6 { ++ cooling-maps { ++ map2 { ++ trip = <&alert6>; ++ cooling-device = ++ <&cooling_map2 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ thermal-zone7 { ++ cooling-maps { ++ map2 { ++ trip = <&alert7>; ++ cooling-device = ++ <&cooling_map2 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi +@@ -0,0 +1,99 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* -+ * QorIQ FMan v3 OH ports device tree ++ * Device Tree Include file for Thermal Monitor Unit. + * -+ * Copyright 2012-2015 Freescale Semiconductor Inc. ++ * Copyright 2018 NXP ++ * ++ * Tang Yuantian + * -+ * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + -+fman@1a00000 { -+ -+ fman0_oh1: port@82000 { -+ cell-index = <0>; -+ compatible = "fsl,fman-port-oh"; -+ reg = <0x82000 0x1000>; ++&thermal_zones { ++ thermal-zone0 { ++ cooling-maps { ++ map3 { ++ trip = <&alert0>; ++ cooling-device = ++ <&cooling_map3 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ fman0_oh2: port@83000 { -+ cell-index = <1>; -+ compatible = "fsl,fman-port-oh"; -+ reg = <0x83000 0x1000>; ++ thermal-zone1 { ++ cooling-maps { ++ map3 { ++ trip = <&alert1>; ++ cooling-device = ++ <&cooling_map3 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ fman0_oh3: port@84000 { -+ cell-index = <2>; -+ compatible = "fsl,fman-port-oh"; -+ reg = <0x84000 0x1000>; ++ thermal-zone2 { ++ cooling-maps { ++ map3 { ++ trip = <&alert2>; ++ cooling-device = ++ <&cooling_map3 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ fman0_oh4: port@85000 { -+ cell-index = <3>; -+ compatible = "fsl,fman-port-oh"; -+ reg = <0x85000 0x1000>; ++ thermal-zone3 { ++ cooling-maps { ++ map3 { ++ trip = <&alert3>; ++ cooling-device = ++ <&cooling_map3 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ fman0_oh5: port@86000 { -+ cell-index = <4>; -+ compatible = "fsl,fman-port-oh"; -+ reg = <0x86000 0x1000>; ++ thermal-zone4 { ++ cooling-maps { ++ map3 { ++ trip = <&alert4>; ++ cooling-device = ++ <&cooling_map3 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ fman0_oh6: port@87000 { -+ cell-index = <5>; -+ compatible = "fsl,fman-port-oh"; -+ reg = <0x87000 0x1000>; ++ thermal-zone5 { ++ cooling-maps { ++ map3 { ++ trip = <&alert5>; ++ cooling-device = ++ <&cooling_map3 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+}; ---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi -@@ -1,9 +1,9 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * QorIQ FMan v3 device tree - * - * Copyright 2012-2015 Freescale Semiconductor Inc. - * -- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - */ - - fman0: fman@1a00000 { -@@ -19,45 +19,95 @@ fman0: fman@1a00000 { - clock-names = "fmanclk"; - fsl,qman-channel-range = <0x800 0x10>; - -+ cc { -+ compatible = "fsl,fman-cc"; ++ thermal-zone6 { ++ cooling-maps { ++ map3 { ++ trip = <&alert6>; ++ cooling-device = ++ <&cooling_map3 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + - muram@0 { - compatible = "fsl,fman-muram"; - reg = <0x0 0x60000>; - }; - -+ bmi@80000 { -+ compatible = "fsl,fman-bmi"; -+ reg = <0x80000 0x400>; ++ thermal-zone7 { ++ cooling-maps { ++ map3 { ++ trip = <&alert7>; ++ cooling-device = ++ <&cooling_map3 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; ++}; +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi +@@ -0,0 +1,251 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Device Tree Include file for Thermal Monitor Unit. ++ * ++ * Copyright 2018 NXP ++ * ++ * Tang Yuantian ++ * ++ */ + -+ qmi@80400 { -+ compatible = "fsl,fman-qmi"; -+ reg = <0x80400 0x400>; ++thermal_zones: thermal-zones { ++ thermal_zone0: thermal-zone0 { ++ polling-delay-passive = <1000>; ++ polling-delay = <5000>; ++ thermal-sensors = <&tmu 0>; ++ status = "disabled"; ++ ++ trips { ++ alert0: alert0 { ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ crit0: crit0 { ++ temperature = <85000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&alert0>; ++ cooling-device = ++ <&cooling_map0 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + - fman0_oh_0x2: port@82000 { - cell-index = <0x2>; - compatible = "fsl,fman-v3-port-oh"; - reg = <0x82000 0x1000>; -+ fsl,qman-channel-id = <0x809>; - }; - - fman0_oh_0x3: port@83000 { - cell-index = <0x3>; - compatible = "fsl,fman-v3-port-oh"; - reg = <0x83000 0x1000>; -+ fsl,qman-channel-id = <0x80a>; - }; - - fman0_oh_0x4: port@84000 { - cell-index = <0x4>; - compatible = "fsl,fman-v3-port-oh"; - reg = <0x84000 0x1000>; -+ fsl,qman-channel-id = <0x80b>; - }; - - fman0_oh_0x5: port@85000 { - cell-index = <0x5>; - compatible = "fsl,fman-v3-port-oh"; - reg = <0x85000 0x1000>; -+ fsl,qman-channel-id = <0x80c>; - }; - - fman0_oh_0x6: port@86000 { - cell-index = <0x6>; - compatible = "fsl,fman-v3-port-oh"; - reg = <0x86000 0x1000>; -+ fsl,qman-channel-id = <0x80d>; - }; - - fman0_oh_0x7: port@87000 { - cell-index = <0x7>; - compatible = "fsl,fman-v3-port-oh"; - reg = <0x87000 0x1000>; -+ fsl,qman-channel-id = <0x80e>; ++ thermal-zone1 { ++ polling-delay-passive = <1000>; ++ polling-delay = <5000>; ++ thermal-sensors = <&tmu 1>; ++ status = "disabled"; ++ ++ trips { ++ alert1: alert1 { ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ crit1: crit1 { ++ temperature = <85000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&alert1>; ++ cooling-device = ++ <&cooling_map0 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ policer@c0000 { -+ compatible = "fsl,fman-policer"; -+ reg = <0xc0000 0x1000>; ++ thermal-zone2 { ++ polling-delay-passive = <1000>; ++ polling-delay = <5000>; ++ thermal-sensors = <&tmu 2>; ++ status = "disabled"; ++ ++ trips { ++ alert2: alert2 { ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ crit2: crit2 { ++ temperature = <85000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&alert2>; ++ cooling-device = ++ <&cooling_map0 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ keygen@c1000 { -+ compatible = "fsl,fman-keygen"; -+ reg = <0xc1000 0x1000>; ++ thermal-zone3 { ++ polling-delay-passive = <1000>; ++ polling-delay = <5000>; ++ thermal-sensors = <&tmu 3>; ++ status = "disabled"; ++ ++ trips { ++ alert3: alert3 { ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ crit3: crit3 { ++ temperature = <85000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&alert3>; ++ cooling-device = ++ <&cooling_map0 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ dma@c2000 { -+ compatible = "fsl,fman-dma"; -+ reg = <0xc2000 0x1000>; ++ thermal-zone4 { ++ polling-delay-passive = <1000>; ++ polling-delay = <5000>; ++ thermal-sensors = <&tmu 4>; ++ status = "disabled"; ++ ++ trips { ++ alert4: alert4 { ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ crit4: crit4 { ++ temperature = <85000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&alert4>; ++ cooling-device = ++ <&cooling_map0 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ fpm@c3000 { -+ compatible = "fsl,fman-fpm"; -+ reg = <0xc3000 0x1000>; ++ thermal-zone5 { ++ polling-delay-passive = <1000>; ++ polling-delay = <5000>; ++ thermal-sensors = <&tmu 5>; ++ status = "disabled"; ++ ++ trips { ++ alert5: alert5 { ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ crit5: crit5 { ++ temperature = <85000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&alert5>; ++ cooling-device = ++ <&cooling_map0 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ parser@c7000 { -+ compatible = "fsl,fman-parser"; -+ reg = <0xc7000 0x1000>; ++ thermal-zone6 { ++ polling-delay-passive = <1000>; ++ polling-delay = <5000>; ++ thermal-sensors = <&tmu 6>; ++ status = "disabled"; ++ ++ trips { ++ alert6: alert6 { ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ crit6: crit6 { ++ temperature = <85000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&alert6>; ++ cooling-device = ++ <&cooling_map0 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + -+ vsps@dc000 { -+ compatible = "fsl,fman-vsps"; -+ reg = <0xdc000 0x1000>; - }; - - mdio0: mdio@fc000 { -@@ -75,7 +125,7 @@ fman0: fman@1a00000 { - }; - - ptp_timer0: ptp-timer@fe000 { -- compatible = "fsl,fman-ptp-timer"; -+ compatible = "fsl,fman-ptp-timer", "fsl,fman-rtc"; - reg = <0xfe000 0x1000>; - }; - }; ++ thermal-zone7 { ++ polling-delay-passive = <1000>; ++ polling-delay = <5000>; ++ thermal-sensors = <&tmu 7>; ++ status = "disabled"; ++ ++ trips { ++ alert7: alert7 { ++ temperature = <75000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ crit7: crit7 { ++ temperature = <85000>; ++ hysteresis = <2000>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&alert7>; ++ cooling-device = ++ <&cooling_map0 THERMAL_NO_LIMIT ++ THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++}; --- /dev/null -+++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi -@@ -0,0 +1,38 @@ ++++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi +@@ -0,0 +1,55 @@ +/* -+ * QorIQ QMan SDK Portals device tree nodes ++ * QorIQ BMan SDK Portals device tree nodes + * + * Copyright 2011-2016 Freescale Semiconductor Inc. + * Copyright 2017 NXP @@ -6244,300 +10153,189 @@ Signed-off-by: Biwen Li + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + -+&qportals { -+ qman-fqids@0 { -+ compatible = "fsl,fqid-range"; -+ fsl,fqid-range = <256 256>; ++&bportals { ++ bman-portal@0 { ++ cell-index = <0>; ++ }; ++ ++ bman-portal@10000 { ++ cell-index = <1>; ++ }; ++ ++ bman-portal@20000 { ++ cell-index = <2>; ++ }; ++ ++ bman-portal@30000 { ++ cell-index = <3>; ++ }; ++ ++ bman-portal@40000 { ++ cell-index = <4>; ++ }; ++ ++ bman-portal@50000 { ++ cell-index = <5>; ++ }; ++ ++ bman-portal@60000 { ++ cell-index = <6>; + }; + -+ qman-fqids@1 { -+ compatible = "fsl,fqid-range"; -+ fsl,fqid-range = <32768 32768>; ++ bman-portal@70000 { ++ cell-index = <7>; + }; + -+ qman-pools@0 { -+ compatible = "fsl,pool-channel-range"; -+ fsl,pool-channel-range = <0x401 0xf>; ++ bman-portal@80000 { ++ cell-index = <8>; + }; + -+ qman-cgrids@0 { -+ compatible = "fsl,cgrid-range"; -+ fsl,cgrid-range = <0 256>; ++ bman-portal@90000 { ++ cell-index = <9>; + }; + -+ qman-ceetm@0 { -+ compatible = "fsl,qman-ceetm"; -+ fsl,ceetm-lfqid-range = <0xf00000 0x1000>; -+ fsl,ceetm-sp-range = <0 16>; -+ fsl,ceetm-lni-range = <0 8>; -+ fsl,ceetm-channel-range = <0 32>; ++ bman-bpids@0 { ++ compatible = "fsl,bpid-range"; ++ fsl,bpid-range = <32 32>; + }; +}; ---- a/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi -+++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi +--- a/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi @@ -1,9 +1,9 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * QorIQ QMan Portals device tree + * QorIQ BMan Portals device tree * * Copyright 2011-2016 Freescale Semiconductor Inc. * - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - &qportals { -@@ -77,4 +77,11 @@ - interrupts = ; - cell-index = <8>; + &bportals { +@@ -68,4 +68,10 @@ + reg = <0x80000 0x4000>, <0x4080000 0x4000>; + interrupts = ; }; + -+ qportal9: qman-portal@90000 { -+ compatible = "fsl,qman-portal"; ++ bman-portal@90000 { ++ compatible = "fsl,bman-portal"; + reg = <0x90000 0x4000>, <0x4090000 0x4000>; -+ interrupts = ; -+ cell-index = <9>; ++ interrupts = ; + }; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { - fman0_rx_0x10: port@90000 { - cell-index = <0x10>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - }; - - fman0_tx_0x30: port@b0000 { - cell-index = <0x30>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { - fman0_rx_0x08: port@88000 { - cell-index = <0x8>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x88000 0x1000>; - }; - - fman0_tx_0x28: port@a8000 { - cell-index = <0x28>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xa8000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { - fman0_rx_0x09: port@89000 { - cell-index = <0x9>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x89000 0x1000>; - }; - - fman0_tx_0x29: port@a9000 { - cell-index = <0x29>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xa9000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { - fman0_rx_0x0a: port@8a000 { - cell-index = <0xa>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8a000 0x1000>; - }; - - fman0_tx_0x2a: port@aa000 { - cell-index = <0x2a>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xaa000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { - fman0_rx_0x0b: port@8b000 { - cell-index = <0xb>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8b000 0x1000>; - }; - - fman0_tx_0x2b: port@ab000 { - cell-index = <0x2b>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xab000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { - fman0_rx_0x0c: port@8c000 { - cell-index = <0xc>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8c000 0x1000>; - }; - - fman0_tx_0x2c: port@ac000 { - cell-index = <0x2c>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xac000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x10: port@90000 { - cell-index = <0x10>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - }; - - fman1_tx_0x30: port@b0000 { - cell-index = <0x30>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x08: port@88000 { - cell-index = <0x8>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x88000 0x1000>; - }; - - fman1_tx_0x28: port@a8000 { - cell-index = <0x28>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xa8000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x09: port@89000 { - cell-index = <0x9>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x89000 0x1000>; - }; - - fman1_tx_0x29: port@a9000 { - cell-index = <0x29>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xa9000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x0a: port@8a000 { - cell-index = <0xa>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8a000 0x1000>; - }; - - fman1_tx_0x2a: port@aa000 { - cell-index = <0x2a>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xaa000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x0b: port@8b000 { - cell-index = <0xb>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8b000 0x1000>; - }; - - fman1_tx_0x2b: port@ab000 { - cell-index = <0x2b>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xab000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x0c: port@8c000 { - cell-index = <0xc>; -- compatible = "fsl,fman-v2-port-rx"; -+ compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8c000 0x1000>; - }; - - fman1_tx_0x2c: port@ac000 { - cell-index = <0x2c>; -- compatible = "fsl,fman-v2-port-tx"; -+ compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; - reg = <0xac000 0x1000>; - }; - ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi -@@ -35,7 +35,7 @@ - fman@400000 { - fman0_rx_0x08: port@88000 { - cell-index = <0x8>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-10g-rx"; - reg = <0x88000 0x1000>; - fsl,fman-10g-port; - fsl,fman-best-effort-port; -@@ -43,7 +43,7 @@ fman@400000 { +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi +@@ -0,0 +1,97 @@ ++/* ++ * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ] ++ * ++ * Copyright 2012 - 2015 Freescale Semiconductor Inc. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of Freescale Semiconductor nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") as published by the Free Software ++ * Foundation, either version 2 of that License or (at your option) any ++ * later version. ++ * ++ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY ++ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++fsldpaa: fsl,dpaa { ++ compatible = "fsl,ls1043a-dpaa", "simple-bus", "fsl,dpaa"; ++ ethernet@0 { ++ compatible = "fsl,dpa-ethernet"; ++ fsl,fman-mac = <&enet0>; ++ dma-coherent; ++ }; ++ ethernet@1 { ++ compatible = "fsl,dpa-ethernet"; ++ fsl,fman-mac = <&enet1>; ++ dma-coherent; ++ }; ++ ethernet@2 { ++ compatible = "fsl,dpa-ethernet"; ++ fsl,fman-mac = <&enet2>; ++ dma-coherent; ++ }; ++ ethernet@3 { ++ compatible = "fsl,dpa-ethernet"; ++ fsl,fman-mac = <&enet3>; ++ dma-coherent; ++ }; ++ ethernet@4 { ++ compatible = "fsl,dpa-ethernet"; ++ fsl,fman-mac = <&enet4>; ++ dma-coherent; ++ }; ++ ethernet@5 { ++ compatible = "fsl,dpa-ethernet"; ++ fsl,fman-mac = <&enet5>; ++ dma-coherent; ++ }; ++ ethernet@8 { ++ compatible = "fsl,dpa-ethernet"; ++ fsl,fman-mac = <&enet6>; ++ dma-coherent; ++ }; ++ ethernet@6 { ++ compatible = "fsl,im-ethernet"; ++ fsl,fman-mac = <&enet2>; ++ dma-coherent; ++ fpmevt-sel = <0>; ++ }; ++ ethernet@7 { ++ compatible = "fsl,im-ethernet"; ++ fsl,fman-mac = <&enet3>; ++ dma-coherent; ++ fpmevt-sel = <1>; ++ }; ++ ethernet@10 { ++ compatible = "fsl,im-ethernet"; ++ fsl,fman-mac = <&enet4>; ++ dma-coherent; ++ fpmevt-sel = <2>; ++ }; ++ ethernet@11 { ++ compatible = "fsl,im-ethernet"; ++ fsl,fman-mac = <&enet5>; ++ dma-coherent; ++ fpmevt-sel = <3>; ++ }; ++}; ++ +--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi +@@ -1,27 +1,28 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ FMan v3 10g port #0 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ - fman0_tx_0x28: port@a8000 { - cell-index = <0x28>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-10g-tx"; - reg = <0xa8000 0x1000>; - fsl,fman-10g-port; - fsl,fman-best-effort-port; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi -@@ -35,14 +35,14 @@ - fman@400000 { + fman@1a00000 { fman0_rx_0x10: port@90000 { cell-index = <0x10>; - compatible = "fsl,fman-v3-port-rx"; @@ -6552,31 +10350,36 @@ Signed-off-by: Biwen Li + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx"; reg = <0xb0000 0x1000>; fsl,fman-10g-port; ++ fsl,qman-channel-id = <0x800>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi -@@ -35,7 +35,7 @@ - fman@400000 { - fman0_rx_0x09: port@89000 { - cell-index = <0x9>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-10g-rx"; - reg = <0x89000 0x1000>; - fsl,fman-10g-port; - fsl,fman-best-effort-port; -@@ -43,7 +43,7 @@ fman@400000 { - fman0_tx_0x29: port@a9000 { - cell-index = <0x29>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-10g-tx"; - reg = <0xa9000 0x1000>; - fsl,fman-10g-port; - fsl,fman-best-effort-port; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi -@@ -35,14 +35,14 @@ - fman@400000 { +- ethernet@f0000 { ++ mac9: ethernet@f0000 { + cell-index = <0x8>; + compatible = "fsl,fman-memac"; + reg = <0xf0000 0x1000>; +@@ -29,7 +30,7 @@ fman@1a00000 { + pcsphy-handle = <&pcsphy6>; + }; + +- mdio@f1000 { ++ mdio9: mdio@f1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; +--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi +@@ -1,27 +1,28 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ FMan v3 10g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + + fman@1a00000 { fman0_rx_0x11: port@91000 { cell-index = <0x11>; - compatible = "fsl,fman-v3-port-rx"; @@ -6591,258 +10394,516 @@ Signed-off-by: Biwen Li + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx"; reg = <0xb1000 0x1000>; fsl,fman-10g-port; ++ fsl,qman-channel-id = <0x801>; + }; + +- ethernet@f2000 { ++ mac10: ethernet@f2000 { + cell-index = <0x9>; + compatible = "fsl,fman-memac"; + reg = <0xf2000 0x1000>; +@@ -29,7 +30,7 @@ fman@1a00000 { + pcsphy-handle = <&pcsphy7>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { + +- mdio@f3000 { ++ mdio10: mdio@f3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; +--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi +@@ -1,22 +1,23 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ FMan v3 1g port #0 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + + fman@1a00000 { fman0_rx_0x08: port@88000 { cell-index = <0x8>; - compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; ++ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x88000 0x1000>; }; fman0_tx_0x28: port@a8000 { cell-index = <0x28>; - compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; ++ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xa8000 0x1000>; ++ fsl,qman-channel-id = <0x802>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { + ethernet@e0000 { +--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi +@@ -1,22 +1,23 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ FMan v3 1g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + + fman@1a00000 { fman0_rx_0x09: port@89000 { cell-index = <0x9>; - compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; ++ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x89000 0x1000>; }; fman0_tx_0x29: port@a9000 { cell-index = <0x29>; - compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; ++ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xa9000 0x1000>; ++ fsl,qman-channel-id = <0x803>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { + ethernet@e2000 { +--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi +@@ -1,22 +1,23 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ FMan v3 1g port #2 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + + fman@1a00000 { fman0_rx_0x0a: port@8a000 { cell-index = <0xa>; - compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; ++ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x8a000 0x1000>; }; fman0_tx_0x2a: port@aa000 { cell-index = <0x2a>; - compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; ++ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xaa000 0x1000>; ++ fsl,qman-channel-id = <0x804>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { + ethernet@e4000 { +--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi +@@ -1,22 +1,23 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ FMan v3 1g port #3 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + + fman@1a00000 { fman0_rx_0x0b: port@8b000 { cell-index = <0xb>; - compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; ++ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x8b000 0x1000>; }; fman0_tx_0x2b: port@ab000 { cell-index = <0x2b>; - compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; ++ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xab000 0x1000>; ++ fsl,qman-channel-id = <0x805>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { + ethernet@e6000 { +--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi +@@ -1,22 +1,23 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ FMan v3 1g port #4 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + + fman@1a00000 { fman0_rx_0x0c: port@8c000 { cell-index = <0xc>; - compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; ++ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x8c000 0x1000>; }; fman0_tx_0x2c: port@ac000 { cell-index = <0x2c>; - compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; ++ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xac000 0x1000>; ++ fsl,qman-channel-id = <0x806>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi -@@ -35,13 +35,13 @@ - fman@400000 { + ethernet@e8000 { +--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi +@@ -1,22 +1,23 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ FMan v3 1g port #5 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + + fman@1a00000 { fman0_rx_0x0d: port@8d000 { cell-index = <0xd>; - compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; ++ compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x8d000 0x1000>; }; fman0_tx_0x2d: port@ad000 { cell-index = <0x2d>; - compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; ++ compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xad000 0x1000>; ++ fsl,qman-channel-id = <0x807>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi -@@ -35,14 +35,14 @@ - fman@500000 { - fman1_rx_0x10: port@90000 { - cell-index = <0x10>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - fsl,fman-10g-port; - }; - - fman1_tx_0x30: port@b0000 { - cell-index = <0x30>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - fsl,fman-10g-port; - }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi -@@ -35,14 +35,14 @@ - fman@500000 { - fman1_rx_0x11: port@91000 { - cell-index = <0x11>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-10g-rx"; - reg = <0x91000 0x1000>; - fsl,fman-10g-port; - }; - - fman1_tx_0x31: port@b1000 { - cell-index = <0x31>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-10g-tx"; - reg = <0xb1000 0x1000>; - fsl,fman-10g-port; - }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x08: port@88000 { - cell-index = <0x8>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; - reg = <0x88000 0x1000>; - }; + ethernet@ea000 { +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi +@@ -0,0 +1,47 @@ ++/* ++ * QorIQ FMan v3 OH ports device tree ++ * ++ * Copyright 2012-2015 Freescale Semiconductor Inc. ++ * ++ * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) ++ */ ++ ++fman@1a00000 { ++ ++ fman0_oh1: port@82000 { ++ cell-index = <0>; ++ compatible = "fsl,fman-port-oh"; ++ reg = <0x82000 0x1000>; ++ }; ++ ++ fman0_oh2: port@83000 { ++ cell-index = <1>; ++ compatible = "fsl,fman-port-oh"; ++ reg = <0x83000 0x1000>; ++ }; ++ ++ fman0_oh3: port@84000 { ++ cell-index = <2>; ++ compatible = "fsl,fman-port-oh"; ++ reg = <0x84000 0x1000>; ++ }; ++ ++ fman0_oh4: port@85000 { ++ cell-index = <3>; ++ compatible = "fsl,fman-port-oh"; ++ reg = <0x85000 0x1000>; ++ }; ++ ++ fman0_oh5: port@86000 { ++ cell-index = <4>; ++ compatible = "fsl,fman-port-oh"; ++ reg = <0x86000 0x1000>; ++ }; ++ ++ fman0_oh6: port@87000 { ++ cell-index = <5>; ++ compatible = "fsl,fman-port-oh"; ++ reg = <0x87000 0x1000>; ++ }; ++ ++}; +--- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi +@@ -1,9 +1,9 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ FMan v3 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ - fman1_tx_0x28: port@a8000 { - cell-index = <0x28>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; - reg = <0xa8000 0x1000>; - }; + fman0: fman@1a00000 { +@@ -11,53 +11,104 @@ fman0: fman@1a00000 { + #size-cells = <1>; + cell-index = <0>; + compatible = "fsl,fman"; +- ranges = <0x0 0x0 0x1a00000 0x100000>; +- reg = <0x0 0x1a00000 0x0 0x100000>; ++ ranges = <0x0 0x0 0x1a00000 0xfe000>; ++ reg = <0x0 0x1a00000 0x0 0xfe000>; + interrupts = , + ; + clocks = <&clockgen 3 0>; + clock-names = "fmanclk"; + fsl,qman-channel-range = <0x800 0x10>; ++ ptimer-handle = <&ptp_timer0>; ++ ++ cc { ++ compatible = "fsl,fman-cc"; ++ }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x09: port@89000 { - cell-index = <0x9>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; - reg = <0x89000 0x1000>; + muram@0 { + compatible = "fsl,fman-muram"; + reg = <0x0 0x60000>; }; - fman1_tx_0x29: port@a9000 { - cell-index = <0x29>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; - reg = <0xa9000 0x1000>; ++ bmi@80000 { ++ compatible = "fsl,fman-bmi"; ++ reg = <0x80000 0x400>; ++ }; ++ ++ qmi@80400 { ++ compatible = "fsl,fman-qmi"; ++ reg = <0x80400 0x400>; ++ }; ++ + fman0_oh_0x2: port@82000 { + cell-index = <0x2>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x82000 0x1000>; ++ fsl,qman-channel-id = <0x809>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x0a: port@8a000 { - cell-index = <0xa>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8a000 0x1000>; + fman0_oh_0x3: port@83000 { + cell-index = <0x3>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x83000 0x1000>; ++ fsl,qman-channel-id = <0x80a>; }; - fman1_tx_0x2a: port@aa000 { - cell-index = <0x2a>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; - reg = <0xaa000 0x1000>; + fman0_oh_0x4: port@84000 { + cell-index = <0x4>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x84000 0x1000>; ++ fsl,qman-channel-id = <0x80b>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x0b: port@8b000 { - cell-index = <0xb>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8b000 0x1000>; + fman0_oh_0x5: port@85000 { + cell-index = <0x5>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x85000 0x1000>; ++ fsl,qman-channel-id = <0x80c>; }; - fman1_tx_0x2b: port@ab000 { - cell-index = <0x2b>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; - reg = <0xab000 0x1000>; + fman0_oh_0x6: port@86000 { + cell-index = <0x6>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x86000 0x1000>; ++ fsl,qman-channel-id = <0x80d>; }; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x0c: port@8c000 { - cell-index = <0xc>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8c000 0x1000>; + fman0_oh_0x7: port@87000 { + cell-index = <0x7>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x87000 0x1000>; ++ fsl,qman-channel-id = <0x80e>; ++ }; ++ ++ policer@c0000 { ++ compatible = "fsl,fman-policer"; ++ reg = <0xc0000 0x1000>; ++ }; ++ ++ keygen@c1000 { ++ compatible = "fsl,fman-keygen"; ++ reg = <0xc1000 0x1000>; ++ }; ++ ++ dma@c2000 { ++ compatible = "fsl,fman-dma"; ++ reg = <0xc2000 0x1000>; ++ }; ++ ++ fpm@c3000 { ++ compatible = "fsl,fman-fpm"; ++ reg = <0xc3000 0x1000>; ++ }; ++ ++ parser@c7000 { ++ compatible = "fsl,fman-parser"; ++ reg = <0xc7000 0x1000>; ++ }; ++ ++ vsps@dc000 { ++ compatible = "fsl,fman-vsps"; ++ reg = <0xdc000 0x1000>; }; - fman1_tx_0x2c: port@ac000 { - cell-index = <0x2c>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; - reg = <0xac000 0x1000>; + mdio0: mdio@fc000 { +@@ -73,9 +124,11 @@ fman0: fman@1a00000 { + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xfd000 0x1000>; }; ++}; ---- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi -+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi -@@ -35,13 +35,13 @@ - fman@500000 { - fman1_rx_0x0d: port@8d000 { - cell-index = <0xd>; -- compatible = "fsl,fman-v3-port-rx"; -+ compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; - reg = <0x8d000 0x1000>; - }; +- ptp_timer0: ptp-timer@fe000 { +- compatible = "fsl,fman-ptp-timer"; +- reg = <0xfe000 0x1000>; +- }; ++ptp_timer0: ptp-timer@1afe000 { ++ compatible = "fsl,fman-ptp-timer"; ++ reg = <0x0 0x1afe000 0x0 0x1000>; ++ interrupts = ; ++ clocks = <&clockgen 3 0>; + }; +--- /dev/null ++++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi +@@ -0,0 +1,38 @@ ++/* ++ * QorIQ QMan SDK Portals device tree nodes ++ * ++ * Copyright 2011-2016 Freescale Semiconductor Inc. ++ * Copyright 2017 NXP ++ * ++ * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) ++ */ ++ ++&qportals { ++ qman-fqids@0 { ++ compatible = "fsl,fqid-range"; ++ fsl,fqid-range = <256 256>; ++ }; ++ ++ qman-fqids@1 { ++ compatible = "fsl,fqid-range"; ++ fsl,fqid-range = <32768 32768>; ++ }; ++ ++ qman-pools@0 { ++ compatible = "fsl,pool-channel-range"; ++ fsl,pool-channel-range = <0x401 0xf>; ++ }; ++ ++ qman-cgrids@0 { ++ compatible = "fsl,cgrid-range"; ++ fsl,cgrid-range = <0 256>; ++ }; ++ ++ qman-ceetm@0 { ++ compatible = "fsl,qman-ceetm"; ++ fsl,ceetm-lfqid-range = <0xf00000 0x1000>; ++ fsl,ceetm-sp-range = <0 16>; ++ fsl,ceetm-lni-range = <0 8>; ++ fsl,ceetm-channel-range = <0 32>; ++ }; ++}; +--- a/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi ++++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi +@@ -1,9 +1,9 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + /* + * QorIQ QMan Portals device tree + * + * Copyright 2011-2016 Freescale Semiconductor Inc. + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ - fman1_tx_0x2d: port@ad000 { - cell-index = <0x2d>; -- compatible = "fsl,fman-v3-port-tx"; -+ compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; - reg = <0xad000 0x1000>; + &qportals { +@@ -77,4 +77,11 @@ + interrupts = ; + cell-index = <8>; }; - ++ ++ qportal9: qman-portal@90000 { ++ compatible = "fsl,qman-portal"; ++ reg = <0x90000 0x4000>, <0x4090000 0x4000>; ++ interrupts = ; ++ cell-index = <9>; ++ }; + }; +--- a/arch/arm64/boot/dts/freescale/traverse-ls1043s.dts ++++ b/arch/arm64/boot/dts/freescale/traverse-ls1043s.dts +@@ -330,3 +330,32 @@ + &sata { + status = "disabled"; + }; ++ ++/* Additions for Layerscape SDK (4.4/4.9) Kernel only ++ * These kernels need additional setup for FMan/QMan DMA shared memory ++ */ ++ ++#include "qoriq-qman-portals-sdk.dtsi" ++#include "qoriq-bman-portals-sdk.dtsi" ++ ++&bman_fbpr { ++ compatible = "fsl,bman-fbpr"; ++ alloc-ranges = <0 0 0x10000 0>; ++}; ++&qman_fqd { ++ compatible = "fsl,qman-fqd"; ++ alloc-ranges = <0 0 0x10000 0>; ++}; ++&qman_pfdr { ++ compatible = "fsl,qman-pfdr"; ++ alloc-ranges = <0 0 0x10000 0>; ++}; ++ ++&soc { ++#include "qoriq-dpaa-eth.dtsi" ++#include "qoriq-fman3-0-6oh.dtsi" ++}; ++ ++&fman0 { ++ compatible = "fsl,fman", "simple-bus"; ++}; +--- a/arch/arm64/boot/dts/freescale/traverse-ls1043v.dts ++++ b/arch/arm64/boot/dts/freescale/traverse-ls1043v.dts +@@ -251,3 +251,32 @@ + &sata { + status = "disabled"; + }; ++ ++/* Additions for Layerscape SDK (4.4/4.9) Kernel only ++ * These kernels need additional setup for FMan/QMan DMA shared memory ++ */ ++ ++#include "qoriq-qman-portals-sdk.dtsi" ++#include "qoriq-bman-portals-sdk.dtsi" ++ ++&bman_fbpr { ++ compatible = "fsl,bman-fbpr"; ++ alloc-ranges = <0 0 0x10000 0>; ++}; ++&qman_fqd { ++ compatible = "fsl,qman-fqd"; ++ alloc-ranges = <0 0 0x10000 0>; ++}; ++&qman_pfdr { ++ compatible = "fsl,qman-pfdr"; ++ alloc-ranges = <0 0 0x10000 0>; ++}; ++ ++&soc { ++#include "qoriq-dpaa-eth.dtsi" ++#include "qoriq-fman3-0-6oh.dtsi" ++}; ++ ++&fman0 { ++ compatible = "fsl,fman", "simple-bus"; ++}; -- cgit v1.2.3