From cddd4591404fb4c53dc0b3c0b15b942cdbed4356 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Fri, 10 Apr 2020 10:47:05 +0800 Subject: layerscape: add patches-5.4 Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu --- ...s1028a-Update-the-clock-providers-for-the.patch | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch (limited to 'target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch') diff --git a/target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch b/target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch new file mode 100644 index 0000000000..31a896887a --- /dev/null +++ b/target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch @@ -0,0 +1,55 @@ +From e13c24ef2f068e651b9996922a08843d53513cab Mon Sep 17 00:00:00 2001 +From: Wen He +Date: Fri, 20 Sep 2019 16:34:18 +0800 +Subject: [PATCH] arm64: dts: ls1028a: Update the clock providers for the Mali + DP500 + +In order to maximise performance of the LCD Controller's 64-bit AXI +bus, for any give speed bin of the device, the AXI master interface +clock(ACLK) clock can be up to CPU_frequency/2, which is already +capable of optimal performance. In general, ACLK is always expected +to be equal to CPU_frequency/2. APB slave interface clock(PCLK) and +Main processing clock(PCLK) both are tied to the same clock as ACLK. + +This change followed the LS1028A Architecture Specification Manual. + +Signed-off-by: Wen He +Acked-by: Li Yang +Signed-off-by: Shawn Guo +--- + arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 17 ++--------------- + 1 file changed, 2 insertions(+), 15 deletions(-) + +--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +@@ -90,20 +90,6 @@ + clocks = <&osc_27m>; + }; + +- aclk: clock-axi { +- compatible = "fixed-clock"; +- #clock-cells = <0>; +- clock-frequency = <650000000>; +- clock-output-names= "aclk"; +- }; +- +- pclk: clock-apb { +- compatible = "fixed-clock"; +- #clock-cells = <0>; +- clock-frequency = <650000000>; +- clock-output-names= "pclk"; +- }; +- + reboot { + compatible ="syscon-reboot"; + regmap = <&rst>; +@@ -862,7 +848,8 @@ + interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, + <0 223 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "DE", "SE"; +- clocks = <&dpclk 0>, <&aclk>, <&aclk>, <&pclk>; ++ clocks = <&dpclk 0>, <&clockgen 2 2>, <&clockgen 2 2>, ++ <&clockgen 2 2>; + clock-names = "pxlclk", "mclk", "aclk", "pclk"; + arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; + arm,malidp-arqos-value = <0xd000d000>; -- cgit v1.2.3