From 786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 21 Mar 2022 01:16:48 +0000 Subject: kernel: delete Linux 5.4 config and patches As the upcoming release will be based on Linux 5.10 only, remove all kernel configuration as well as patches for Linux 5.4. There were no targets still actively using Linux 5.4. Signed-off-by: Daniel Golle (cherry picked from commit 3a14580411adfb75f9a44eded9f41245b9e44606) --- ...-qspi-dynamically-alloc-AHB-memory-for-QS.patch | 139 --------------------- 1 file changed, 139 deletions(-) delete mode 100644 target/linux/layerscape/patches-5.4/817-spi-0001-spi-spi-fsl-qspi-dynamically-alloc-AHB-memory-for-QS.patch (limited to 'target/linux/layerscape/patches-5.4/817-spi-0001-spi-spi-fsl-qspi-dynamically-alloc-AHB-memory-for-QS.patch') diff --git a/target/linux/layerscape/patches-5.4/817-spi-0001-spi-spi-fsl-qspi-dynamically-alloc-AHB-memory-for-QS.patch b/target/linux/layerscape/patches-5.4/817-spi-0001-spi-spi-fsl-qspi-dynamically-alloc-AHB-memory-for-QS.patch deleted file mode 100644 index 97c8eab118..0000000000 --- a/target/linux/layerscape/patches-5.4/817-spi-0001-spi-spi-fsl-qspi-dynamically-alloc-AHB-memory-for-QS.patch +++ /dev/null @@ -1,139 +0,0 @@ -From e1cf48a13626d0c42c5191dc4852f4dc271de010 Mon Sep 17 00:00:00 2001 -From: Han Xu -Date: Tue, 9 Jul 2019 16:21:14 -0500 -Subject: [PATCH] spi: spi-fsl-qspi: dynamically alloc AHB memory for QSPI - -dynamically alloc AHB memory for QSPI controller. - -Signed-off-by: Han Xu -[rebase] -Signed-off-by: Yangbo Lu ---- - drivers/spi/spi-fsl-qspi.c | 60 +++++++++++++++++++++++++++++++++------------- - 1 file changed, 43 insertions(+), 17 deletions(-) - ---- a/drivers/spi/spi-fsl-qspi.c -+++ b/drivers/spi/spi-fsl-qspi.c -@@ -192,6 +192,8 @@ - */ - #define QUADSPI_QUIRK_USE_TDH_SETTING BIT(5) - -+#define QUADSPI_MIN_IOMAP SZ_4M -+ - struct fsl_qspi_devtype_data { - unsigned int rxfifo; - unsigned int txfifo; -@@ -254,6 +256,9 @@ struct fsl_qspi { - void __iomem *iobase; - void __iomem *ahb_addr; - u32 memmap_phy; -+ u32 memmap_phy_size; -+ u32 memmap_start; -+ u32 memmap_len; - struct clk *clk, *clk_en; - struct device *dev; - struct completion c; -@@ -537,11 +542,34 @@ static void fsl_qspi_select_mem(struct f - fsl_qspi_invalidate(q); - } - --static void fsl_qspi_read_ahb(struct fsl_qspi *q, const struct spi_mem_op *op) -+static int fsl_qspi_read_ahb(struct fsl_qspi *q, const struct spi_mem_op *op) - { -+ u32 start = op->addr.val + q->selected * q->memmap_phy_size / 4; -+ u32 len = op->data.nbytes; -+ -+ /* if necessary, ioremap before AHB read */ -+ if ((!q->ahb_addr) || start < q->memmap_start || -+ start + len > q->memmap_start + q->memmap_len) { -+ if (q->ahb_addr) { -+ iounmap(q->ahb_addr); -+ } -+ -+ q->memmap_start = start; -+ q->memmap_len = len > QUADSPI_MIN_IOMAP ? -+ len : QUADSPI_MIN_IOMAP; -+ -+ q->ahb_addr = ioremap_wc(q->memmap_phy + q->memmap_start, -+ q->memmap_len); -+ if (!q->ahb_addr) { -+ dev_err(q->dev, "failed to alloc memory\n"); -+ return -ENOMEM; -+ } -+ } -+ - memcpy_fromio(op->data.buf.in, -- q->ahb_addr + q->selected * q->devtype_data->ahb_buf_size, -- op->data.nbytes); -+ q->ahb_addr + start - q->memmap_start, len); -+ -+ return 0; - } - - static void fsl_qspi_fill_txfifo(struct fsl_qspi *q, -@@ -646,7 +674,7 @@ static int fsl_qspi_exec_op(struct spi_m - addr_offset = q->memmap_phy; - - qspi_writel(q, -- q->selected * q->devtype_data->ahb_buf_size + addr_offset, -+ q->selected * q->memmap_phy_size / 4 + addr_offset, - base + QUADSPI_SFAR); - - qspi_writel(q, qspi_readl(q, base + QUADSPI_MCR) | -@@ -665,7 +693,7 @@ static int fsl_qspi_exec_op(struct spi_m - */ - if (op->data.nbytes > (q->devtype_data->rxfifo - 4) && - op->data.dir == SPI_MEM_DATA_IN) { -- fsl_qspi_read_ahb(q, op); -+ err = fsl_qspi_read_ahb(q, op); - } else { - qspi_writel(q, QUADSPI_RBCT_WMRK_MASK | - QUADSPI_RBCT_RXBRD_USEIPS, base + QUADSPI_RBCT); -@@ -763,16 +791,16 @@ static int fsl_qspi_default_setup(struct - * In HW there can be a maximum of four chips on two buses with - * two chip selects on each bus. We use four chip selects in SW - * to differentiate between the four chips. -- * We use ahb_buf_size for each chip and set SFA1AD, SFA2AD, SFB1AD, -- * SFB2AD accordingly. -+ * We divide the total memory region size equally for each chip -+ * and set SFA1AD, SFA2AD, SFB1AD, SFB2AD accordingly. - */ -- qspi_writel(q, q->devtype_data->ahb_buf_size + addr_offset, -+ qspi_writel(q, q->memmap_phy_size / 4 + addr_offset, - base + QUADSPI_SFA1AD); -- qspi_writel(q, q->devtype_data->ahb_buf_size * 2 + addr_offset, -+ qspi_writel(q, q->memmap_phy_size / 4 * 2 + addr_offset, - base + QUADSPI_SFA2AD); -- qspi_writel(q, q->devtype_data->ahb_buf_size * 3 + addr_offset, -+ qspi_writel(q, q->memmap_phy_size / 4 * 3 + addr_offset, - base + QUADSPI_SFB1AD); -- qspi_writel(q, q->devtype_data->ahb_buf_size * 4 + addr_offset, -+ qspi_writel(q, q->memmap_phy_size / 4 * 4 + addr_offset, - base + QUADSPI_SFB2AD); - - q->selected = -1; -@@ -859,13 +887,8 @@ static int fsl_qspi_probe(struct platfor - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "QuadSPI-memory"); -- q->ahb_addr = devm_ioremap_resource(dev, res); -- if (IS_ERR(q->ahb_addr)) { -- ret = PTR_ERR(q->ahb_addr); -- goto err_put_ctrl; -- } -- - q->memmap_phy = res->start; -+ q->memmap_phy_size = resource_size(res); - - /* find the clocks */ - q->clk_en = devm_clk_get(dev, "qspi_en"); -@@ -939,6 +962,9 @@ static int fsl_qspi_remove(struct platfo - - mutex_destroy(&q->lock); - -+ if (q->ahb_addr) -+ iounmap(q->ahb_addr); -+ - return 0; - } - -- cgit v1.2.3