From f3bae0fa4b2e2e3eea64102eb40cd0dffb59f9d3 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Fri, 21 Apr 2017 09:40:01 +0200 Subject: mediatek: fix support for gmac1 using external PHY Signed-off-by: John Crispin --- target/linux/mediatek/patches-4.9/0095-ephy.patch | 30 +++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 target/linux/mediatek/patches-4.9/0095-ephy.patch (limited to 'target/linux/mediatek/patches-4.9') diff --git a/target/linux/mediatek/patches-4.9/0095-ephy.patch b/target/linux/mediatek/patches-4.9/0095-ephy.patch new file mode 100644 index 0000000000..52d8299077 --- /dev/null +++ b/target/linux/mediatek/patches-4.9/0095-ephy.patch @@ -0,0 +1,30 @@ +Index: linux-4.9.20/drivers/net/dsa/mt7530.c +=================================================================== +--- linux-4.9.20.orig/drivers/net/dsa/mt7530.c ++++ linux-4.9.20/drivers/net/dsa/mt7530.c +@@ -629,6 +629,11 @@ mt7530_setup(struct dsa_switch *ds) + val = mt7530_read(priv, MT7530_MHWTRAP); + val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; + val |= MHWTRAP_MANUAL; ++ if (!dsa_is_cpu_port(ds, 5)) { ++ val |= MHWTRAP_P5_DIS; ++ val |= MHWTRAP_P5_MAC_SEL; ++ val |= MHWTRAP_P5_RGMII_MODE; ++ } + mt7530_write(priv, MT7530_MHWTRAP, val); + + /* Enable and reset MIB counters */ +Index: linux-4.9.20/drivers/net/ethernet/mediatek/mtk_eth_soc.c +=================================================================== +--- linux-4.9.20.orig/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ linux-4.9.20/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -221,6 +221,9 @@ static void mtk_phy_link_adjust(struct n + netif_carrier_on(dev); + else + netif_carrier_off(dev); ++ ++ if (!of_phy_is_fixed_link(mac->of_node)) ++ phy_print_status(dev->phydev); + } + + static int mtk_phy_connect_node(struct mtk_eth *eth, struct mtk_mac *mac, -- cgit v1.2.3