From 48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7 Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Wed, 3 Jul 2019 23:22:25 +0200 Subject: ramips/mt7620: Name DTS files based on scheme As introduced with ath79, DTS files for ramips will now be labelled soc_vendor_device.dts(i). With this change, DTS files can be selected automatically without further manual links. Signed-off-by: Adrian Schmutzler --- target/linux/ramips/dts/mt7620a_sercomm_na930.dts | 187 ++++++++++++++++++++++ 1 file changed, 187 insertions(+) create mode 100644 target/linux/ramips/dts/mt7620a_sercomm_na930.dts (limited to 'target/linux/ramips/dts/mt7620a_sercomm_na930.dts') diff --git a/target/linux/ramips/dts/mt7620a_sercomm_na930.dts b/target/linux/ramips/dts/mt7620a_sercomm_na930.dts new file mode 100644 index 0000000000..6d85914265 --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_sercomm_na930.dts @@ -0,0 +1,187 @@ +/dts-v1/; + +#include "mt7620a.dtsi" + +#include +#include + +/ { + compatible = "sercomm,na930", "ralink,mt7620a-soc"; + model = "Sercomm NA930"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + chosen { + bootargs = "console=ttyS1,57600"; + }; + + nand { + compatible = "mtk,mt7620-nand"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@200000 { + label = "factory"; + reg = <0x200000 0x40000>; + read-only; + }; + + partition@240000 { + label = "Config"; + reg = <0x240000 0x400000>; + read-only; + }; + + partition@640000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x640000 0x1400000>; + }; + }; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + reset { + label = "reset"; + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + zwave { + label = "zwave"; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + zwave { + label = "na930:blue:zwave"; + gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + }; + + status { + label = "na930:blue:status"; + gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; + }; + + service { + label = "na930:blue:service"; + gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; + }; + + led_power: power { + label = "na930:blue:power"; + gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + telit { + gpio-export,name = "telit"; + gpio-export,output = <1>; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "rgmii2", "spi", "ephy"; + ralink,function = "gpio"; + }; + + uartf_gpio { + ralink,group = "uartf"; + ralink,function = "gpio uartf"; + }; + }; +}; + +&uart { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +ðernet { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &mdio_pins>; + mediatek,portmap = "llllw"; + + port@4 { + status = "okay"; + phy-handle = <&phy4>; + phy-mode = "rgmii"; + }; + + port@5 { + status = "okay"; + phy-handle = <&phy5>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + + phy5: ethernet-phy@5 { + reg = <5>; + phy-mode = "rgmii"; + }; + }; +}; + +&gsw { + mediatek,port4 = "gmac"; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; -- cgit v1.2.3