From 7196ca1d497b6f0727a285bc3ecd41d54aff3a81 Mon Sep 17 00:00:00 2001
From: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Date: Wed, 3 Jul 2019 23:22:28 +0200
Subject: ramips/mt7621: Name DTS files based on scheme

As introduced with ath79, DTS files for ramips will now be labelled
soc_vendor_device.dts(i). With this change, DTS files can be
selected automatically without further manual links.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
---
 .../linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts  | 149 +++++++++++++++++++++
 1 file changed, 149 insertions(+)
 create mode 100644 target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts

(limited to 'target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts')

diff --git a/target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts b/target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts
new file mode 100644
index 0000000000..c212e05a20
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_dlink_dir-860l-b1.dts
@@ -0,0 +1,149 @@
+/dts-v1/;
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "dlink,dir-860l-b1", "mediatek,mt7621-soc";
+	model = "D-Link DIR-860L B1";
+
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_green;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_green;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x8000000>;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		power {
+			label = "dir-860l-b1:orange:power";
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power_green: power2 {
+			label = "dir-860l-b1:green:power";
+			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+		};
+
+		net {
+			label = "dir-860l-b1:orange:net";
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+		};
+
+		net2 {
+			label = "dir-860l-b1:green:net";
+			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <20>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	m25p80@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x4000>;
+				read-only;
+			};
+
+			radio: partition@34000 {
+				label = "radio";
+				reg = <0x34000 0x4000>;
+				read-only;
+			};
+
+			factory: partition@38000 {
+				label = "factory";
+				reg = <0x38000 0x8000>;
+				read-only;
+			};
+
+			partition@40000 {
+				label = "defaults";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "seama";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x2000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&pcie1 {
+	mt76@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pinctrl {
+	state_default: pinctrl0 {
+		gpio {
+			ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
+			ralink,function = "gpio";
+		};
+	};
+};
-- 
cgit v1.2.3