From d4db00205d726f9faca3147cb345518ec5406aab Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 3 Apr 2013 09:58:44 +0000 Subject: move files to files-3.7 Signed-off-by: John Crispin SVN-Revision: 36161 --- .../arch/mips/ralink/rt305x/early_printk.c | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 target/linux/ramips/files-3.7/arch/mips/ralink/rt305x/early_printk.c (limited to 'target/linux/ramips/files-3.7/arch/mips/ralink/rt305x/early_printk.c') diff --git a/target/linux/ramips/files-3.7/arch/mips/ralink/rt305x/early_printk.c b/target/linux/ramips/files-3.7/arch/mips/ralink/rt305x/early_printk.c new file mode 100644 index 0000000000..602df863ef --- /dev/null +++ b/target/linux/ramips/files-3.7/arch/mips/ralink/rt305x/early_printk.c @@ -0,0 +1,29 @@ +/* + * Ralink RT305x SoC early printk support + * + * Copyright (C) 2009 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include + +#include + +#define UART_READ(r) \ + __raw_readl((void __iomem *)(KSEG1ADDR(RT305X_UART1_BASE) + 4 * (r))) + +#define UART_WRITE(r, v) \ + __raw_writel((v), (void __iomem *)(KSEG1ADDR(RT305X_UART1_BASE) + 4 * (r))) + +void prom_putchar(unsigned char ch) +{ + while (((UART_READ(UART_REG_LSR)) & UART_LSR_THRE) == 0); + UART_WRITE(UART_REG_TX, ch); + while (((UART_READ(UART_REG_LSR)) & UART_LSR_THRE) == 0); +} -- cgit v1.2.3