From 9e5b0cc19cebf6ed876c7eace13b887b46e518c0 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 14 Aug 2013 18:15:15 +0000 Subject: ramips: update v3.10 patches Sync the patches with those sent upstream for v3.12. Signed-off-by: John Crispin SVN-Revision: 37778 --- ...0005-DT-Add-documentation-for-gpio-ralink.patch | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 target/linux/ramips/patches-3.10/0005-DT-Add-documentation-for-gpio-ralink.patch (limited to 'target/linux/ramips/patches-3.10/0005-DT-Add-documentation-for-gpio-ralink.patch') diff --git a/target/linux/ramips/patches-3.10/0005-DT-Add-documentation-for-gpio-ralink.patch b/target/linux/ramips/patches-3.10/0005-DT-Add-documentation-for-gpio-ralink.patch new file mode 100644 index 0000000000..a6a6b6966a --- /dev/null +++ b/target/linux/ramips/patches-3.10/0005-DT-Add-documentation-for-gpio-ralink.patch @@ -0,0 +1,59 @@ +From ad68c2865b360f1b637432b4cbcaaf101d2687b9 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 28 Jul 2013 19:45:30 +0200 +Subject: [PATCH 05/25] DT: Add documentation for gpio-ralink + +Describe gpio-ralink binding. + +Signed-off-by: John Crispin +Cc: linux-mips@linux-mips.org +Cc: devicetree@vger.kernel.org +Cc: linux-gpio@vger.kernel.org +--- + .../devicetree/bindings/gpio/gpio-ralink.txt | 40 ++++++++++++++++++++ + 1 file changed, 40 insertions(+) + create mode 100644 Documentation/devicetree/bindings/gpio/gpio-ralink.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/gpio/gpio-ralink.txt +@@ -0,0 +1,40 @@ ++Ralink SoC GPIO controller bindings ++ ++Required properties: ++- compatible: ++ - "ralink,rt2880-gpio" for Ralink controllers ++- #gpio-cells : Should be two. ++ - first cell is the pin number ++ - second cell is used to specify optional parameters (unused) ++- gpio-controller : Marks the device node as a GPIO controller ++- reg : Physical base address and length of the controller's registers ++- interrupt-parent: phandle to the INTC device node ++- interrupts : Specify the INTC interrupt number ++- ralink,num-gpios : Specify the number of GPIOs ++- ralink,register-map : The register layout depends on the GPIO bank and actual ++ SoC type. Register offsets need to be in this order. ++ [ INT, EDGE, RENA, FENA, DATA, DIR, POL, SET, RESET, TOGGLE ] ++ ++Optional properties: ++- ralink,gpio-base : Specify the GPIO chips base number ++ ++Example: ++ ++ gpio0: gpio@600 { ++ compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio"; ++ ++ #gpio-cells = <2>; ++ gpio-controller; ++ ++ reg = <0x600 0x34>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <6>; ++ ++ ralink,gpio-base = <0>; ++ ralink,num-gpios = <24>; ++ ralink,register-map = [ 00 04 08 0c ++ 20 24 28 2c ++ 30 34 ]; ++ ++ }; -- cgit v1.2.3