From c957af0a0f6a2c45b9b3c84f45f4a3aa44d293c6 Mon Sep 17 00:00:00 2001 From: Zoltan Herpai Date: Wed, 5 Feb 2014 08:42:28 +0000 Subject: sunxi: initial 3.13 support Signed-off-by: Zoltan HERPAI SVN-Revision: 39471 --- .../100-clk-composite-determine-rate.patch | 75 ++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 target/linux/sunxi/patches-3.13/100-clk-composite-determine-rate.patch (limited to 'target/linux/sunxi/patches-3.13/100-clk-composite-determine-rate.patch') diff --git a/target/linux/sunxi/patches-3.13/100-clk-composite-determine-rate.patch b/target/linux/sunxi/patches-3.13/100-clk-composite-determine-rate.patch new file mode 100644 index 0000000000..6abbcbe5ff --- /dev/null +++ b/target/linux/sunxi/patches-3.13/100-clk-composite-determine-rate.patch @@ -0,0 +1,75 @@ +From a968e9dc5983d258a4aa7e496d58c92e9e4cf670 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Emilio=20L=C3=B3pez?= +Date: Sat, 14 Sep 2013 21:37:59 -0300 +Subject: [PATCH] clk: composite: .determine_rate support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This commit adds .determine_rate support to the composite clock. It will +use the .determine_rate callback from the rate component if available, +and fall back on the mux component otherwise. This allows composite +clocks to enjoy the benefits of automatic clock reparenting. + +Signed-off-by: Emilio López +Signed-off-by: Maxime Ripard +--- + drivers/clk/clk-composite.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c +index a33f46f..753d0b7 100644 +--- a/drivers/clk/clk-composite.c ++++ b/drivers/clk/clk-composite.c +@@ -55,6 +55,30 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw, + return rate_ops->recalc_rate(rate_hw, parent_rate); + } + ++static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long *best_parent_rate, ++ struct clk **best_parent_p) ++{ ++ struct clk_composite *composite = to_clk_composite(hw); ++ const struct clk_ops *rate_ops = composite->rate_ops; ++ const struct clk_ops *mux_ops = composite->mux_ops; ++ struct clk_hw *rate_hw = composite->rate_hw; ++ struct clk_hw *mux_hw = composite->mux_hw; ++ ++ if (rate_hw && rate_ops && rate_ops->determine_rate) { ++ rate_hw->clk = hw->clk; ++ return rate_ops->determine_rate(rate_hw, rate, best_parent_rate, ++ best_parent_p); ++ } else if (mux_hw && mux_ops && mux_ops->determine_rate) { ++ mux_hw->clk = hw->clk; ++ return mux_ops->determine_rate(rate_hw, rate, best_parent_rate, ++ best_parent_p); ++ } else { ++ pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n"); ++ return 0; ++ } ++} ++ + static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *prate) + { +@@ -147,6 +171,8 @@ struct clk *clk_register_composite(struct device *dev, const char *name, + composite->mux_ops = mux_ops; + clk_composite_ops->get_parent = clk_composite_get_parent; + clk_composite_ops->set_parent = clk_composite_set_parent; ++ if (mux_ops->determine_rate) ++ clk_composite_ops->determine_rate = clk_composite_determine_rate; + } + + if (rate_hw && rate_ops) { +@@ -170,6 +196,8 @@ struct clk *clk_register_composite(struct device *dev, const char *name, + composite->rate_hw = rate_hw; + composite->rate_ops = rate_ops; + clk_composite_ops->recalc_rate = clk_composite_recalc_rate; ++ if (rate_ops->determine_rate) ++ clk_composite_ops->determine_rate = clk_composite_determine_rate; + } + + if (gate_hw && gate_ops) { +-- +1.8.5.1 + -- cgit v1.2.3