From 9e9dec563e4d061e7b34d2d59a89eb05c60f43a7 Mon Sep 17 00:00:00 2001 From: Luka Perkov Date: Sat, 2 Mar 2013 23:34:00 +0100 Subject: MIPS: add board support for Gigaset SX76X Signed-off-by: Luka Perkov Signed-off-by: Daniel Schwierzeck --- /dev/null +++ b/board/gigaset/sx76x/Makefile @@ -0,0 +1,27 @@ +# +# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de +# +# SPDX-License-Identifier: GPL-2.0+ +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS = $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### --- /dev/null +++ b/board/gigaset/sx76x/config.mk @@ -0,0 +1,7 @@ +# +# Copyright (C) 2011-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com +# +# SPDX-License-Identifier: GPL-2.0+ +# + +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR) --- /dev/null +++ b/board/gigaset/sx76x/ddr_settings.h @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2011-2013 Luka Perkov + * + * This file has been generated with lantiq_ram_extract_magic.awk script. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#define MC_DC00_VALUE 0x1B1B +#define MC_DC01_VALUE 0x0 +#define MC_DC02_VALUE 0x0 +#define MC_DC03_VALUE 0x0 +#define MC_DC04_VALUE 0x0 +#define MC_DC05_VALUE 0x200 +#define MC_DC06_VALUE 0x605 +#define MC_DC07_VALUE 0x303 +#define MC_DC08_VALUE 0x202 +#define MC_DC09_VALUE 0x70A +#define MC_DC10_VALUE 0x203 +#define MC_DC11_VALUE 0xC02 +#define MC_DC12_VALUE 0x1C8 +#define MC_DC13_VALUE 0x1 +#define MC_DC14_VALUE 0x0 +#define MC_DC15_VALUE 0xF3E +#define MC_DC16_VALUE 0xC800 +#define MC_DC17_VALUE 0xD +#define MC_DC18_VALUE 0x300 +#define MC_DC19_VALUE 0x200 +#define MC_DC20_VALUE 0xA04 +#define MC_DC21_VALUE 0xF00 +#define MC_DC22_VALUE 0xF0F +#define MC_DC23_VALUE 0x0 +#define MC_DC24_VALUE 0x63 +#define MC_DC25_VALUE 0x0 +#define MC_DC26_VALUE 0x100 +#define MC_DC27_VALUE 0x0 +#define MC_DC28_VALUE 0x514 +#define MC_DC29_VALUE 0x2D89 +#define MC_DC30_VALUE 0x8300 +#define MC_DC31_VALUE 0x2002 +#define MC_DC32_VALUE 0x0 +#define MC_DC33_VALUE 0x0 +#define MC_DC34_VALUE 0x0 +#define MC_DC35_VALUE 0x0 +#define MC_DC36_VALUE 0x0 +#define MC_DC37_VALUE 0x0 +#define MC_DC38_VALUE 0x0 +#define MC_DC39_VALUE 0x0 +#define MC_DC40_VALUE 0x0 +#define MC_DC41_VALUE 0x0 +#define MC_DC42_VALUE 0x0 +#define MC_DC43_VALUE 0x0 +#define MC_DC44_VALUE 0x0 +#define MC_DC45_VALUE 0x500 +#define MC_DC46_VALUE 0x0 --- /dev/null +++ b/board/gigaset/sx76x/sx76x.c @@ -0,0 +1,65 @@ +/* + * Copyright (C) 2011 Luka Perkov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +static void gpio_init(void) +{ + /* Activate reset line of ADM6996I switch */ + gpio_direction_output(19, 0); +} + +int board_early_init_f(void) +{ + gpio_init(); + + return 0; +} + +int checkboard(void) +{ + puts("Board: " CONFIG_BOARD_NAME "\n"); + ltq_chip_print_info(); + + return 0; +} + +static const struct ltq_eth_port_config eth_port_config[] = { + /* MAC0: Lantiq ADM6996I switch */ + { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII }, +}; + +static const struct ltq_eth_board_config eth_board_config = { + .ports = eth_port_config, + .num_ports = ARRAY_SIZE(eth_port_config), +}; + +int board_eth_init(bd_t *bis) +{ + return ltq_eth_initialize(ð_board_config); +} + +static struct switch_device adm6996i_dev = { + .name = "adm6996i", + .cpu_port = 5, + .port_mask = 0xF, +}; + +int board_switch_init(void) +{ + /* Deactivate reset line of ADM6996I switch */ + gpio_set_value(19, 1); + + /* ADM6996I needs some time to come out of reset */ + __udelay(50000); + + return switch_device_register(&adm6996i_dev); +} --- a/boards.cfg +++ b/boards.cfg @@ -510,6 +510,8 @@ Active mips mips32 danub Active mips mips32 danube arcadyan arv7518pw arv7518pw_ram arv7518pw:SYS_BOOT_RAM Luka Perkov Active mips mips32 danube audiocodes acmp252 acmp252_nor acmp252:SYS_BOOT_NOR Daniel Golle Active mips mips32 danube audiocodes acmp252 acmp252_ram acmp252:SYS_BOOT_RAM Daniel Golle +Active mips mips32 danube gigaset sx76x gigasx76x_nor sx76x:SYS_BOOT_NOR Luka Perkov +Active mips mips32 danube gigaset sx76x gigasx76x_ram sx76x:SYS_BOOT_RAM Luka Perkov Active mips mips32 danube lantiq easy50712 easy50712_nor easy50712:SYS_BOOT_NOR Daniel Schwierzeck Active mips mips32 danube lantiq easy50712 easy50712_norspl easy50712:SYS_BOOT_NORSPL Daniel Schwierzeck Active mips mips32 danube lantiq easy50712 easy50712_ram easy50712:SYS_BOOT_RAM Daniel Schwierzeck --- /dev/null +++ b/include/configs/sx76x.h @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2011-2013 Luka Perkov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_MACH_TYPE "GIGASX76X" +#define CONFIG_IDENT_STRING " "CONFIG_MACH_TYPE +#define CONFIG_BOARD_NAME "Gigaset sx76x" + +/* Configure SoC */ +#define CONFIG_LTQ_SUPPORT_UART /* Enable ASC and UART */ + +#define CONFIG_LTQ_SUPPORT_ETHERNET /* Enable ethernet */ + +#define CONFIG_LTQ_SUPPORT_NOR_FLASH /* Have a parallel NOR flash */ + +#define CONFIG_SYS_BOOTM_LEN 0x1000000 /* 16 MB */ + +/* Switch devices */ +#define CONFIG_SWITCH_MULTI +#define CONFIG_SWITCH_ADM6996I + +/* Environment */ +#if defined(CONFIG_SYS_BOOT_NOR) +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_OFFSET (256 * 1024) +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#else +#define CONFIG_ENV_IS_NOWHERE +#endif + +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR + +/* Console */ +#define CONFIG_LTQ_ADVANCED_CONSOLE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_CONSOLE_ASC 1 +#define CONFIG_CONSOLE_DEV "ttyLTQ1" + +/* Pull in default board configs for Lantiq XWAY Danube */ +#include +#include + +/* Pull in default OpenWrt configs for Lantiq SoC */ +#include "openwrt-lantiq-common.h" + +#define CONFIG_ENV_UPDATE_UBOOT_NOR \ + "update-uboot-nor=run load-uboot-nor write-uboot-nor\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_ENV_LANTIQ_DEFAULTS \ + CONFIG_ENV_UPDATE_UBOOT_NOR \ + "kernel_addr=0xB0040000\0" + +#endif /* __CONFIG_H */ 1'>161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339