From a02d918e1bf4dc70c51b630c12182e038d0a73d2 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Tue, 14 Apr 2020 15:47:09 +0100 Subject: [PATCH] media: i2c: ov9281: fix mclk issue when probe multiple camera. Takes the ov9281 part only from the Rockchip's patch. Change-Id: I30e833baf2c1bb07d6d87ddb3b00759ab45a90e4 Signed-off-by: Zefa Chen --- drivers/media/i2c/ov9281.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) --- a/drivers/media/i2c/ov9281.c +++ b/drivers/media/i2c/ov9281.c @@ -3,6 +3,7 @@ * ov9281 driver * * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd. + * V0.0X01.0X02 fix mclk issue when probe multiple camera. */ #include @@ -22,7 +23,7 @@ #include #include -#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x0) +#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x2) #ifndef V4L2_CID_DIGITAL_GAIN #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN @@ -676,6 +677,12 @@ static int __ov9281_power_on(struct ov92 dev_err(dev, "could not set pins\n"); } + ret = clk_set_rate(ov9281->xvclk, OV9281_XVCLK_FREQ); + if (ret < 0) + dev_warn(dev, "Failed to set xvclk rate (24MHz)\n"); + if (clk_get_rate(ov9281->xvclk) != OV9281_XVCLK_FREQ) + dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n"); + ret = clk_prepare_enable(ov9281->xvclk); if (ret < 0) { dev_err(dev, "Failed to enable xvclk\n"); @@ -1008,13 +1015,6 @@ static int ov9281_probe(struct i2c_clien dev_err(dev, "Failed to get xvclk\n"); return -EINVAL; } - ret = clk_set_rate(ov9281->xvclk, OV9281_XVCLK_FREQ); - if (ret < 0) { - dev_err(dev, "Failed to set xvclk rate (24MHz)\n"); - return ret; - } - if (clk_get_rate(ov9281->xvclk) != OV9281_XVCLK_FREQ) - dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n"); ov9281->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(ov9281->reset_gpio))