From f79915995e8fe4f2d11043fe4cab4b579e5cf1de Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Horia=20Geant=C4=83?= Date: Wed, 10 Oct 2018 16:06:11 +0300 Subject: [PATCH] crypto: caam/qi2 - add (unused) dpseci API MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit During driver upstreaming all unused dpseci API was trimmed down. Add the API back to be in sync with files provided by MC f/w release. Signed-off-by: Horia Geantă --- drivers/crypto/caam/dpseci.c | 330 ++++++++++++++++++++++++++++++++++++++- drivers/crypto/caam/dpseci.h | 50 ++++++ drivers/crypto/caam/dpseci_cmd.h | 59 +++++++ 3 files changed, 437 insertions(+), 2 deletions(-) --- a/drivers/crypto/caam/dpseci.c +++ b/drivers/crypto/caam/dpseci.c @@ -16,8 +16,8 @@ * @token: Returned token; use in subsequent API calls * * This function can be used to open a control session for an already created - * object; an object may have been declared statically in the DPL - * or created dynamically. + * object; an object may have been declared in the DPL or by calling the + * dpseci_create() function. * This function returns a unique authentication token, associated with the * specific object ID and the specific MC portal; this token must be used in all * subsequent commands for this specific object. @@ -67,6 +67,85 @@ int dpseci_close(struct fsl_mc_io *mc_io } /** + * dpseci_create() - Create the DPSECI object + * @mc_io: Pointer to MC portal's I/O object + * @dprc_token: Parent container token; '0' for default container + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @cfg: Configuration structure + * @obj_id: returned object id + * + * Create the DPSECI object, allocate required resources and perform required + * initialization. + * + * The object can be created either by declaring it in the DPL file, or by + * calling this function. + * + * The function accepts an authentication token of a parent container that this + * object should be assigned to. The token can be '0' so the object will be + * assigned to the default container. + * The newly created object can be opened with the returned object id and using + * the container's associated tokens and MC portals. + * + * Return: '0' on success, error code otherwise + */ +int dpseci_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags, + const struct dpseci_cfg *cfg, u32 *obj_id) +{ + struct fsl_mc_command cmd = { 0 }; + struct dpseci_cmd_create *cmd_params; + int i, err; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CREATE, + cmd_flags, + dprc_token); + cmd_params = (struct dpseci_cmd_create *)cmd.params; + for (i = 0; i < 8; i++) + cmd_params->priorities[i] = cfg->priorities[i]; + for (i = 0; i < 8; i++) + cmd_params->priorities2[i] = cfg->priorities[8 + i]; + cmd_params->num_tx_queues = cfg->num_tx_queues; + cmd_params->num_rx_queues = cfg->num_rx_queues; + cmd_params->options = cpu_to_le32(cfg->options); + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + *obj_id = mc_cmd_read_object_id(&cmd); + + return 0; +} + +/** + * dpseci_destroy() - Destroy the DPSECI object and release all its resources + * @mc_io: Pointer to MC portal's I/O object + * @dprc_token: Parent container token; '0' for default container + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @object_id: The object id; it must be a valid id within the container that + * created this object + * + * The function accepts the authentication token of the parent container that + * created the object (not the one that currently owns the object). The object + * is searched within parent using the provided 'object_id'. + * All tokens to the object must be closed before calling destroy. + * + * Return: '0' on success, error code otherwise + */ +int dpseci_destroy(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags, + u32 object_id) +{ + struct fsl_mc_command cmd = { 0 }; + struct dpseci_cmd_destroy *cmd_params; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_DESTROY, + cmd_flags, + dprc_token); + cmd_params = (struct dpseci_cmd_destroy *)cmd.params; + cmd_params->object_id = cpu_to_le32(object_id); + + return mc_send_command(mc_io, &cmd); +} + +/** * dpseci_enable() - Enable the DPSECI, allow sending and receiving frames * @mc_io: Pointer to MC portal's I/O object * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' @@ -133,6 +212,217 @@ int dpseci_is_enabled(struct fsl_mc_io * } /** + * dpseci_reset() - Reset the DPSECI, returns the object to initial state. + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @token: Token of DPSECI object + * + * Return: '0' on success, error code otherwise + */ +int dpseci_reset(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token) +{ + struct fsl_mc_command cmd = { 0 }; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_RESET, + cmd_flags, + token); + + return mc_send_command(mc_io, &cmd); +} + +/** + * dpseci_get_irq_enable() - Get overall interrupt state + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @token: Token of DPSECI object + * @irq_index: The interrupt index to configure + * @en: Returned Interrupt state - enable = 1, disable = 0 + * + * Return: '0' on success, error code otherwise + */ +int dpseci_get_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u8 *en) +{ + struct fsl_mc_command cmd = { 0 }; + struct dpseci_cmd_irq_enable *cmd_params; + struct dpseci_rsp_get_irq_enable *rsp_params; + int err; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_ENABLE, + cmd_flags, + token); + cmd_params = (struct dpseci_cmd_irq_enable *)cmd.params; + cmd_params->irq_index = irq_index; + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + rsp_params = (struct dpseci_rsp_get_irq_enable *)cmd.params; + *en = rsp_params->enable_state; + + return 0; +} + +/** + * dpseci_set_irq_enable() - Set overall interrupt state. + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @token: Token of DPSECI object + * @irq_index: The interrupt index to configure + * @en: Interrupt state - enable = 1, disable = 0 + * + * Allows GPP software to control when interrupts are generated. + * Each interrupt can have up to 32 causes. The enable/disable control's the + * overall interrupt state. If the interrupt is disabled no causes will cause + * an interrupt. + * + * Return: '0' on success, error code otherwise + */ +int dpseci_set_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u8 en) +{ + struct fsl_mc_command cmd = { 0 }; + struct dpseci_cmd_irq_enable *cmd_params; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_ENABLE, + cmd_flags, + token); + cmd_params = (struct dpseci_cmd_irq_enable *)cmd.params; + cmd_params->irq_index = irq_index; + cmd_params->enable_state = en; + + return mc_send_command(mc_io, &cmd); +} + +/** + * dpseci_get_irq_mask() - Get interrupt mask. + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @token: Token of DPSECI object + * @irq_index: The interrupt index to configure + * @mask: Returned event mask to trigger interrupt + * + * Every interrupt can have up to 32 causes and the interrupt model supports + * masking/unmasking each cause independently. + * + * Return: '0' on success, error code otherwise + */ +int dpseci_get_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u32 *mask) +{ + struct fsl_mc_command cmd = { 0 }; + struct dpseci_cmd_irq_mask *cmd_params; + int err; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_MASK, + cmd_flags, + token); + cmd_params = (struct dpseci_cmd_irq_mask *)cmd.params; + cmd_params->irq_index = irq_index; + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + *mask = le32_to_cpu(cmd_params->mask); + + return 0; +} + +/** + * dpseci_set_irq_mask() - Set interrupt mask. + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @token: Token of DPSECI object + * @irq_index: The interrupt index to configure + * @mask: event mask to trigger interrupt; + * each bit: + * 0 = ignore event + * 1 = consider event for asserting IRQ + * + * Every interrupt can have up to 32 causes and the interrupt model supports + * masking/unmasking each cause independently + * + * Return: '0' on success, error code otherwise + */ +int dpseci_set_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u32 mask) +{ + struct fsl_mc_command cmd = { 0 }; + struct dpseci_cmd_irq_mask *cmd_params; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_MASK, + cmd_flags, + token); + cmd_params = (struct dpseci_cmd_irq_mask *)cmd.params; + cmd_params->mask = cpu_to_le32(mask); + cmd_params->irq_index = irq_index; + + return mc_send_command(mc_io, &cmd); +} + +/** + * dpseci_get_irq_status() - Get the current status of any pending interrupts + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @token: Token of DPSECI object + * @irq_index: The interrupt index to configure + * @status: Returned interrupts status - one bit per cause: + * 0 = no interrupt pending + * 1 = interrupt pending + * + * Return: '0' on success, error code otherwise + */ +int dpseci_get_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u32 *status) +{ + struct fsl_mc_command cmd = { 0 }; + struct dpseci_cmd_irq_status *cmd_params; + int err; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_STATUS, + cmd_flags, + token); + cmd_params = (struct dpseci_cmd_irq_status *)cmd.params; + cmd_params->status = cpu_to_le32(*status); + cmd_params->irq_index = irq_index; + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + *status = le32_to_cpu(cmd_params->status); + + return 0; +} + +/** + * dpseci_clear_irq_status() - Clear a pending interrupt's status + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @token: Token of DPSECI object + * @irq_index: The interrupt index to configure + * @status: bits to clear (W1C) - one bit per cause: + * 0 = don't change + * 1 = clear status bit + * + * Return: '0' on success, error code otherwise + */ +int dpseci_clear_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u32 status) +{ + struct fsl_mc_command cmd = { 0 }; + struct dpseci_cmd_irq_status *cmd_params; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CLEAR_IRQ_STATUS, + cmd_flags, + token); + cmd_params = (struct dpseci_cmd_irq_status *)cmd.params; + cmd_params->status = cpu_to_le32(status); + cmd_params->irq_index = irq_index; + + return mc_send_command(mc_io, &cmd); +} + +/** * dpseci_get_attributes() - Retrieve DPSECI attributes * @mc_io: Pointer to MC portal's I/O object * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' @@ -320,6 +610,42 @@ int dpseci_get_sec_attr(struct fsl_mc_io return 0; } + +/** + * dpseci_get_sec_counters() - Retrieve SEC accelerator counters + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @token: Token of DPSECI object + * @counters: Returned SEC counters + * + * Return: '0' on success, error code otherwise + */ +int dpseci_get_sec_counters(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + struct dpseci_sec_counters *counters) +{ + struct fsl_mc_command cmd = { 0 }; + struct dpseci_rsp_get_sec_counters *rsp_params; + int err; + + cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_SEC_COUNTERS, + cmd_flags, + token); + err = mc_send_command(mc_io, &cmd); + if (err) + return err; + + rsp_params = (struct dpseci_rsp_get_sec_counters *)cmd.params; + counters->dequeued_requests = + le64_to_cpu(rsp_params->dequeued_requests); + counters->ob_enc_requests = le64_to_cpu(rsp_params->ob_enc_requests); + counters->ib_dec_requests = le64_to_cpu(rsp_params->ib_dec_requests); + counters->ob_enc_bytes = le64_to_cpu(rsp_params->ob_enc_bytes); + counters->ob_prot_bytes = le64_to_cpu(rsp_params->ob_prot_bytes); + counters->ib_dec_bytes = le64_to_cpu(rsp_params->ib_dec_bytes); + counters->ib_valid_bytes = le64_to_cpu(rsp_params->ib_valid_bytes); + + return 0; +} /** * dpseci_get_api_version() - Get Data Path SEC Interface API version --- a/drivers/crypto/caam/dpseci.h +++ b/drivers/crypto/caam/dpseci.h @@ -55,6 +55,12 @@ struct dpseci_cfg { u8 priorities[DPSECI_MAX_QUEUE_NUM]; }; +int dpseci_create(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags, + const struct dpseci_cfg *cfg, u32 *obj_id); + +int dpseci_destroy(struct fsl_mc_io *mc_io, u16 dprc_token, u32 cmd_flags, + u32 object_id); + int dpseci_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); int dpseci_disable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); @@ -62,6 +68,26 @@ int dpseci_disable(struct fsl_mc_io *mc_ int dpseci_is_enabled(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, int *en); +int dpseci_reset(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); + +int dpseci_get_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u8 *en); + +int dpseci_set_irq_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u8 en); + +int dpseci_get_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u32 *mask); + +int dpseci_set_irq_mask(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u32 mask); + +int dpseci_get_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u32 *status); + +int dpseci_clear_irq_status(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + u8 irq_index, u32 status); + /** * struct dpseci_attr - Structure representing DPSECI attributes * @id: DPSECI object ID @@ -248,6 +274,30 @@ struct dpseci_sec_attr { int dpseci_get_sec_attr(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, struct dpseci_sec_attr *attr); +/** + * struct dpseci_sec_counters - Structure representing global SEC counters and + * not per dpseci counters + * @dequeued_requests: Number of Requests Dequeued + * @ob_enc_requests: Number of Outbound Encrypt Requests + * @ib_dec_requests: Number of Inbound Decrypt Requests + * @ob_enc_bytes: Number of Outbound Bytes Encrypted + * @ob_prot_bytes: Number of Outbound Bytes Protected + * @ib_dec_bytes: Number of Inbound Bytes Decrypted + * @ib_valid_bytes: Number of Inbound Bytes Validated + */ +struct dpseci_sec_counters { + u64 dequeued_requests; + u64 ob_enc_requests; + u64 ib_dec_requests; + u64 ob_enc_bytes; + u64 ob_prot_bytes; + u64 ib_dec_bytes; + u64 ib_valid_bytes; +}; + +int dpseci_get_sec_counters(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, + struct dpseci_sec_counters *counters); + int dpseci_get_api_version(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 *major_ver, u16 *minor_ver); --- a/drivers/crypto/caam/dpseci_cmd.h +++ b/drivers/crypto/caam/dpseci_cmd.h @@ -17,6 +17,7 @@ /* Command versioning */ #define DPSECI_CMD_BASE_VERSION 1 #define DPSECI_CMD_BASE_VERSION_V2 2 +#define DPSECI_CMD_BASE_VERSION_V3 3 #define DPSECI_CMD_ID_OFFSET 4 #define DPSECI_CMD_V1(id) (((id) << DPSECI_CMD_ID_OFFSET) | \ @@ -25,20 +26,34 @@ #define DPSECI_CMD_V2(id) (((id) << DPSECI_CMD_ID_OFFSET) | \ DPSECI_CMD_BASE_VERSION_V2) +#define DPSECI_CMD_V3(id) (((id) << DPSECI_CMD_ID_OFFSET) | \ + DPSECI_CMD_BASE_VERSION_V3) + /* Command IDs */ #define DPSECI_CMDID_CLOSE DPSECI_CMD_V1(0x800) #define DPSECI_CMDID_OPEN DPSECI_CMD_V1(0x809) +#define DPSECI_CMDID_CREATE DPSECI_CMD_V3(0x909) +#define DPSECI_CMDID_DESTROY DPSECI_CMD_V1(0x989) #define DPSECI_CMDID_GET_API_VERSION DPSECI_CMD_V1(0xa09) #define DPSECI_CMDID_ENABLE DPSECI_CMD_V1(0x002) #define DPSECI_CMDID_DISABLE DPSECI_CMD_V1(0x003) #define DPSECI_CMDID_GET_ATTR DPSECI_CMD_V1(0x004) +#define DPSECI_CMDID_RESET DPSECI_CMD_V1(0x005) #define DPSECI_CMDID_IS_ENABLED DPSECI_CMD_V1(0x006) +#define DPSECI_CMDID_SET_IRQ_ENABLE DPSECI_CMD_V1(0x012) +#define DPSECI_CMDID_GET_IRQ_ENABLE DPSECI_CMD_V1(0x013) +#define DPSECI_CMDID_SET_IRQ_MASK DPSECI_CMD_V1(0x014) +#define DPSECI_CMDID_GET_IRQ_MASK DPSECI_CMD_V1(0x015) +#define DPSECI_CMDID_GET_IRQ_STATUS DPSECI_CMD_V1(0x016) +#define DPSECI_CMDID_CLEAR_IRQ_STATUS DPSECI_CMD_V1(0x017) + #define DPSECI_CMDID_SET_RX_QUEUE DPSECI_CMD_V1(0x194) #define DPSECI_CMDID_GET_RX_QUEUE DPSECI_CMD_V1(0x196) #define DPSECI_CMDID_GET_TX_QUEUE DPSECI_CMD_V1(0x197) #define DPSECI_CMDID_GET_SEC_ATTR DPSECI_CMD_V2(0x198) +#define DPSECI_CMDID_GET_SEC_COUNTERS DPSECI_CMD_V1(0x199) #define DPSECI_CMDID_SET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x170) #define DPSECI_CMDID_GET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x171) @@ -57,6 +72,20 @@ struct dpseci_cmd_open { __le32 dpseci_id; }; +struct dpseci_cmd_create { + u8 priorities[8]; + u8 num_tx_queues; + u8 num_rx_queues; + u8 pad0[6]; + __le32 options; + __le32 pad1; + u8 priorities2[8]; +}; + +struct dpseci_cmd_destroy { + __le32 object_id; +}; + #define DPSECI_ENABLE_SHIFT 0 #define DPSECI_ENABLE_SIZE 1 @@ -64,6 +93,26 @@ struct dpseci_rsp_is_enabled { u8 is_enabled; }; +struct dpseci_cmd_irq_enable { + u8 enable_state; + u8 pad[3]; + u8 irq_index; +}; + +struct dpseci_rsp_get_irq_enable { + u8 enable_state; +}; + +struct dpseci_cmd_irq_mask { + __le32 mask; + u8 irq_index; +}; + +struct dpseci_cmd_irq_status { + __le32 status; + u8 irq_index; +}; + struct dpseci_rsp_get_attributes { __le32 id; __le32 pad0; @@ -125,6 +174,16 @@ struct dpseci_rsp_get_sec_attr { u8 ptha_acc_num; }; +struct dpseci_rsp_get_sec_counters { + __le64 dequeued_requests; + __le64 ob_enc_requests; + __le64 ib_dec_requests; + __le64 ob_enc_bytes; + __le64 ob_prot_bytes; + __le64 ib_dec_bytes; + __le64 ib_valid_bytes; +}; + struct dpseci_rsp_get_api_version { __le16 major; __le16 minor;