From 4d5ce89b5a6faa347464221e4b674be46b951245 Mon Sep 17 00:00:00 2001 From: Wen He Date: Wed, 27 Nov 2019 18:24:11 +0800 Subject: [PATCH] drm: imx: mhdp: Adjustment core rate of DP TX CTRL for LS1028A This Display TX CTRL clock should be ACLK/4, update it to align with the specification. Signed-off-by: Wen He Reviewed-by: Sandor Yu --- drivers/gpu/drm/bridge/cadence/cdns-dp-core.c | 4 ++++ drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c | 3 +++ include/drm/bridge/cdns-mhdp-common.h | 1 + 3 files changed, 8 insertions(+) --- a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c @@ -435,6 +435,7 @@ static int __cdns_dp_probe(struct platfo } mhdp->is_hpd = true; + mhdp->is_ls1028a = false; mhdp->irq[IRQ_IN] = platform_get_irq_byname(pdev, "plug_in"); if (mhdp->irq[IRQ_IN] < 0) { @@ -450,6 +451,9 @@ static int __cdns_dp_probe(struct platfo cdns_dp_parse_dt(mhdp); + if (of_device_is_compatible(dev->of_node, "cdn,ls1028a-dp")) + mhdp->is_ls1028a = true; + cdns_mhdp_plat_call(mhdp, power_on); cdns_mhdp_plat_call(mhdp, firmware_init); --- a/drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c +++ b/drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c @@ -526,6 +526,9 @@ int cdns_mhdp_firmware_init_imx8qm(struc /* configure HDMI/DP core clock */ rate = clk_get_rate(imx_mhdp->clks.clk_core); + if (mhdp->is_ls1028a) + rate = rate / 4; + cdns_mhdp_set_fw_clk(&imx_mhdp->mhdp, rate); /* un-reset ucpu */ --- a/include/drm/bridge/cdns-mhdp-common.h +++ b/include/drm/bridge/cdns-mhdp-common.h @@ -685,6 +685,7 @@ struct cdns_mhdp_device { bool power_up; bool plugged; bool is_hpd; + bool is_ls1028a; struct mutex lock; struct mutex iolock;