// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; #include #include #include "mt7622.dtsi" #include "mt6380.dtsi" / { model = "Buffalo WSR-2533DHP2"; compatible = "buffalo,wsr-2533dhp2", "mediatek,mt7622"; aliases { serial0 = &uart0; led-boot = &power_green; led-failsafe = &power_amber; led-running = &power_green; led-upgrade = &power_green; }; chosen { bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512"; }; memory { reg = <0 0x40000000 0 0x0F000000>; }; leds { compatible = "gpio-leds"; wireless_amber { label = "amber:wireless"; gpios = <&pio 2 GPIO_ACTIVE_HIGH>; }; power_amber: power_amber { label = "amber:power"; gpios = <&pio 3 GPIO_ACTIVE_LOW>; }; power_green: power_green { label = "green:power"; gpios = <&pio 4 GPIO_ACTIVE_LOW>; default-state = "on"; }; wireless_green { label = "green:wireless"; gpios = <&pio 15 GPIO_ACTIVE_HIGH>; }; internet { label = "green:internet"; gpios = <&pio 19 GPIO_ACTIVE_HIGH>; }; router { label = "green:router"; gpios = <&pio 20 GPIO_ACTIVE_HIGH>; }; }; keys { compatible = "gpio-keys"; poll-interval = <100>; reset { label = "reset"; gpios = <&pio 0 GPIO_ACTIVE_LOW>; linux,code = ; }; /* GPIO 1 and 16 are a tri-state switch button with * ROUTER / AP / WB. */ router { label = "router"; gpios = <&pio 1 GPIO_ACTIVE_LOW>; linux,code = ; linux,input-type = ; }; bridge { label = "wb"; gpios = <&pio 16 GPIO_ACTIVE_LOW>; linux,code = ; linux,input-type = ; }; /* GPIO 18 is a switch button with AUTO / MANUAL. */ manual { label = "manual"; gpios = <&pio 18 GPIO_ACTIVE_LOW>; linux,code = ; linux,input-type = ; }; wps { label = "wps"; gpios = <&pio 102 GPIO_ACTIVE_LOW>; linux,code = ; }; }; rtkgsw: rtkgsw@0 { compatible = "mediatek,rtk-gsw"; mediatek,ethsys = <ðsys>; mediatek,mdio = <&mdio>; mediatek,reset-pin = <&pio 54 GPIO_ACTIVE_HIGH>; }; }; &cpu0 { proc-supply = <&mt6380_vcpu_reg>; sram-supply = <&mt6380_vm_reg>; }; &cpu1 { proc-supply = <&mt6380_vcpu_reg>; sram-supply = <&mt6380_vm_reg>; }; &pcie0 { pinctrl-names = "default"; pinctrl-0 = <&pcie0_pins>; status = "okay"; }; &slot0 { status = "okay"; wifi@0,0 { compatible = "mediatek,mt76"; reg = <0x0000 0 0 0 0>; mediatek,mtd-eeprom = <&factory 0x5000>; ieee80211-freq-limit = <5000000 6000000>; }; }; &pio { eth_pins: eth-pins { mux { function = "eth"; groups = "mdc_mdio", "rgmii_via_gmac2"; }; }; /* Parallel nand is shared pin with eMMC */ parallel_nand_pins: parallel-nand-pins { mux { function = "flash"; groups = "par_nand"; }; conf-cmd-dat { pins = "NCEB", "NWEB", "NREB", "NDL4", "NDL5", "NDL6", "NDL7", "NRB", "NCLE", "NALE", "NDL0", "NDL1", "NDL2", "NDL3"; input-enable; drive-strength = <8>; bias-pull-up; }; }; pcie0_pins: pcie0-pins { mux { function = "pcie"; groups = "pcie0_pad_perst", "pcie0_1_waken", "pcie0_1_clkreq"; }; }; pmic_bus_pins: pmic-bus-pins { mux { function = "pmic"; groups = "pmic_bus"; }; }; pwm7_pins: pwm1-2-pins { mux { function = "pwm"; groups = "pwm_ch7_2"; }; }; uart0_pins: uart0-pins { mux { function = "uart"; groups = "uart0_0_tx_rx" ; }; }; watchdog_pins: watchdog-pins { mux { function = "watchdog"; groups = "watchdog"; }; }; }; &bch { status = "okay"; }; ð { pinctrl-names = "default"; pinctrl-0 = <ð_pins>; status = "okay"; gmac0: mac@0 { compatible = "mediatek,eth-mac"; reg = <0>; phy-connection-type = "2500base-x"; nvmem-cells = <&macaddr_factory_4>; nvmem-cell-names = "mac-address"; mac-address-increment = <(-1)>; fixed-link { speed = <2500>; full-duplex; pause; }; }; mdio: mdio-bus { #address-cells = <1>; #size-cells = <0>; }; }; &nandc { pinctrl-names = "default"; pinctrl-0 = <¶llel_nand_pins>; status = "okay"; nand@0 { reg = <0>; nand-ecc-mode = "hw"; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "Preloader"; reg = <0x0 0x80000>; read-only; }; partition@80000 { label = "ATF"; reg = <0x80000 0x40000>; read-only; }; partition@c0000 { label = "Bootloader"; reg = <0xc0000 0x80000>; read-only; }; partition@140000 { label = "Config"; reg = <0x140000 0x80000>; }; factory: partition@1c0000 { label = "factory"; reg = <0x1c0000 0x40000>; read-only; }; partition@200000 { compatible = "brcm,trx"; brcm,trx-magic = <0x32504844>; label = "firmware"; reg = <0x200000 0x3a00000>; }; partition@3C00000 { label = "Kernel2"; reg = <0x3c00000 0x3a00000>; }; partition@7600000 { label = "glbcfg"; reg = <0x7600000 0x200000>; read-only; }; partition@7800000 { label = "board_data"; reg = <0x7800000 0x200000>; read-only; }; }; }; }; &pwm { pinctrl-names = "default"; pinctrl-0 = <&pwm7_pins>; status = "okay"; }; &pwrap { pinctrl-names = "default"; pinctrl-0 = <&pmic_bus_pins>; status = "okay"; }; &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; status = "okay"; }; &watchdog { pinctrl-names = "default"; pinctrl-0 = <&watchdog_pins>; status = "okay"; }; &wmac { status = "okay"; mediatek,mtd-eeprom = <&factory 0x0>; }; &rtc { status = "disabled"; }; &factory { compatible = "nvmem-cells"; #address-cells = <1>; #size-cells = <1>; macaddr_factory_4: macaddr@4 { reg = <0x4 0x6>; }; };