From c06e836ada59fbc6d1109277e693e5b3e056ac12 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sun, 20 Jan 2013 22:00:57 +0100 Subject: [PATCH 03/14] MIPS: ralink: adds reset code Resetting these SoCs requires no real magic. The code is straight forward. Signed-off-by: John Crispin Signed-off-by: Gabor Juhos Patchwork: http://patchwork.linux-mips.org/patch/4891/ --- arch/mips/ralink/reset.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 arch/mips/ralink/reset.c --- /dev/null +++ b/arch/mips/ralink/reset.c @@ -0,0 +1,44 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * Copyright (C) 2008-2009 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * Copyright (C) 2013 John Crispin + */ + +#include +#include + +#include + +#include + +/* Reset Control */ +#define SYSC_REG_RESET_CTRL 0x034 +#define RSTCTL_RESET_SYSTEM BIT(0) + +static void ralink_restart(char *command) +{ + local_irq_disable(); + rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL); + unreachable(); +} + +static void ralink_halt(void) +{ + local_irq_disable(); + unreachable(); +} + +static int __init mips_reboot_setup(void) +{ + _machine_restart = ralink_restart; + _machine_halt = ralink_halt; + pm_power_off = ralink_halt; + + return 0; +} + +arch_initcall(mips_reboot_setup);