#!/bin/sh BLKSZ=65536 [ -f "$1" -a -f "$2" ] || { echo "Usage: $0 [output file]" exit 1 } IMAGE=${3:-openwrt-combined.img} # Make sure provided images are 64k aligned. kern="${IMAGE}.kernel" root="${IMAGE}.rootfs" dd if="$1" of="$kern" bs=$BLKSZ conv=sync 2>/dev/null dd if="$2" of="$root" bs=$BLKSZ conv=sync 2>/dev/null # Calculate md5sum over combined kernel and rootfs image. md5=$(cat "$kern" "$root" | md5sum -) # Write image header followed by kernel and rootfs image. # The header is padded to 64k, format is: # CI magic word ("Combined Image") # length of kernel encoded as zero padded 8 digit hex # length of rootfs encoded as zero padded 8 digit hex # checksum of the combined kernel and rootfs image ( printf "CI%08x%08x%32s" \ $(stat -c "%s" "$kern") $(stat -c "%s" "$root") "${md5%% *}" | \ dd bs=$BLKSZ conv=sync; cat "$kern" "$root" ) > ${IMAGE} 2>/dev/null # Clean up. rm -f "$kern" "$root" ' name='id' value='0814e6184109f8bba779e4f71f9336957910f518'/> upstream openwrtJames
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path: root/target/linux/ar71xx/patches-3.3/201-spi-ath79-add-delay-between-SCK-changes.patch
blob: c2681f9a5dbd8c6c83933b7eaa853c6ccbee0629 (plain) 
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From 48b7e765e6e097d20d809fadd17a4355d26ad6d5 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 11 Jan 2012 20:06:35 +0100
Subject: [PATCH 1/7] spi/ath79: add delay between SCK changes

The driver uses the "as fast as it can" approach
to drive the SCK signal. However this does not
work with certain low speed SPI chips (e.g. the
PCF2123 RTC chip). Add per-bit slowdowns in order
to be able to use  the driver with such chips as
well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
 drivers/spi/spi-ath79.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -52,6 +52,12 @@ static inline struct ath79_spi *ath79_sp
 	return spi_master_get_devdata(spi->master);
 }
 
+static inline void ath79_spi_delay(unsigned nsecs)
+{
+	if (nsecs)
+		ndelay(nsecs);
+}
+
 static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
 {
 	struct ath79_spi *sp = ath79_spidev_to_sp(spi);
@@ -184,7 +190,9 @@ static u32 ath79_spi_txrx_mode0(struct s
 
 		/* setup MSB (to slave) on trailing edge */
 		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
+		ath79_spi_delay(nsecs);
 		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK);
+		ath79_spi_delay(nsecs);
 
 		word <<= 1;
 	}
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