/* * This file is part of the flashrom project. * * Copyright (C) 2020 The Chromium OS Authors * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include #include #include #include #include #include #include "programmer.h" #include "spi.h" #include "i2c_helper.h" #define REGISTER_ADDRESS (0x94 >> 1) #define PAGE_ADDRESS (0x9e >> 1) #define PAGE_SIZE 256 #define MAX_SPI_WAIT_RETRIES 1000 #define CLT2_SPI 0x82 #define SPIEDID_BASE_ADDR2 0x8d #define ROMADDR_BYTE1 0x8e #define ROMADDR_BYTE2 0x8f #define SWSPI_WDATA 0x90 #define SWSPI_WDATA_CLEAR_STATUS 0x00 #define SWSPI_WDATA_WRITE_REGISTER 0x01 #define SWSPI_WDATA_READ_REGISTER 0x05 #define SWSPI_WDATA_ENABLE_REGISTER 0x06 #define SWSPI_WDATA_SECTOR_ERASE 0x20 #define SWSPI_WDATA_PROTECT_BP 0x8c #define SWSPI_RDATA 0x91 #define SWSPI_LEN 0x92 #define SWSPICTL 0x93 #define SWSPICTL_ACCESS_TRIGGER 1 #define SWSPICTL_CLEAR_PTR (1 << 1) #define SWSPICTL_NO_READ (1 << 2) #define SWSPICTL_ENABLE_READBACK (1 << 3) #define SWSPICTL_MOT (1 << 4) #define SPISTATUS 0x9e #define SPISTATUS_BYTE_PROGRAM_FINISHED 0 #define SPISTATUS_BYTE_PROGRAM_IN_IF 1 #define SPISTATUS_BYTE_PROGRAM_SEND_DONE (1 << 1) #define SPISTATUS_SECTOR_ERASE_FINISHED 0 #define SPISTATUS_SECTOR_ERASE_IN_IF (1 << 2) #define SPISTATUS_SECTOR_ERASE_SEND_DONE (1 << 3) #define SPISTATUS_CHIP_ERASE_FINISHED 0 #define SPISTATUS_CHIP_ERASE_IN_IF (1 << 4) #define SPISTATUS_CHIP_ERASE_SEND_DONE (1 << 5) #define SPISTATUS_FW_UPDATE_ENABLE (1 << 6) #define WRITE_PROTECTION 0xb3 #define WRITE_PROTECTION_ON 0 #define WRITE_PROTECTION_OFF 0x10 #define MPU 0xbc #define PAGE_HW_WRITE 0xda #define PAGE_HW_WRITE_DISABLE 0 #define PAGE_HW_COFIG_REGISTER 0xaa #define PAGE_HW_WRITE_ENABLE 0x55 struct lspcon_i2c_spi_data { int fd; }; typedef struct { uint8_t command; const uint8_t *data; uint8_t data_size; uint8_t control; } packet_t; static int lspcon_i2c_spi_write_data(int fd, uint16_t addr, void *buf, uint16_t len) { i2c_buffer_t data; if (i2c_buffer_t_fill(&data, buf, len)) return SPI_GENERIC_ERROR; return i2c_write(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR; } static int lspcon_i2c_spi_read_data(int fd, uint16_t addr, void *buf, uint16_t len) { i2c_buffer_t data; if (i2c_buffer_t_fill(&data, buf, len)) return SPI_GENERIC_ERROR; return i2c_read(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR; } static int get_fd_from_context(const struct flashctx *flash) { if (!flash || !flash->mst || !flash->mst->spi.data) { msg_perr("Unable to extract fd from flash context.\n"); return SPI_GENERIC_ERROR; } const struct lspcon_i2c_spi_data *data = (const struct lspcon_i2c_spi_data *)flash->mst->spi.data; return data->fd; } static int lspcon_i2c_spi_write_register(int fd, uint8_t i2c_register, uint8_t value) { uint8_t command[] = { i2c_register, value }; return lspcon_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 2); } static int lspcon_i2c_spi_read_register(int fd, uint8_t i2c_register, uint8_t *value) { uint8_t command[] = { i2c_register }; int ret = lspcon_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 1); ret |= lspcon_i2c_spi_read_data(fd, REGISTER_ADDRESS, value, 1); return ret ? SPI_GENERIC_ERROR : 0; } static int lspcon_i2c_spi_register_control(int fd, packet_t *packet) { int i; int ret = lspcon_i2c_spi_write_register(fd, SWSPI_WDATA, packet->command); if (ret) return ret; /* Higher 4 bits are read size. */ int write_size = packet->data_size & 0x0f; for (i = 0; i < write_size; ++i) { ret |= lspcon_i2c_spi_write_register(fd, SWSPI_WDATA, packet->data[i]); } ret |= lspcon_i2c_spi_write_register(fd, SWSPI_LEN, packet->data_size); ret |= lspcon_i2c_spi_write_register(fd, SWSPICTL, packet->control); return ret; } static int lspcon_i2c_spi_wait_command_done(int fd, unsigned int offset, int mask) { uint8_t val; int tried = 0; int ret = 0; do { ret |= lspcon_i2c_spi_read_register(fd, offset, &val); } while (!ret && (val & mask) && ++tried < MAX_SPI_WAIT_RETRIES); if (tried == MAX_SPI_WAIT_RETRIES) { msg_perr("%s: Time out on sending command.\n", __func__); return -MAX_SPI_WAIT_RETRIES; } return (val & mask) ? SPI_GENERIC_ERROR : ret; } static int lspcon_i2c_spi_wait_rom_free(int fd) { uint8_t val; int tried = 0; int ret = 0; ret |= lspcon_i2c_spi_wait_command_done(fd, SPISTATUS, SPISTATUS_SECTOR_ERASE_IN_IF | SPISTATUS_SECTOR_ERASE_SEND_DONE); if (ret) return ret; do { packet_t packet = { SWSPI_WDATA_READ_REGISTER, NULL, 0, SWSPICTL_ACCESS_TRIGGER }; ret |= lspcon_i2c_spi_register_control(fd, &packet); ret |= lspcon_i2c_spi_wait_command_done(fd, SWSPICTL, SWSPICTL_ACCESS_TRIGGER); ret |= l
From: James Hogan <james.hogan@imgtec.com>
Date: Thu, 3 Mar 2016 21:30:42 +0000
Subject: [PATCH] MIPS: c-r4k: Exclude sibling CPUs in SMP calls

When performing SMP calls to foreign cores, exclude sibling CPUs from
the provided map, as we already handle the local core on the current
CPU. This prevents an IPI call from for example core 0, VPE 1 to VPE 0
on the same core.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
---

--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -96,8 +96,17 @@ static inline void r4k_on_each_cpu(unsig
 				   void (*func) (void *info), void *info)
 {
 	preempt_disable();
-	if (r4k_op_needs_ipi(type))
-		smp_call_function_many(&cpu_foreign_map, func, info, 1);
+	/* cpu_foreign_map and cpu_sibling_map[] undeclared when !CONFIG_SMP */
+#ifdef CONFIG_SMP
+	if (r4k_op_needs_ipi(type)) {
+		struct cpumask mask;
+
+		/* exclude sibling CPUs */
+		cpumask_andnot(&mask, &cpu_foreign_map,
+			       &cpu_sibling_map[smp_processor_id()]);
+		smp_call_function_many(&mask, func, info, 1);
+	}
+#endif
 	func(info);
 	preempt_enable();
 }
12, .command = lspcon_i2c_spi_send_command, .multicommand = default_spi_send_multicommand, .read = lspcon_i2c_spi_read, .write_256 = lspcon_i2c_spi_write_256, .write_aai = lspcon_i2c_spi_write_aai, }; /* TODO: MPU still stopped at this point, probably need to reset it. */ static int lspcon_i2c_spi_shutdown(void *data) { int ret = 0; struct lspcon_i2c_spi_data *lspcon_data = (struct lspcon_i2c_spi_data *)data; int fd = lspcon_data->fd; ret |= lspcon_i2c_spi_enable_write_protection(fd); ret |= lspcon_i2c_spi_toggle_register_protection(fd, 0); i2c_close(fd); free(data); return ret; } /* TODO: remove this out of the specific SPI master implementation. */ static int get_bus(void) { char *bus_str = extract_programmer_param("bus"); int ret = SPI_GENERIC_ERROR; if (bus_str) { char *bus_suffix; errno = 0; int bus = (int)strtol(bus_str, &bus_suffix, 10); if (errno != 0 || bus_str == bus_suffix) { msg_perr("%s: Could not convert 'bus'.\n", __func__); goto get_bus_done; } if (bus < 0 || bus > 255) { msg_perr("%s: Value for 'bus' is out of range(0-255).\n", __func__); goto get_bus_done; } if (strlen(bus_suffix) > 0) { msg_perr("%s: Garbage following 'bus' value.\n", __func__); goto get_bus_done; } msg_pinfo("Using i2c bus %i.\n", bus); ret = bus; goto get_bus_done; } else { msg_perr("%s: Bus number not specified.\n", __func__); } get_bus_done: if (bus_str) free(bus_str); return ret; } int lspcon_i2c_spi_init(void) { int lspcon_i2c_spi_bus = get_bus(); if (lspcon_i2c_spi_bus < 0) return SPI_GENERIC_ERROR; int ret = 0; int fd = i2c_open(lspcon_i2c_spi_bus, REGISTER_ADDRESS, 0); if (fd < 0) return fd; ret |= lspcon_i2c_spi_reset_mpu_stop(fd); if (ret) { msg_perr("%s: call to reset_mpu_stop failed.\n", __func__); return ret; } struct lspcon_i2c_spi_data *data = calloc(1, sizeof(struct lspcon_i2c_spi_data)); if (!data) { msg_perr("Unable to allocate space for extra SPI master data.\n"); return SPI_GENERIC_ERROR; } data->fd = fd; spi_master_i2c_lspcon.data = data; ret |= register_shutdown(lspcon_i2c_spi_shutdown, data); ret |= register_spi_master(&spi_master_i2c_lspcon); return ret; }