1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
|
Index: linux-3.1/arch/arm/mach-omap2/board-n8x0.c
===================================================================
--- linux-3.1.orig/arch/arm/mach-omap2/board-n8x0.c 2011-10-30 19:31:22.825292085 +0100
+++ linux-3.1/arch/arm/mach-omap2/board-n8x0.c 2011-10-30 19:31:25.817235793 +0100
@@ -24,6 +24,7 @@
#include <linux/spi/spi.h>
#include <linux/usb/musb.h>
#include <sound/tlv320aic3x.h>
+#include <linux/spi/tsc2005.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@@ -43,6 +44,66 @@ static int slot1_cover_open;
static int slot2_cover_open;
static struct device *mmc_device;
+#define RX51_TSC2005_RESET_GPIO 94
+#define RX51_TSC2005_IRQ_GPIO 106
+
+#ifdef CONFIG_TOUCHSCREEN_TSC2005
+static struct tsc2005_platform_data tsc2005_config;
+static void rx51_tsc2005_set_reset(bool enable)
+{
+ gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
+}
+
+static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
+ .turbo_mode = 0,
+ .single_channel = 1,
+};
+#endif
+
+static void __init tsc2005_set_config(void)
+{
+ const struct omap_lcd_config *conf;
+
+ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
+ if (conf != NULL) {
+#ifdef CONFIG_TOUCHSCREEN_TSC2005
+ if (strcmp(conf->panel_name, "lph8923") == 0) {
+ tsc2005_config.ts_x_plate_ohm = 180;
+ tsc2005_config.ts_pressure_max = 2048;
+ tsc2005_config.ts_pressure_fudge = 2;
+ tsc2005_config.ts_x_max = 4096;
+ tsc2005_config.ts_x_fudge = 4;
+ tsc2005_config.ts_y_max = 4096;
+ tsc2005_config.ts_y_fudge = 7;
+ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
+ } else if (strcmp(conf->panel_name, "ls041y3") == 0) {
+ tsc2005_config.ts_x_plate_ohm = 280;
+ tsc2005_config.ts_pressure_max = 2048;
+ tsc2005_config.ts_pressure_fudge = 2;
+ tsc2005_config.ts_x_max = 4096;
+ tsc2005_config.ts_x_fudge = 4;
+ tsc2005_config.ts_y_max = 4096;
+ tsc2005_config.ts_y_fudge = 7;
+ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
+ } else {
+ printk(KERN_ERR "Unknown panel type, set default "
+ "touchscreen configuration\n");
+ tsc2005_config.ts_x_plate_ohm = 200;
+ }
+#endif
+ }
+}
+
+static struct omap2_mcspi_device_config mipid_mcspi_config = {
+ .turbo_mode = 0,
+ .single_channel = 1,
+};
+
+extern struct mipid_platform_data n8x0_mipid_platform_data;
+
+extern void n8x0_mipid_init(void);
+extern void n8x0_blizzard_init(void);
+
#define TUSB6010_ASYNC_CS 1
#define TUSB6010_SYNC_CS 4
#define TUSB6010_GPIO_INT 58
@@ -145,12 +206,29 @@ static struct omap2_mcspi_device_config
static struct spi_board_info n800_spi_board_info[] __initdata = {
{
+ .modalias = "lcd_mipid",
+ .bus_num = 1,
+ .chip_select = 1,
+ .max_speed_hz = 4000000,
+ .controller_data= &mipid_mcspi_config,
+ .platform_data = &n8x0_mipid_platform_data,
+ },
+ {
.modalias = "p54spi",
.bus_num = 2,
.chip_select = 0,
.max_speed_hz = 48000000,
.controller_data = &p54spi_mcspi_config,
},
+ {
+ .modalias = "tsc2005",
+ .bus_num = 1,
+ .chip_select = 0,
+ .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
+ .max_speed_hz = 6000000,
+ .controller_data = &tsc2005_mcspi_config,
+ .platform_data = &tsc2005_config,
+ },
};
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
@@ -789,6 +867,7 @@ static void __init n8x0_init_machine(voi
n8x0_cbus_init();
/* FIXME: add n810 spi devices */
+ tsc2005_set_config();
spi_register_board_info(n800_spi_board_info,
ARRAY_SIZE(n800_spi_board_info));
omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
@@ -798,6 +877,8 @@ static void __init n8x0_init_machine(voi
i2c_register_board_info(2, n810_i2c_board_info_2,
ARRAY_SIZE(n810_i2c_board_info_2));
board_serial_init();
+ n8x0_mipid_init();
+ n8x0_blizzard_init();
gpmc_onenand_init(board_onenand_data);
n8x0_mmc_init();
n8x0_usb_init();
Index: linux-3.1/arch/arm/mach-omap2/board-n8x0-lcd.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-3.1/arch/arm/mach-omap2/board-n8x0-lcd.c 2011-10-30 19:31:25.817235793 +0100
@@ -0,0 +1,229 @@
+/*
+ * linux/arch/arm/mach-omap2/board-n8x0.c
+ *
+ * Copyright (C) 2005-2009 Nokia Corporation
+ * Author: Juha Yrjola <juha.yrjola@nokia.com>
+ *
+ * Modified from mach-omap2/board-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/omapfb.h>
+
+#include <plat/lcd_mipid.h>
+#include <plat/blizzard.h>
+
+#include "../../../drivers/cbus/tahvo.h"
+
+
+struct tahvo_pwm_device {
+ struct device *dev;
+ int tahvo_7bit_backlight;
+};
+
+static struct tahvo_pwm_device *tahvo_pwm;
+
+static unsigned int tahvo_pwm_get_backlight_level(struct tahvo_pwm_device *pd)
+{
+ unsigned int mask;
+
+ if (pd->tahvo_7bit_backlight)
+ mask = 0x7f;
+ else
+ mask = 0x0f;
+ return tahvo_read_reg(pd->dev, TAHVO_REG_LEDPWMR) & mask;
+}
+
+static unsigned int tahvo_pwm_get_max_backlight_level(struct tahvo_pwm_device *pd)
+{
+ if (pd->tahvo_7bit_backlight)
+ return 0x7f;
+ return 0x0f;
+}
+
+static void tahvo_pwm_set_backlight_level(struct tahvo_pwm_device *pd, unsigned int level)
+{
+ unsigned int max_level;
+
+ max_level = tahvo_pwm_get_max_backlight_level(pd);
+ if (level > max_level)
+ level = max_level;
+ tahvo_write_reg(pd->dev, TAHVO_REG_LEDPWMR, level);
+}
+
+static int __init n8x0_tahvo_pwm_probe(struct platform_device *pdev)
+{
+ struct tahvo_pwm_device *pd;
+ unsigned int rev, id;
+
+ pd = kzalloc(sizeof(*pd), GFP_KERNEL);
+ if (WARN_ON(!pd))
+ return -ENOMEM;
+ pd->dev = &pdev->dev;
+
+ rev = tahvo_read_reg(pd->dev, TAHVO_REG_ASICR);
+ id = (rev >> 8) & 0xff;
+ if (id == 0x03) {
+ if ((rev & 0xff) >= 0x50)
+ pd->tahvo_7bit_backlight = 1;
+ } else if (id == 0x0b)
+ pd->tahvo_7bit_backlight = 1;
+
+ dev_set_drvdata(pd->dev, pd);
+ tahvo_pwm = pd;
+}
+
+static struct platform_driver n8x0_tahvo_pwm_driver = {
+ .driver = {
+ .name = "tahvo-pwm",
+ },
+};
+
+static int __init n8x0_tahvo_pwm_init(void)
+{
+ return platform_driver_probe(&n8x0_tahvo_pwm_driver, n8x0_tahvo_pwm_probe);
+}
+fs_initcall(n8x0_tahvo_pwm_init);
+
+static int n8x0_get_backlight_level(struct mipid_platform_data *pdata)
+{
+ return tahvo_pwm_get_backlight_level(tahvo_pwm);
+}
+
+static int n8x0_get_max_backlight_level(struct mipid_platform_data *pdata)
+{
+ return tahvo_pwm_get_max_backlight_level(tahvo_pwm);
+}
+
+static void n8x0_set_backlight_level(struct mipid_platform_data *pdata, int level)
+{
+ tahvo_pwm_set_backlight_level(tahvo_pwm, level);
+}
+
+#define N8X0_BLIZZARD_POWERDOWN_GPIO 15
+
+// MIPID LCD Panel
+
+static void mipid_shutdown(struct mipid_platform_data *pdata)
+{
+ if (pdata->nreset_gpio != -1) {
+ pr_info("shutdown LCD\n");
+ gpio_set_value(pdata->nreset_gpio, 0);
+ msleep(120);
+ }
+}
+
+struct mipid_platform_data n8x0_mipid_platform_data = {
+ .shutdown = mipid_shutdown,
+ .get_bklight_level = n8x0_get_backlight_level,
+ .set_bklight_level = n8x0_set_backlight_level,
+ .get_bklight_max = n8x0_get_max_backlight_level,
+};
+
+void __init n8x0_mipid_init(void)
+{
+ const struct omap_lcd_config *conf;
+ int err;
+
+ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
+ if (conf != NULL) {
+ n8x0_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
+ n8x0_mipid_platform_data.data_lines = conf->data_lines;
+ if (conf->nreset_gpio != -1) {
+ err = gpio_request(conf->nreset_gpio, "MIPID nreset");
+ if (err) {
+ printk(KERN_ERR "N8x0 MIPID failed to request nreset GPIO %d\n",
+ conf->nreset_gpio);
+ } else {
+ err = gpio_direction_output(conf->nreset_gpio, 1);
+ if (err) {
+ printk(KERN_ERR "N8x0 MIPID failed to set nreset GPIO %d\n",
+ conf->nreset_gpio);
+ }
+ }
+ }
+ printk(KERN_INFO "N8x0 MIPID config loaded");
+ }
+ else
+ printk(KERN_INFO "N8x0 MIPID config not provided");
+}
+
+
+// Epson Blizzard LCD Controller
+
+static struct {
+ struct clk *sys_ck;
+} blizzard;
+
+static int blizzard_get_clocks(void)
+{
+ blizzard.sys_ck = clk_get(0, "osc_ck");
+ if (IS_ERR(blizzard.sys_ck)) {
+ printk(KERN_ERR "can't get Blizzard clock\n");
+ return PTR_ERR(blizzard.sys_ck);
+ }
+ return 0;
+}
+
+static unsigned long blizzard_get_clock_rate(struct device *dev)
+{
+ return clk_get_rate(blizzard.sys_ck);
+}
+
+static void blizzard_enable_clocks(int enable)
+{
+ if (enable)
+ clk_enable(blizzard.sys_ck);
+ else
+ clk_disable(blizzard.sys_ck);
+}
+
+static void blizzard_power_up(struct device *dev)
+{
+ /* Vcore to 1.475V */
+ tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0, 0xf);
+ msleep(10);
+
+ blizzard_enable_clocks(1);
+ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
+}
+
+static void blizzard_power_down(struct device *dev)
+{
+ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 0);
+ blizzard_enable_clocks(0);
+
+ /* Vcore to 1.005V */
+ tahvo_set_clear_reg_bits(tahvo_pwm->dev, 0x07, 0xf, 0);
+}
+
+static struct blizzard_platform_data n8x0_blizzard_data = {
+ .power_up = blizzard_power_up,
+ .power_down = blizzard_power_down,
+ .get_clock_rate = blizzard_get_clock_rate,
+ .te_connected = 1,
+};
+
+void __init n8x0_blizzard_init(void)
+{
+ int r;
+
+ r = gpio_request(N8X0_BLIZZARD_POWERDOWN_GPIO, "Blizzard pd");
+ if (r < 0)
+ {
+ printk(KERN_ERR "Can't get N8x0 Blizzard powerdown GPIO %d\n", N8X0_BLIZZARD_POWERDOWN_GPIO);
+ return;
+ }
+ gpio_direction_output(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
+
+ blizzard_get_clocks();
+ omapfb_set_ctrl_platform_data(&n8x0_blizzard_data);
+
+ printk(KERN_INFO "N8x0 Blizzard initialized");
+}
Index: linux-3.1/arch/arm/mach-omap2/Makefile
===================================================================
--- linux-3.1.orig/arch/arm/mach-omap2/Makefile 2011-10-30 19:14:57.705562343 +0100
+++ linux-3.1/arch/arm/mach-omap2/Makefile 2011-10-30 19:31:25.817235793 +0100
@@ -209,6 +209,7 @@ obj-$(CONFIG_MACH_OMAP_3430SDP) += boar
hsmmc.o \
board-flash.o
obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
+obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0-lcd.o
obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \
sdram-nokia.o \
hsmmc.o
Index: linux-3.1/arch/arm/mach-omap2/omap_hwmod_2420_data.c
===================================================================
--- linux-3.1.orig/arch/arm/mach-omap2/omap_hwmod_2420_data.c 2011-10-30 19:14:57.689562700 +0100
+++ linux-3.1/arch/arm/mach-omap2/omap_hwmod_2420_data.c 2011-10-30 19:31:25.817235793 +0100
@@ -1181,6 +1181,7 @@ static struct omap_hwmod_ocp_if *omap242
static struct omap_hwmod omap2420_gpio1_hwmod = {
.name = "gpio1",
+ .flags = HWMOD_INIT_NO_RESET, /* Workaround: Don't reset the n810 MIPID */
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap2_gpio1_irqs,
.main_clk = "gpios_fck",
|