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authorJoey Castillo <jose.castillo@gmail.com>2021-09-21 15:49:02 -0400
committerJoey Castillo <jose.castillo@gmail.com>2021-09-21 15:50:43 -0400
commitfd5e8046d0b328578b209a8e51d53f62cbdfdd06 (patch)
tree3d2ddd446a1a5cdb082f91ccbe1e8cf1fea719b4
parent63322a3b7f7f5d5534fbd933576c7fcf69103afb (diff)
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support alternate LCD pinouts
-rw-r--r--boards/OSO-MISC-21-013/pins.h36
-rw-r--r--watch-library/config/hpl_slcd_config.h44
2 files changed, 71 insertions, 9 deletions
diff --git a/boards/OSO-MISC-21-013/pins.h b/boards/OSO-MISC-21-013/pins.h
index 66e4bdc2..a4e936a4 100644
--- a/boards/OSO-MISC-21-013/pins.h
+++ b/boards/OSO-MISC-21-013/pins.h
@@ -62,6 +62,42 @@
#define SLCD24 GPIO(GPIO_PORTA, 21)
#define SLCD25 GPIO(GPIO_PORTA, 22)
#define SLCD26 GPIO(GPIO_PORTA, 23)
+// This board uses a slightly different pin mapping from the standard watch, and it's not enough to
+// just declare the pins. We also have to set the LCD Pin Enable register with the SLCD pins we're
+// using. These numbers are not port/pin numbers, but the "SLCD/LP[x]" numbers in the pinmux table.
+// If not defined in pins.h, the LCD drover will fall back to the pin mapping in hpl_slcd_config.h.
+// LPENL is for pins SLCD/LP[0..31].
+#define CONF_SLCD_LPENL (\
+ (uint32_t)1 << 0 | \
+ (uint32_t)1 << 1 | \
+ (uint32_t)1 << 2 | \
+ (uint32_t)1 << 3 | \
+ (uint32_t)1 << 5 | \
+ (uint32_t)1 << 6 | \
+ (uint32_t)1 << 11 | \
+ (uint32_t)1 << 12 | \
+ (uint32_t)1 << 13 | \
+ (uint32_t)1 << 14 | \
+ (uint32_t)1 << 21 | \
+ (uint32_t)1 << 22 | \
+ (uint32_t)1 << 23 | \
+ (uint32_t)1 << 24 | \
+ (uint32_t)1 << 25 | \
+ (uint32_t)1 << 30 | \
+ (uint32_t)1 << 31 | 0)
+// LPENH is for pins SLCD/LP[32..51], where bit 0 represents pin 32.
+#define CONF_SLCD_LPENH (\
+ (uint32_t)1 << (32 - 32) | \
+ (uint32_t)1 << (33 - 32) | \
+ (uint32_t)1 << (34 - 32) | \
+ (uint32_t)1 << (35 - 32) | \
+ (uint32_t)1 << (42 - 32) | \
+ (uint32_t)1 << (43 - 32) | \
+ (uint32_t)1 << (48 - 32) | \
+ (uint32_t)1 << (49 - 32) | \
+ (uint32_t)1 << (50 - 32) | \
+ (uint32_t)1 << (51 - 32) | 0)
+
// 9-pin connector
#define A0 GPIO(GPIO_PORTB, 4)
diff --git a/watch-library/config/hpl_slcd_config.h b/watch-library/config/hpl_slcd_config.h
index 72213432..5e3b2ca2 100644
--- a/watch-library/config/hpl_slcd_config.h
+++ b/watch-library/config/hpl_slcd_config.h
@@ -6,6 +6,7 @@
#include <hpl_slcd_cm.h>
#include <peripheral_clk_config.h>
+#include "pins.h"
// <h> Standard configuration
@@ -2729,15 +2730,40 @@
} \
}
-#define CONF_SLCD_LPENL \
- ((uint32_t)1 << 0 | (uint32_t)1 << 1 | (uint32_t)1 << 2 | (uint32_t)1 << 3 | (uint32_t)1 << 4 | (uint32_t)1 << 5 \
- | (uint32_t)1 << 6 | (uint32_t)1 << 7 | (uint32_t)1 << 11 | (uint32_t)1 << 12 | (uint32_t)1 << 13 \
- | (uint32_t)1 << 14 | (uint32_t)1 << 21 | (uint32_t)1 << 22 | (uint32_t)1 << 23 | (uint32_t)1 << 24 \
- | (uint32_t)1 << 25 | (uint32_t)1 << 28 | (uint32_t)1 << 29 | (uint32_t)1 << 30 | (uint32_t)1 << 31 | 0)
-
-#define CONF_SLCD_LPENH \
- ((uint32_t)1 << 0 | (uint32_t)1 << 1 | (uint32_t)1 << 2 | (uint32_t)1 << 3 | (uint32_t)1 << 10 | (uint32_t)1 << 11 \
- | 0) // </e>
+#ifndef CONF_SLCD_LPENL
+#define CONF_SLCD_LPENL (\
+ (uint32_t)1 << 0 | \
+ (uint32_t)1 << 1 | \
+ (uint32_t)1 << 2 | \
+ (uint32_t)1 << 3 | \
+ (uint32_t)1 << 4 | \
+ (uint32_t)1 << 5 | \
+ (uint32_t)1 << 6 | \
+ (uint32_t)1 << 7 | \
+ (uint32_t)1 << 11 | \
+ (uint32_t)1 << 12 | \
+ (uint32_t)1 << 13 | \
+ (uint32_t)1 << 14 | \
+ (uint32_t)1 << 21 | \
+ (uint32_t)1 << 22 | \
+ (uint32_t)1 << 23 | \
+ (uint32_t)1 << 24 | \
+ (uint32_t)1 << 25 | \
+ (uint32_t)1 << 28 | \
+ (uint32_t)1 << 29 | \
+ (uint32_t)1 << 30 | \
+ (uint32_t)1 << 31 | 0)
+#endif // CONF_SLCD_LPENL
+
+#ifndef CONF_SLCD_LPENH
+#define CONF_SLCD_LPENH (\
+ (uint32_t)1 << (32 - 32) | \
+ (uint32_t)1 << (33 - 32) | \
+ (uint32_t)1 << (34 - 32) | \
+ (uint32_t)1 << (35 - 32) | \
+ (uint32_t)1 << (42 - 32) | \
+ (uint32_t)1 << (43 - 32) | 0)
+#endif // CONF_SLCD_LPENH
// <<< end of configuration section >>>