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author | Joey Castillo <joeycastillo@utexas.edu> | 2021-12-11 11:24:28 -0500 |
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committer | Joey Castillo <joeycastillo@utexas.edu> | 2021-12-11 11:24:28 -0500 |
commit | 405addafe77baa7aaca836c45ded6718312cfbf1 (patch) | |
tree | 916be720a64a6f0d31598ca643fc15bfda99d3c5 /movement | |
parent | e4f9737e21b6489be04e43f0af23aa968dba9ac2 (diff) | |
download | Sensor-Watch-405addafe77baa7aaca836c45ded6718312cfbf1.tar.gz Sensor-Watch-405addafe77baa7aaca836c45ded6718312cfbf1.tar.bz2 Sensor-Watch-405addafe77baa7aaca836c45ded6718312cfbf1.zip |
untested WIP, connect TC2's count to RTC's PER0 tickmovement-timer-stuff
Diffstat (limited to 'movement')
-rw-r--r-- | movement/movement.c | 19 | ||||
-rw-r--r-- | movement/movement_config.h | 1 |
2 files changed, 16 insertions, 4 deletions
diff --git a/movement/movement.c b/movement/movement.c index 84461349..c7b9cbd8 100644 --- a/movement/movement.c +++ b/movement/movement.c @@ -172,7 +172,18 @@ void app_setup(void) { } // set up our low-power timer/counter for custom tick intervals - // why is it low-power? because we clock it from the 32768 Hz GCLK3! + hri_mclk_set_APBCMASK_EVSYS_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, EVSYS_GCLK_ID_0, GCLK_PCHCTRL_GEN_GCLK3_Val | GCLK_PCHCTRL_CHEN); + + hri_evsys_set_CTRLA_SWRST_bit(EVSYS); + while(hri_evsys_get_CTRLA_SWRST_bit(EVSYS)); + hri_evsys_write_USER_reg(EVSYS, 1, EVSYS_ID_USER_TC2_EVU); + hri_evsys_write_CHANNEL_reg(EVSYS, 0, EVSYS_CHANNEL_PATH_ASYNCHRONOUS | EVSYS_CHANNEL_EDGSEL_FALLING_EDGE | EVSYS_CHANNEL_EVGEN(EVSYS_ID_GEN_RTC_PER_0)); + + while (!hri_evsys_get_CHSTATUS_USRRDY0_bit(EVSYS)); + + hri_rtcmode2_set_EVCTRL_PEREO0_bit(RTC); + hri_gclk_write_PCHCTRL_reg(GCLK, TC2_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK3_Val | GCLK_PCHCTRL_CHEN); hri_mclk_set_APBCMASK_TC2_bit(MCLK); hri_tc_clear_CTRLA_ENABLE_bit(TC2); // disable it @@ -180,10 +191,11 @@ void app_setup(void) { hri_tc_write_CTRLA_reg(TC2, TC_CTRLA_SWRST); // reset it hri_tc_wait_for_sync(TC2, TC_SYNCBUSY_SWRST); // wait for it to be reset // cool. now configure it: - hri_tc_write_CTRLA_reg(TC2, TC_CTRLA_PRESCALER_DIV256 | // divide the 32768 Hz input by 256 to count at 128 Hz + hri_tc_set_EVCTRL_EVACT_bf(TC2, TC_EVCTRL_EVACT_COUNT_Val); + hri_tc_write_CTRLA_reg(TC2, TC_CTRLA_PRESCALER_DIV1 | // no division factor TC_CTRLA_MODE_COUNT8 | // count in 8-bit mode TC_CTRLA_RUNSTDBY); // run in standby since this will time our waking up from standby. - hri_tccount8_write_PER_reg(TC2, 32); // 128 / 256 = 1 Hz + hri_tccount8_write_PER_reg(TC2, 128); // 128 / 256 = 1 Hz // set an interrupt when the value overflows PER. This is our tick, and it will call TC2_Handler below. hri_tc_set_INTEN_OVF_bit(TC2); NVIC_ClearPendingIRQ(TC2_IRQn); @@ -215,7 +227,6 @@ void app_setup(void) { } void TC2_Handler(void) { - printf("TICK!\n"); TC2->COUNT8.INTFLAG.reg |= TC_INTFLAG_OVF; } diff --git a/movement/movement_config.h b/movement/movement_config.h index 6aeb0b83..1f048971 100644 --- a/movement/movement_config.h +++ b/movement/movement_config.h @@ -18,6 +18,7 @@ #include "demo_face.h" const watch_face_t watch_faces[] = { + demo_face, simple_clock_face, preferences_face, set_time_face, |