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author | joeycastillo <joeycastillo@utexas.edu> | 2021-08-30 14:42:11 -0400 |
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committer | GitHub <noreply@github.com> | 2021-08-30 14:42:11 -0400 |
commit | eb3d9b26cbda2d2612f11eb39843b221224f1fa7 (patch) | |
tree | 7a514b4d21dd0d2a324a5e1313a144f26bf20799 /tinyusb/hw/bsp/rx | |
parent | ee9cc322d301631c9ff0751d9bed717c6492b6a5 (diff) | |
parent | b0845cc3f1a8234a30c980eccf10e44765e4e105 (diff) | |
download | Sensor-Watch-eb3d9b26cbda2d2612f11eb39843b221224f1fa7.tar.gz Sensor-Watch-eb3d9b26cbda2d2612f11eb39843b221224f1fa7.tar.bz2 Sensor-Watch-eb3d9b26cbda2d2612f11eb39843b221224f1fa7.zip |
Merge pull request #9 from joeycastillo/usb-refactor
USB refactor / Makefile simplification
Diffstat (limited to 'tinyusb/hw/bsp/rx')
-rwxr-xr-x | tinyusb/hw/bsp/rx/boards/gr_citrus/board.mk | 24 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/rx/boards/gr_citrus/gr_citrus.c | 275 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/rx/boards/gr_citrus/hwinit.c | 31 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/rx/boards/gr_citrus/r5f5631fd.ld | 127 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/rx/boards/rx65n_target/board.mk | 25 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld | 168 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/rx/boards/rx65n_target/rx65n_target.c | 320 | ||||
-rwxr-xr-x | tinyusb/hw/bsp/rx/family.mk | 32 |
8 files changed, 1002 insertions, 0 deletions
diff --git a/tinyusb/hw/bsp/rx/boards/gr_citrus/board.mk b/tinyusb/hw/bsp/rx/boards/gr_citrus/board.mk new file mode 100755 index 00000000..0eba9461 --- /dev/null +++ b/tinyusb/hw/bsp/rx/boards/gr_citrus/board.mk @@ -0,0 +1,24 @@ +DEPS_SUBMODULES += hw/mcu/renesas/rx + +CFLAGS += \ + -mcpu=rx610 \ + -misa=v1 \ + -DCFG_TUSB_MCU=OPT_MCU_RX63X + +MCU_DIR = hw/mcu/renesas/rx/rx63n + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/r5f5631fd.ld + +# For freeRTOS port source +FREERTOS_PORT = RX600 + +# For flash-jlink target +JLINK_DEVICE = R5F5631F +JLINK_IF = JTAG + +# For flash-pyocd target +PYOCD_TARGET = + +# flash using jlink +flash: flash-jlink diff --git a/tinyusb/hw/bsp/rx/boards/gr_citrus/gr_citrus.c b/tinyusb/hw/bsp/rx/boards/gr_citrus/gr_citrus.c new file mode 100755 index 00000000..caf5fd6f --- /dev/null +++ b/tinyusb/hw/bsp/rx/boards/gr_citrus/gr_citrus.c @@ -0,0 +1,275 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* How to connect JLink and GR-CITRUS + * + * GR-CITRUS needs to solder some pads to enable JTAG interface. + * - Short the following pads individually with solder. + * - J4 + * - J5 + * - Short EMLE pad and 3.3V(GR-CITRUS pin name) with a wire. + * + * The pads are [the back side of GR-CITRUS](https://www.slideshare.net/MinaoYamamoto/grcitrusrx631/2). + * + * Connect the pins between GR-CITRUS and JLink as follows. + * + * | Function | GR-CITRUS pin | JLink pin No.| note | + * |:---------:|:-------------:|:------------:|:--------:| + * | VTref | 3.3V | 1 | | + * | TRST | 5 | 3 | | + * | GND | GND | 4 | | + * | TDI | 3 | 5 | | + * | TMS | 2 | 7 | | + * | TCK/FINEC | 14 | 9 | short J4 | + * | TDO | 9 | 13 | short J5 | + * | nRES | RST | 15 | | + * + * JLink firmware needs to update to V6.96 or newer version to avoid + * [a bug](https://forum.segger.com/index.php/Thread/7758-SOLVED-Bug-in-JLink-from-V6-88b-regarding-RX65N) + * regarding downloading. + */ + +#include "../board.h" +#include "iodefine.h" +#include "interrupt_handlers.h" + +#define IRQ_PRIORITY_CMT0 5 +#define IRQ_PRIORITY_USBI0 6 +#define IRQ_PRIORITY_SCI0 5 + +#define SYSTEM_PRCR_PRC1 (1<<1) +#define SYSTEM_PRCR_PRKEY (0xA5u<<8) + +#define CMT_PCLK 48000000 +#define CMT_CMCR_CKS_DIV_128 2 +#define CMT_CMCR_CMIE (1<<6) +#define MPC_PFS_ISEL (1<<6) + +#define SCI_PCLK 48000000 +#define SCI_SSR_FER (1<<4) +#define SCI_SSR_ORER (1<<5) + +#define SCI_SCR_TEIE (1u<<2) +#define SCI_SCR_RE (1u<<4) +#define SCI_SCR_TE (1u<<5) +#define SCI_SCR_RIE (1u<<6) +#define SCI_SCR_TIE (1u<<7) + +//--------------------------------------------------------------------+ +// SCI0 handling +//--------------------------------------------------------------------+ +typedef struct { + uint8_t *buf; + uint32_t cnt; +} sci_buf_t; +static volatile sci_buf_t sci0_buf[2]; + +void INT_Excep_SCI0_TXI0(void) +{ + uint8_t *buf = sci0_buf[0].buf; + uint32_t cnt = sci0_buf[0].cnt; + + if (!buf || !cnt) { + SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); + return; + } + SCI0.TDR = *buf; + if (--cnt) { + ++buf; + } else { + buf = NULL; + SCI0.SCR.BIT.TIE = 0; + SCI0.SCR.BIT.TEIE = 1; + } + sci0_buf[0].buf = buf; + sci0_buf[0].cnt = cnt; +} + +void INT_Excep_SCI0_TEI0(void) +{ + SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); +} + +void INT_Excep_SCI0_RXI0(void) +{ + uint8_t *buf = sci0_buf[1].buf; + uint32_t cnt = sci0_buf[1].cnt; + + if (!buf || !cnt || + (SCI0.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) { + sci0_buf[1].buf = NULL; + SCI0.SSR.BYTE = 0; + SCI0.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); + return; + } + *buf = SCI0.RDR; + if (--cnt) { + ++buf; + } else { + buf = NULL; + SCI0.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); + } + sci0_buf[1].buf = buf; + sci0_buf[1].cnt = cnt; +} + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void INT_Excep_USB0_USBI0(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ +#if CFG_TUSB_OS == OPT_OS_NONE + /* Enable CMT0 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(CMT0) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + /* Setup 1ms tick timer */ + CMT0.CMCNT = 0; + CMT0.CMCOR = CMT_PCLK / 1000 / 128; + CMT0.CMCR.WORD = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128; + IR(CMT0, CMI0) = 0; + IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0; + IEN(CMT0, CMI0) = 1; + CMT.CMSTR0.BIT.STR0 = 1; +#endif + + /* Unlock MPC registers */ + MPC.PWPR.BIT.B0WI = 0; + MPC.PWPR.BIT.PFSWE = 1; + /* LED PA0 */ + PORTA.PMR.BIT.B0 = 0U; + PORTA.PODR.BIT.B0 = 0U; + PORTA.PDR.BIT.B0 = 1U; + /* UART TXD0 => P20, RXD0 => P21 */ + PORT2.PMR.BIT.B0 = 1U; + PORT2.PCR.BIT.B0 = 1U; + MPC.P20PFS.BYTE = 0b01010; + PORT2.PMR.BIT.B1 = 1U; + MPC.P21PFS.BYTE = 0b01010; + /* USB VBUS -> P16 DPUPE -> P14 */ + PORT1.PMR.BIT.B4 = 1U; + PORT1.PMR.BIT.B6 = 1U; + MPC.P14PFS.BYTE = 0b10001; + MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001; + MPC.PFUSB0.BIT.PUPHZS = 1; + /* Lock MPC registers */ + MPC.PWPR.BIT.PFSWE = 0; + MPC.PWPR.BIT.B0WI = 1; + + IR(USB0, USBI0) = 0; + IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0; + + /* Enable SCI0 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(SCI0) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + SCI0.BRR = (SCI_PCLK / (32 * 115200)) - 1; + IR(SCI0, RXI0) = 0; + IR(SCI0, TXI0) = 0; + IR(SCI0, TEI0) = 0; + IPR(SCI0, RXI0) = IRQ_PRIORITY_SCI0; + IPR(SCI0, TXI0) = IRQ_PRIORITY_SCI0; + IPR(SCI0, TEI0) = IRQ_PRIORITY_SCI0; + IEN(SCI0, RXI0) = 1; + IEN(SCI0, TXI0) = 1; + IEN(SCI0, TEI0) = 1; +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + PORTA.PODR.BIT.B0 = state ? 1 : 0; +} + +uint32_t board_button_read(void) +{ + return 0; +} + +int board_uart_read(uint8_t* buf, int len) +{ + sci0_buf[1].buf = buf; + sci0_buf[1].cnt = len; + SCI0.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE; + while (SCI0.SCR.BIT.RE) ; + return len - sci0_buf[1].cnt; +} + +int board_uart_write(void const *buf, int len) +{ + sci0_buf[0].buf = (uint8_t*)buf; + sci0_buf[0].cnt = len; + SCI0.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE; + while (SCI0.SCR.BIT.TE) ; + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void INT_Excep_CMT0_CMI0(void) +{ + ++system_ticks; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#else +uint32_t SystemCoreClock = 96000000; +#endif + +int close(int fd) +{ + (void)fd; + return -1; +} +int fstat(int fd, void *pstat) +{ + (void)fd; + (void)pstat; + return 0; +} +off_t lseek(int fd, off_t pos, int whence) +{ + (void)fd; + (void)pos; + (void)whence; + return 0; +} +int isatty(int fd) +{ + (void)fd; + return 1; +} diff --git a/tinyusb/hw/bsp/rx/boards/gr_citrus/hwinit.c b/tinyusb/hw/bsp/rx/boards/gr_citrus/hwinit.c new file mode 100755 index 00000000..8245d774 --- /dev/null +++ b/tinyusb/hw/bsp/rx/boards/gr_citrus/hwinit.c @@ -0,0 +1,31 @@ +/************************************************************************/ +/* File Version: V1.00 */ +/* Date Generated: 08/07/2013 */ +/************************************************************************/ + +#include "iodefine.h" +#ifdef __cplusplus +extern "C" { +#endif +extern void HardwareSetup(void); +#ifdef __cplusplus +} +#endif + +void HardwareSetup(void) +{ + SYSTEM.PRCR.WORD = 0xA503u; + SYSTEM.SOSCCR.BYTE = 0x01u; + SYSTEM.MOSCWTCR.BYTE = 0x0Du; + SYSTEM.PLLWTCR.BYTE = 0x0Eu; + SYSTEM.PLLCR.WORD = 0x0F00u; + SYSTEM.MOSCCR.BYTE = 0x00u; + SYSTEM.PLLCR2.BYTE = 0x00u; + for (unsigned i = 0; i < 2075u; ++i) __asm("nop"); + SYSTEM.SCKCR.LONG = 0x21021211u; + SYSTEM.SCKCR2.WORD = 0x0033u; + SYSTEM.SCKCR3.WORD = 0x0400u; + SYSTEM.SYSCR0.WORD = 0x5A01; + SYSTEM.MSTPCRB.BIT.MSTPB15 = 0; + SYSTEM.PRCR.WORD = 0xA500u; +} diff --git a/tinyusb/hw/bsp/rx/boards/gr_citrus/r5f5631fd.ld b/tinyusb/hw/bsp/rx/boards/gr_citrus/r5f5631fd.ld new file mode 100755 index 00000000..bb9c297c --- /dev/null +++ b/tinyusb/hw/bsp/rx/boards/gr_citrus/r5f5631fd.ld @@ -0,0 +1,127 @@ +__USTACK_SIZE = 0x00000400; +__ISTACK_SIZE = 0x00000400; + +MEMORY +{ + RAM : ORIGIN = 0x4, LENGTH = 0x3fffc + ROM : ORIGIN = 0xFFE00000, LENGTH = 0x200000 +} +SECTIONS +{ + .fvectors 0xFFFFFF80: AT(0xFFFFFF80) + { + KEEP(*(.fvectors)) + } > ROM + .text 0xFFE00000: AT(0xFFE00000) + { + *(.text) + *(.text.*) + *(P) + etext = .; + } > ROM + .rvectors ALIGN(4): + { + _rvectors_start = .; + KEEP(*(.rvectors)) + _rvectors_end = .; + } > ROM + .init : + { + KEEP(*(.init)) + __preinit_array_start = .; + KEEP(*(.preinit_array)) + __preinit_array_end = .; + __init_array_start = (. + 3) & ~ 3; + KEEP(*(.init_array)) + KEEP(*(SORT(.init_array.*))) + __init_array_end = .; + __fini_array_start = .; + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + __fini_array_end = .; + } > ROM + .fini : + { + KEEP(*(.fini)) + } > ROM + .got : + { + *(.got) + *(.got.plt) + } > ROM + .rodata : + { + *(.rodata) + *(.rodata.*) + *(C_1) + *(C_2) + *(C) + _erodata = .; + } > ROM + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > ROM + .eh_frame : + { + *(.eh_frame) + } > ROM + .jcr : + { + *(.jcr) + } > ROM + .tors : + { + __CTOR_LIST__ = .; + . = ALIGN(2); + ___ctors = .; + *(.ctors) + ___ctors_end = .; + __CTOR_END__ = .; + __DTOR_LIST__ = .; + ___dtors = .; + *(.dtors) + ___dtors_end = .; + __DTOR_END__ = .; + . = ALIGN(2); + _mdata = .; + } > ROM + .data : AT(_mdata) + { + _data = .; + *(.data) + *(.data.*) + *(D) + *(D_1) + *(D_2) + _edata = .; + } > RAM + .gcc_exc : + { + *(.gcc_exc) + } > RAM + .bss : + { + _bss = .; + *(.bss) + *(.bss.**) + *(COMMON) + *(B) + *(B_1) + *(B_2) + _ebss = .; + _end = .; + } > RAM + .ustack : + { + . = ALIGN(8); + . = . + __USTACK_SIZE; + PROVIDE(_ustack = .); + } > RAM + .istack : + { + . = ALIGN(8); + . = . + __ISTACK_SIZE; + PROVIDE(_istack = .); + } > RAM +} diff --git a/tinyusb/hw/bsp/rx/boards/rx65n_target/board.mk b/tinyusb/hw/bsp/rx/boards/rx65n_target/board.mk new file mode 100755 index 00000000..fc76d79f --- /dev/null +++ b/tinyusb/hw/bsp/rx/boards/rx65n_target/board.mk @@ -0,0 +1,25 @@ +CFLAGS += \ + -mcpu=rx64m \ + -misa=v2 \ + -DCFG_TUSB_MCU=OPT_MCU_RX65X \ + -DIR_USB0_USBI0=IR_PERIB_INTB185 \ + -DIER_USB0_USBI0=IER_PERIB_INTB185 \ + -DIEN_USB0_USBI0=IEN_PERIB_INTB185 + +MCU_DIR = hw/mcu/renesas/rx/rx65n + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/r5f565ne.ld + +# For freeRTOS port source +FREERTOS_PORT = RX600 + +# For flash-jlink target +JLINK_DEVICE = R5F565NE +JLINK_IF = JTAG + +# For flash-pyocd target +PYOCD_TARGET = + +# flash using rfp-cli +flash: flash-rfp diff --git a/tinyusb/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld b/tinyusb/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld new file mode 100755 index 00000000..8e5617f2 --- /dev/null +++ b/tinyusb/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld @@ -0,0 +1,168 @@ +__USTACK_SIZE = 0x00000400; +__ISTACK_SIZE = 0x00000400; + +MEMORY +{ + RAM : ORIGIN = 0x4, LENGTH = 0x3fffc + RAM2 : ORIGIN = 0x00800000, LENGTH = 0x60000 + OFS : ORIGIN = 0xFE7F5D00, LENGTH = 128 + ROM : ORIGIN = 0xFFE00000, LENGTH = 0x200000 +} +SECTIONS +{ + .exvectors 0xFFFFFF80: AT(0xFFFFFF80) + { + "_exvectors_start" = .; + KEEP(*(.exvectors)) + "_exvectors_end" = .; + } >ROM + .fvectors 0xFFFFFFFC: AT(0xFFFFFFFC) + { + KEEP(*(.fvectors)) + } > ROM + .text 0xFFE00000: AT(0xFFE00000) + { + *(.text) + *(.text.*) + *(P) + KEEP(*(.text.*_isr)) + etext = .; + } > ROM + .rvectors ALIGN(4): + { + _rvectors_start = .; + KEEP(*(.rvectors)) + _rvectors_end = .; + } > ROM + .init : + { + KEEP(*(.init)) + __preinit_array_start = .; + KEEP(*(.preinit_array)) + __preinit_array_end = .; + __init_array_start = (. + 3) & ~ 3; + KEEP(*(.init_array)) + KEEP(*(SORT(.init_array.*))) + __init_array_end = .; + __fini_array_start = .; + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + __fini_array_end = .; + } > ROM + .fini : + { + KEEP(*(.fini)) + } > ROM + .got : + { + *(.got) + *(.got.plt) + } > ROM + .rodata : + { + *(.rodata) + *(.rodata.*) + *(C_1) + *(C_2) + *(C) + _erodata = .; + } > ROM + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > ROM + .eh_frame : + { + *(.eh_frame) + } > ROM + .jcr : + { + *(.jcr) + } > ROM + .tors : + { + __CTOR_LIST__ = .; + . = ALIGN(2); + ___ctors = .; + *(.ctors) + ___ctors_end = .; + __CTOR_END__ = .; + __DTOR_LIST__ = .; + ___dtors = .; + *(.dtors) + ___dtors_end = .; + __DTOR_END__ = .; + . = ALIGN(2); + _mdata = .; + } > ROM + .data : AT(_mdata) + { + _data = .; + *(.data) + *(.data.*) + *(D) + *(D_1) + *(D_2) + _edata = .; + } > RAM + .gcc_exc : + { + *(.gcc_exc) + } > RAM + .bss : + { + _bss = .; + *(.bss) + *(.bss.**) + *(COMMON) + *(B) + *(B_1) + *(B_2) + _ebss = .; + _end = .; + } > RAM + .ustack : + { + . = ALIGN(8); + . = . + __USTACK_SIZE; + PROVIDE(_ustack = .); + } > RAM + .istack : + { + . = ALIGN(8); + . = . + __ISTACK_SIZE; + PROVIDE(_istack = .); + } > RAM + .ofs1 0xFE7F5D00: AT(0xFE7F5D00) + { + KEEP(*(.ofs1)) + } > OFS + .ofs2 0xFE7F5D10: AT(0xFE7F5D10) + { + KEEP(*(.ofs2)) + } > OFS + .ofs3 0xFE7F5D20: AT(0xFE7F5D20) + { + KEEP(*(.ofs3)) + } > OFS + .ofs4 0xFE7F5D40: AT(0xFE7F5D40) + { + KEEP(*(.ofs4)) + } > OFS + .ofs5 0xFE7F5D48: AT(0xFE7F5D48) + { + KEEP(*(.ofs5)) + } > OFS + .ofs6 0xFE7F5D50: AT(0xFE7F5D50) + { + KEEP(*(.ofs6)) + } > OFS + .ofs7 0xFE7F5D64: AT(0xFE7F5D64) + { + KEEP(*(.ofs7)) + } > OFS + .ofs8 0xFE7F5D70: AT(0xFE7F5D70) + { + KEEP(*(.ofs8)) + } > OFS +} diff --git a/tinyusb/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/tinyusb/hw/bsp/rx/boards/rx65n_target/rx65n_target.c new file mode 100755 index 00000000..20867455 --- /dev/null +++ b/tinyusb/hw/bsp/rx/boards/rx65n_target/rx65n_target.c @@ -0,0 +1,320 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* How to connect JLink and RX65n Target and option board + * (For original comment https://github.com/hathach/tinyusb/pull/922#issuecomment-869786131) + * + * To enable JTAG, RX65N requires following connections on main board. + * - short EJ2 jumper header, to disable onboard E2L. + * - short EMLE(J1-2) and 3V3(J1-14 or J2-10), to enable In-Circuit Emulator. + * + * Note: For RX65N-Cloud-Kit, the option board's JTAG pins to some switches or floating. + * To use JLink with the option board, I think some further modifications will be necessary. + * + * | Function | RX65N pin | main board | option board | JLink connector | + * |:---------:|:----------:|:----------:|:------------:|:---------------:| + * | 3V3 | VCC | J1-14 | CN5-6 | 1 | + * | TRST | P34 | J1-16 | CN5-7 | 3 | + * | GND | VSS | J1-12 | CN5-5 | 4 | + * | TDI | P30 | J1-20 | CN5-10 | 5 | + * | TMS | P31 | J1-19 | USER_SW | 7 | + * | TCK/FINEC | P27 | J1-21 | N/A | 9 | + * | TDO | P26 | J1-22 | CN5-9 | 13 | + * | nRES | RES# | J1-10 | RESET_SW | 15 | + * + * JLink firmware needs to update to V6.96 or newer version to avoid + * [a bug](https://forum.segger.com/index.php/Thread/7758-SOLVED-Bug-in-JLink-from-V6-88b-regarding-RX65N) + * regarding downloading. + */ + +#include "bsp/board.h" +#include "iodefine.h" +#include "interrupt_handlers.h" + +#define IRQ_PRIORITY_CMT0 5 +#define IRQ_PRIORITY_USBI0 6 +#define IRQ_PRIORITY_SCI5 5 + +#define SYSTEM_PRCR_PRC1 (1<<1) +#define SYSTEM_PRCR_PRKEY (0xA5u<<8) + +#define CMT_PCLK 60000000 +#define CMT_CMCR_CKS_DIV_128 2 +#define CMT_CMCR_CMIE (1<<6) +#define MPC_PFS_ISEL (1<<6) + +#define SCI_PCLK 60000000 +#define SCI_SSR_FER (1<<4) +#define SCI_SSR_ORER (1<<5) + +#define SCI_SCR_TEIE (1u<<2) +#define SCI_SCR_RE (1u<<4) +#define SCI_SCR_TE (1u<<5) +#define SCI_SCR_RIE (1u<<6) +#define SCI_SCR_TIE (1u<<7) +#define INT_Excep_SCI5_TEI5 INT_Excep_ICU_GROUPBL0 + +#define IRQ_USB0_USBI0 62 +#define SLIBR_USBI0 SLIBR185 +#define IPR_USB0_USBI0 IPR_PERIB_INTB185 +#define INT_Excep_USB0_USBI0 INT_Excep_PERIB_INTB185 + +void HardwareSetup(void) +{ + FLASH.ROMCIV.WORD = 1; + while (FLASH.ROMCIV.WORD) ; + FLASH.ROMCE.WORD = 1; + while (!FLASH.ROMCE.WORD) ; + + SYSTEM.PRCR.WORD = 0xA503u; + if (!SYSTEM.RSTSR1.BYTE) { + RTC.RCR4.BYTE = 0; + RTC.RCR3.BYTE = 12; + while (12 != RTC.RCR3.BYTE) ; + } + SYSTEM.SOSCCR.BYTE = 1; + + if (SYSTEM.HOCOCR.BYTE) { + SYSTEM.HOCOCR.BYTE = 0; + while (!SYSTEM.OSCOVFSR.BIT.HCOVF) ; + } + SYSTEM.PLLCR.WORD = 0x1D10u; /* HOCO x 15 */ + SYSTEM.PLLCR2.BYTE = 0; + while (!SYSTEM.OSCOVFSR.BIT.PLOVF) ; + + SYSTEM.SCKCR.LONG = 0x21C11222u; + SYSTEM.SCKCR2.WORD = 0x0041u; + SYSTEM.ROMWT.BYTE = 0x02u; + while (0x02u != SYSTEM.ROMWT.BYTE) ; + SYSTEM.SCKCR3.WORD = 0x400u; + SYSTEM.PRCR.WORD = 0xA500u; +} + +//--------------------------------------------------------------------+ +// SCI handling +//--------------------------------------------------------------------+ +typedef struct { + uint8_t *buf; + uint32_t cnt; +} sci_buf_t; +static volatile sci_buf_t sci_buf[2]; + +void INT_Excep_SCI5_TXI5(void) +{ + uint8_t *buf = sci_buf[0].buf; + uint32_t cnt = sci_buf[0].cnt; + + if (!buf || !cnt) { + SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); + return; + } + SCI5.TDR = *buf; + if (--cnt) { + ++buf; + } else { + buf = NULL; + SCI5.SCR.BIT.TIE = 0; + SCI5.SCR.BIT.TEIE = 1; + } + sci_buf[0].buf = buf; + sci_buf[0].cnt = cnt; +} + +void INT_Excep_SCI5_TEI5(void) +{ + SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); +} + +void INT_Excep_SCI5_RXI5(void) +{ + uint8_t *buf = sci_buf[1].buf; + uint32_t cnt = sci_buf[1].cnt; + + if (!buf || !cnt || + (SCI5.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) { + sci_buf[1].buf = NULL; + SCI5.SSR.BYTE = 0; + SCI5.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); + return; + } + *buf = SCI5.RDR; + if (--cnt) { + ++buf; + } else { + buf = NULL; + SCI5.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); + } + sci_buf[1].buf = buf; + sci_buf[1].cnt = cnt; +} + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void INT_Excep_USB0_USBI0(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* setup software configurable interrupts */ + ICU.SLIBR_USBI0.BYTE = IRQ_USB0_USBI0; + ICU.SLIPRCR.BYTE = 1; + +#if CFG_TUSB_OS == OPT_OS_NONE + /* Enable CMT0 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(CMT0) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + /* Setup 1ms tick timer */ + CMT0.CMCNT = 0; + CMT0.CMCOR = CMT_PCLK / 1000 / 128; + CMT0.CMCR.WORD = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128; + IR(CMT0, CMI0) = 0; + IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0; + IEN(CMT0, CMI0) = 1; + CMT.CMSTR0.BIT.STR0 = 1; +#endif + + /* Unlock MPC registers */ + MPC.PWPR.BIT.B0WI = 0; + MPC.PWPR.BIT.PFSWE = 1; + // SW PB1 + PORTB.PMR.BIT.B1 = 0U; + PORTB.PDR.BIT.B1 = 0U; + // LED PD6 + PORTD.PODR.BIT.B6 = 1U; + PORTD.ODR1.BIT.B4 = 1U; + PORTD.PMR.BIT.B6 = 0U; + PORTD.PDR.BIT.B6 = 1U; + /* UART TXD5 => PA4, RXD5 => PA3 */ + PORTA.PMR.BIT.B4 = 1U; + PORTA.PCR.BIT.B4 = 1U; + MPC.PA4PFS.BYTE = 0b01010; + PORTA.PMR.BIT.B3 = 1U; + MPC.PA5PFS.BYTE = 0b01010; + /* USB VBUS -> P16 */ + PORT1.PMR.BIT.B6 = 1U; + MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001; + /* Lock MPC registers */ + MPC.PWPR.BIT.PFSWE = 0; + MPC.PWPR.BIT.B0WI = 1; + + /* Enable SCI5 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(SCI5) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + SCI5.SEMR.BIT.ABCS = 1; + SCI5.SEMR.BIT.BGDM = 1; + SCI5.BRR = (SCI_PCLK / (8 * 115200)) - 1; + IR(SCI5, RXI5) = 0; + IR(SCI5, TXI5) = 0; + IS(SCI5, TEI5) = 0; + IR(ICU, GROUPBL0) = 0; + IPR(SCI5, RXI5) = IRQ_PRIORITY_SCI5; + IPR(SCI5, TXI5) = IRQ_PRIORITY_SCI5; + IPR(ICU,GROUPBL0) = IRQ_PRIORITY_SCI5; + IEN(SCI5, RXI5) = 1; + IEN(SCI5, TXI5) = 1; + IEN(ICU,GROUPBL0) = 1; + EN(SCI5, TEI5) = 1; + + /* setup USBI0 interrupt. */ + IR(USB0, USBI0) = 0; + IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0; +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + PORTD.PODR.BIT.B6 = state ? 0 : 1; +} + +uint32_t board_button_read(void) +{ + return PORTB.PIDR.BIT.B1 ? 0 : 1; +} + +int board_uart_read(uint8_t* buf, int len) +{ + sci_buf[1].buf = buf; + sci_buf[1].cnt = len; + SCI5.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE; + while (SCI5.SCR.BIT.RE) ; + return len - sci_buf[1].cnt; +} + +int board_uart_write(void const *buf, int len) +{ + sci_buf[0].buf = (uint8_t*)buf; + sci_buf[0].cnt = len; + SCI5.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE; + while (SCI5.SCR.BIT.TE) ; + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void INT_Excep_CMT0_CMI0(void) +{ + ++system_ticks; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#else +uint32_t SystemCoreClock = 120000000; +#endif + +int close(int fd) +{ + (void)fd; + return -1; +} +int fstat(int fd, void *pstat) +{ + (void)fd; + (void)pstat; + return 0; +} +off_t lseek(int fd, off_t pos, int whence) +{ + (void)fd; + (void)pos; + (void)whence; + return 0; +} +int isatty(int fd) +{ + (void)fd; + return 1; +} diff --git a/tinyusb/hw/bsp/rx/family.mk b/tinyusb/hw/bsp/rx/family.mk new file mode 100755 index 00000000..5a828171 --- /dev/null +++ b/tinyusb/hw/bsp/rx/family.mk @@ -0,0 +1,32 @@ +DEPS_SUBMODULES += hw/mcu/renesas/rx + +# Cross Compiler for RX +CROSS_COMPILE = rx-elf- + +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -nostartfiles \ + -ffunction-sections \ + -fdata-sections \ + -fshort-enums \ + -mlittle-endian-data \ + -DSSIZE_MAX=__INT_MAX__ + +SRC_C += \ + src/portable/renesas/usba/dcd_usba.c \ + $(MCU_DIR)/vects.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(MCU_DIR) + +SRC_S += $(MCU_DIR)/start.S + +$(BUILD)/$(PROJECT).mot: $(BUILD)/$(PROJECT).elf + @echo CREATE $@ + $(OBJCOPY) -O srec -I elf32-rx-be-ns $^ $@ + +# flash using rfp-cli +flash-rfp: $(BUILD)/$(PROJECT).mot + rfp-cli -device rx65x -tool e2l -if fine -fo id FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF -auth id FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF -auto $^ |