add more atmel studio framework code

1 files changed, 52 insertions, 0 deletions

diff --git a/watch-library/config/peripheral_clk_config.h b/watch-library/config/peripheral_clk_config.h
index 61619b6a..523b036c 100644
--- a/watch-library/config/peripheral_clk_config.h
+++ b/watch-library/config/peripheral_clk_config.h
@@ -132,6 +132,58 @@
 #define CONF_GCLK_SERCOM1_SLOW_FREQUENCY 32768
 #endif
 
+// <y> Core Clock Source
+// <id> core_gclk_selection
+
+// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
+
+// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
+
+// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
+
+// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
+
+// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
+
+// <i> Select the clock source for CORE.
+#ifndef CONF_GCLK_SERCOM3_CORE_SRC
+#define CONF_GCLK_SERCOM3_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
+#endif
+
+// <y> Slow Clock Source
+// <id> slow_gclk_selection
+
+// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
+
+// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
+
+// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
+
+// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
+
+// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
+
+// <i> Select the slow clock source.
+#ifndef CONF_GCLK_SERCOM3_SLOW_SRC
+#define CONF_GCLK_SERCOM3_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
+#endif
+
+/**
+ * \def CONF_GCLK_SERCOM3_CORE_FREQUENCY
+ * \brief SERCOM3's Core Clock frequency
+ */
+#ifndef CONF_GCLK_SERCOM3_CORE_FREQUENCY
+#define CONF_GCLK_SERCOM3_CORE_FREQUENCY 4000000
+#endif
+
+/**
+ * \def CONF_GCLK_SERCOM3_SLOW_FREQUENCY
+ * \brief SERCOM3's Slow Clock frequency
+ */
+#ifndef CONF_GCLK_SERCOM3_SLOW_FREQUENCY
+#define CONF_GCLK_SERCOM3_SLOW_FREQUENCY 32768
+#endif
+
 // <y> TC Clock Source
 // <id> tc_gclk_selection