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author | Joey Castillo <jose.castillo@gmail.com> | 2021-08-02 13:48:35 -0400 |
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committer | Joey Castillo <jose.castillo@gmail.com> | 2021-08-02 14:36:04 -0400 |
commit | 34945d78e933fc62bedcc975e88be02a0b7fcc2e (patch) | |
tree | 317edc18fe08d76a1f5d8c3aabf88cf58ba73897 /watch-library/include/instance/rstc.h | |
parent | 2d1e2e8c76623543817f4c62b26fc300c1fd0d2c (diff) | |
download | Sensor-Watch-34945d78e933fc62bedcc975e88be02a0b7fcc2e.tar.gz Sensor-Watch-34945d78e933fc62bedcc975e88be02a0b7fcc2e.tar.bz2 Sensor-Watch-34945d78e933fc62bedcc975e88be02a0b7fcc2e.zip |
major project reorg, move library one level up
Diffstat (limited to 'watch-library/include/instance/rstc.h')
-rw-r--r-- | watch-library/include/instance/rstc.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/watch-library/include/instance/rstc.h b/watch-library/include/instance/rstc.h new file mode 100644 index 00000000..e6186fd4 --- /dev/null +++ b/watch-library/include/instance/rstc.h @@ -0,0 +1,46 @@ +/** + * \file + * + * \brief Instance description for RSTC + * + * Copyright (c) 2018 Microchip Technology Inc. + * + * \asf_license_start + * + * \page License + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the Licence at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * \asf_license_stop + * + */ + +#ifndef _SAML22_RSTC_INSTANCE_ +#define _SAML22_RSTC_INSTANCE_ + +/* ========== Register definition for RSTC peripheral ========== */ +#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) +#define REG_RSTC_RCAUSE (0x40000C00) /**< \brief (RSTC) Reset Cause */ +#define REG_RSTC_BKUPEXIT (0x40000C02) /**< \brief (RSTC) Backup Exit Source */ +#else +#define REG_RSTC_RCAUSE (*(RoReg8 *)0x40000C00UL) /**< \brief (RSTC) Reset Cause */ +#define REG_RSTC_BKUPEXIT (*(RoReg8 *)0x40000C02UL) /**< \brief (RSTC) Backup Exit Source */ +#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ + +/* ========== Instance parameters for RSTC peripheral ========== */ +#define RSTC_BACKUP_IMPLEMENTED 1 +#define RSTC_NUMBER_OF_EXTWAKE 0 // number of external wakeup line + +#endif /* _SAML22_RSTC_INSTANCE_ */ |