diff options
Diffstat (limited to 'tinyusb/hw/bsp/nutiny_nuc126v')
| -rwxr-xr-x | tinyusb/hw/bsp/nutiny_nuc126v/board.mk | 59 | ||||
| -rwxr-xr-x | tinyusb/hw/bsp/nutiny_nuc126v/nuc126_flash.ld | 195 | ||||
| -rwxr-xr-x | tinyusb/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c | 153 |
3 files changed, 407 insertions, 0 deletions
diff --git a/tinyusb/hw/bsp/nutiny_nuc126v/board.mk b/tinyusb/hw/bsp/nutiny_nuc126v/board.mk new file mode 100755 index 00000000..848b19f9 --- /dev/null +++ b/tinyusb/hw/bsp/nutiny_nuc126v/board.mk @@ -0,0 +1,59 @@ +DEPS_SUBMODULES += hw/mcu/nuvoton + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs-linux \ + -mcpu=cortex-m0 \ + -D__ARM_FEATURE_DSP=0 \ + -DUSE_ASSERT=0 \ + -D__CORTEX_SC=0 \ + -DCFG_TUSB_MCU=OPT_MCU_NUC126 + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/$(BOARD)/nuc126_flash.ld + +SRC_C += \ + src/portable/nuvoton/nuc121/dcd_nuc121.c \ + hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/system_NUC126.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/acmp.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/adc.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/clk.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/crc.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/ebi.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/fmc.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/gpio.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/pdma.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/pwm.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/rtc.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/sc.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/scuart.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/spi.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/sys.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/timer.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/timer_pwm.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/uart.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/usbd.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/usci_spi.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/usci_uart.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/wdt.c \ + hw/mcu/nuvoton/nuc126/StdDriver/src/wwdt.c + +SRC_S += \ + hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/GCC/startup_NUC126.S + +INC += \ + $(TOP)/hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Include \ + $(TOP)/hw/mcu/nuvoton/nuc126/StdDriver/inc \ + $(TOP)/hw/mcu/nuvoton/nuc126/CMSIS/Include + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = NUC126VG4AE + +# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton +# Please compile and install it from github source +flash: $(BUILD)/$(PROJECT).elf + openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit" diff --git a/tinyusb/hw/bsp/nutiny_nuc126v/nuc126_flash.ld b/tinyusb/hw/bsp/nutiny_nuc126v/nuc126_flash.ld new file mode 100755 index 00000000..b23890b4 --- /dev/null +++ b/tinyusb/hw/bsp/nutiny_nuc126v/nuc126_flash.ld @@ -0,0 +1,195 @@ +/* Linker script to configure memory regions. */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x40000 /* 256k */ + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x5000 /* 20k */ +} + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __Vectors_End + * __Vectors_Size + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.vectors)) + __Vectors_End = .; + __Vectors_Size = __Vectors_End - __Vectors; + __end__ = .; + + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */ + /* + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) + __copy_table_end__ = .; + } > FLASH + */ + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */ + /* + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) + __zero_table_end__ = .; + } > FLASH + */ + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + .heap (COPY): + { + __HeapBase = .; + __end__ = .; + end = __end__; + KEEP(*(.heap*)) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + KEEP(*(.stack*)) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/tinyusb/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c b/tinyusb/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c new file mode 100755 index 00000000..da62e7bd --- /dev/null +++ b/tinyusb/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c @@ -0,0 +1,153 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "NuMicro.h" +#include "clk.h" +#include "sys.h" + + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USBD_IRQHandler(void) +{ + tud_int_handler(0); +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ +#define LED_PORT PC +#define LED_PIN 9 +#define LED_PIN_IO PC9 +#define LED_STATE_ON 0 + +#define CRYSTAL_LESS /* system will be 48MHz when defined, otherwise, system is 72MHz */ +#define HIRC48_AUTO_TRIM SYS_IRCTCTL1_REFCKSEL_Msk | (1UL << SYS_IRCTCTL1_LOOPSEL_Pos) | (2UL << SYS_IRCTCTL1_FREQSEL_Pos) +#define TRIM_INIT (SYS_BASE+0x118) + +void board_init(void) +{ + /* Unlock protected registers */ + SYS_UnlockReg(); + + /*---------------------------------------------------------------------------------------------------------*/ + /* Init System Clock */ + /*---------------------------------------------------------------------------------------------------------*/ + + /* Enable Internal RC 22.1184 MHz clock */ + CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk); + + /* Waiting for Internal RC clock ready */ + CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk); + + /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */ + CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1)); + +#ifndef CRYSTAL_LESS + /* Enable external XTAL 12 MHz clock */ + CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk); + + /* Waiting for external XTAL clock ready */ + CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk); + + /* Set core clock */ + CLK_SetCoreClock(72000000); + + /* Use HIRC as UART clock source */ + CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1)); + + /* Use PLL as USB clock source */ + CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_PLL, CLK_CLKDIV0_USB(3)); + +#else + /* Enable Internal RC 48MHz clock */ + CLK_EnableXtalRC(CLK_PWRCTL_HIRC48EN_Msk); + + /* Waiting for Internal RC clock ready */ + CLK_WaitClockReady(CLK_STATUS_HIRC48STB_Msk); + + /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */ + CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC48, CLK_CLKDIV0_HCLK(1)); + + /* Use HIRC as UART clock source */ + CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1)); + + /* Use HIRC48 as USB clock source */ + CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC48, CLK_CLKDIV0_USB(1)); +#endif + + /* Enable module clock */ + CLK_EnableModuleClock(USBD_MODULE); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(48000000 / 1000); +#endif + + // LED + GPIO_SetMode(LED_PORT, 1 << LED_PIN, GPIO_MODE_OUTPUT); +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + LED_PIN_IO = (state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return 0; +} + +int board_uart_read(uint8_t* buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ + (void) buf; (void) len; + return 0; +} |