diff options
Diffstat (limited to 'tinyusb/hw/bsp/same54xplainedpro')
| -rwxr-xr-x | tinyusb/hw/bsp/same54xplainedpro/board.mk | 46 | ||||
| -rwxr-xr-x | tinyusb/hw/bsp/same54xplainedpro/same54p20a_flash.ld | 163 | ||||
| -rwxr-xr-x | tinyusb/hw/bsp/same54xplainedpro/same54p20a_sram.ld | 162 | ||||
| -rwxr-xr-x | tinyusb/hw/bsp/same54xplainedpro/same54xplainedpro.c | 306 |
4 files changed, 0 insertions, 677 deletions
diff --git a/tinyusb/hw/bsp/same54xplainedpro/board.mk b/tinyusb/hw/bsp/same54xplainedpro/board.mk deleted file mode 100755 index 16ac786d..00000000 --- a/tinyusb/hw/bsp/same54xplainedpro/board.mk +++ /dev/null @@ -1,46 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/microchip - -CONF_CPU_FREQUENCY ?= 48000000 - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mlong-calls \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ - -nostdlib -nostartfiles \ - -D__SAME54P20A__ \ - -DCONF_CPU_FREQUENCY=$(CONF_CPU_FREQUENCY) \ - -DCFG_TUSB_MCU=OPT_MCU_SAME5X \ - -DBOARD_NAME="\"Microchip SAM E54 Xplained Pro\"" - - -# All source paths should be relative to the top level. -LD_FILE = hw/bsp/$(BOARD)/same54p20a_flash.ld - -SRC_C += \ - src/portable/microchip/samd/dcd_samd.c \ - hw/mcu/microchip/same54/gcc/gcc/startup_same54.c \ - hw/mcu/microchip/same54/gcc/system_same54.c \ - hw/mcu/microchip/same54/hal/utils/src/utils_syscalls.c - -INC += \ - $(TOP)/hw/mcu/microchip/same54/ \ - $(TOP)/hw/mcu/microchip/same54/config \ - $(TOP)/hw/mcu/microchip/same54/include \ - $(TOP)/hw/mcu/microchip/same54/hal/include \ - $(TOP)/hw/mcu/microchip/same54/hal/utils/include \ - $(TOP)/hw/mcu/microchip/same54/hpl/port \ - $(TOP)/hw/mcu/microchip/same54/hri \ - $(TOP)/hw/mcu/microchip/same54/CMSIS/Include - -# For freeRTOS port source -FREERTOS_PORT = ARM_CM4F - -# For flash-jlink target -JLINK_DEVICE = ATSAME54P20 - -# flash using edbg from https://github.com/ataradov/edbg -flash: $(BUILD)/$(PROJECT).bin - edbg --verbose -t same54 -pv -f $< diff --git a/tinyusb/hw/bsp/same54xplainedpro/same54p20a_flash.ld b/tinyusb/hw/bsp/same54xplainedpro/same54p20a_flash.ld deleted file mode 100755 index 97072bfe..00000000 --- a/tinyusb/hw/bsp/same54xplainedpro/same54p20a_flash.ld +++ /dev/null @@ -1,163 +0,0 @@ -/** - * \file - * - * \brief Linker script for running in internal FLASH on the SAME54P20A - * - * Copyright (c) 2019 Microchip Technology Inc. - * - * \asf_license_start - * - * \page License - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the Licence at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * \asf_license_stop - * - */ - - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -SEARCH_DIR(.) - -/* Memory Spaces Definitions */ -MEMORY -{ - rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00100000 - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000 - bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000 - qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000 -} - -/* The stack size used by the application. NOTE: you need to adjust according to your application. */ -STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x10000; - -/* Section Definitions */ -SECTIONS -{ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors .vectors.*)) - *(.text .text.* .gnu.linkonce.t.*) - *(.glue_7t) *(.glue_7) - *(.rodata .rodata* .gnu.linkonce.r.*) - *(.ARM.extab* .gnu.linkonce.armextab.*) - - /* Support C constructors, and C destructors in both user code - and the C library. This also provides support for C++ code. */ - . = ALIGN(4); - KEEP(*(.init)) - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - _efixed = .; /* End of text section */ - } > rom - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - PROVIDE_HIDDEN (__exidx_start = .); - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > rom - PROVIDE_HIDDEN (__exidx_end = .); - - . = ALIGN(4); - _etext = .; - - .relocate : AT (_etext) - { - . = ALIGN(4); - _srelocate = .; - *(.ramfunc .ramfunc.*); - *(.data .data.*); - . = ALIGN(4); - _erelocate = .; - } > ram - - .bkupram (NOLOAD): - { - . = ALIGN(8); - _sbkupram = .; - *(.bkupram .bkupram.*); - . = ALIGN(8); - _ebkupram = .; - } > bkupram - - .qspi (NOLOAD): - { - . = ALIGN(8); - _sqspi = .; - *(.qspi .qspi.*); - . = ALIGN(8); - _eqspi = .; - } > qspi - - /* .bss section which is used for uninitialized data */ - .bss (NOLOAD) : - { - . = ALIGN(4); - _sbss = . ; - _szero = .; - *(.bss .bss.*) - *(COMMON) - . = ALIGN(4); - _ebss = . ; - _ezero = .; - } > ram - - /* stack section */ - .stack (NOLOAD): - { - . = ALIGN(8); - _sstack = .; - . = . + STACK_SIZE; - . = ALIGN(8); - _estack = .; - } > ram - - . = ALIGN(4); - _end = . ; -} diff --git a/tinyusb/hw/bsp/same54xplainedpro/same54p20a_sram.ld b/tinyusb/hw/bsp/same54xplainedpro/same54p20a_sram.ld deleted file mode 100755 index 6219f4af..00000000 --- a/tinyusb/hw/bsp/same54xplainedpro/same54p20a_sram.ld +++ /dev/null @@ -1,162 +0,0 @@ -/** - * \file - * - * \brief Linker script for running in internal SRAM on the SAME54P20A - * - * Copyright (c) 2019 Microchip Technology Inc. - * - * \asf_license_start - * - * \page License - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the Licence at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * \asf_license_stop - * - */ - - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -SEARCH_DIR(.) - -/* Memory Spaces Definitions */ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000 - bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000 - qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000 -} - -/* The stack size used by the application. NOTE: you need to adjust according to your application. */ -STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x10000; - -/* Section Definitions */ -SECTIONS -{ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors .vectors.*)) - *(.text .text.* .gnu.linkonce.t.*) - *(.glue_7t) *(.glue_7) - *(.rodata .rodata* .gnu.linkonce.r.*) - *(.ARM.extab* .gnu.linkonce.armextab.*) - - /* Support C constructors, and C destructors in both user code - and the C library. This also provides support for C++ code. */ - . = ALIGN(4); - KEEP(*(.init)) - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - _efixed = .; /* End of text section */ - } > ram - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - PROVIDE_HIDDEN (__exidx_start = .); - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > ram - PROVIDE_HIDDEN (__exidx_end = .); - - . = ALIGN(4); - _etext = .; - - .relocate : AT (_etext) - { - . = ALIGN(4); - _srelocate = .; - *(.ramfunc .ramfunc.*); - *(.data .data.*); - . = ALIGN(4); - _erelocate = .; - } > ram - - .bkupram (NOLOAD): - { - . = ALIGN(8); - _sbkupram = .; - *(.bkupram .bkupram.*); - . = ALIGN(8); - _ebkupram = .; - } > bkupram - - .qspi (NOLOAD): - { - . = ALIGN(8); - _sqspi = .; - *(.qspi .qspi.*); - . = ALIGN(8); - _eqspi = .; - } > qspi - - /* .bss section which is used for uninitialized data */ - .bss (NOLOAD) : - { - . = ALIGN(4); - _sbss = . ; - _szero = .; - *(.bss .bss.*) - *(COMMON) - . = ALIGN(4); - _ebss = . ; - _ezero = .; - } > ram - - /* stack section */ - .stack (NOLOAD): - { - . = ALIGN(8); - _sstack = .; - . = . + STACK_SIZE; - . = ALIGN(8); - _estack = .; - } > ram - - . = ALIGN(4); - _end = . ; -} diff --git a/tinyusb/hw/bsp/same54xplainedpro/same54xplainedpro.c b/tinyusb/hw/bsp/same54xplainedpro/same54xplainedpro.c deleted file mode 100755 index 4c38fc6e..00000000 --- a/tinyusb/hw/bsp/same54xplainedpro/same54xplainedpro.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021 Jean Gressmann <jean@0x42.de> - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - */ - -#include <sam.h> -#include "bsp/board.h" - -#include <hal/include/hal_gpio.h> - - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB_0_Handler(void) -{ - tud_int_handler(0); -} - -void USB_1_Handler(void) -{ - tud_int_handler(0); -} - -void USB_2_Handler(void) -{ - tud_int_handler(0); -} - -void USB_3_Handler(void) -{ - tud_int_handler(0); -} - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ -#define LED_PIN PIN_PC18 -#define BUTTON_PIN PIN_PB31 -#define BOARD_SERCOM SERCOM2 - -/** Initializes the clocks from the external 12 MHz crystal - * - * The goal of this setup is to preserve the second PLL - * for the application code while still having a reasonable - * 48 MHz clock for USB / UART. - * - * GCLK0: CONF_CPU_FREQUENCY (default 120 MHz) from PLL0 - * GCLK1: unused - * GCLK2: 12 MHz from XOSC1 - * DFLL48M: closed loop from GLCK2 - * GCLK3: 48 MHz - */ -static inline void init_clock_xtal(void) -{ - /* configure for a 12MHz crystal connected to XIN1/XOUT1 */ - OSCCTRL->XOSCCTRL[1].reg = - OSCCTRL_XOSCCTRL_STARTUP(6) | // 1.953 ms - OSCCTRL_XOSCCTRL_RUNSTDBY | - OSCCTRL_XOSCCTRL_ENALC | - OSCCTRL_XOSCCTRL_IMULT(4) | OSCCTRL_XOSCCTRL_IPTAT(3) | // 8MHz to 16MHz - OSCCTRL_XOSCCTRL_XTALEN | - OSCCTRL_XOSCCTRL_ENABLE; - while(0 == OSCCTRL->STATUS.bit.XOSCRDY1); - - OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(2) | OSCCTRL_DPLLCTRLB_REFCLK_XOSC1; /* 12MHz / 6 = 2Mhz, input = XOSC1 */ - OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR((CONF_CPU_FREQUENCY / 1000000 / 2) - 1); /* multiply to get CONF_CPU_FREQUENCY (default = 120MHz) */ - OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE; - while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */ - - /* configure clock-generator 0 to use DPLL0 as source -> GCLK0 is used for the core */ - GCLK->GENCTRL[0].reg = - GCLK_GENCTRL_DIV(0) | - GCLK_GENCTRL_RUNSTDBY | - GCLK_GENCTRL_GENEN | - GCLK_GENCTRL_SRC_DPLL0 | - GCLK_GENCTRL_IDC; - while(1 == GCLK->SYNCBUSY.bit.GENCTRL0); /* wait for the synchronization between clock domains to be complete */ - - // configure GCLK2 for 12MHz from XOSC1 - GCLK->GENCTRL[2].reg = - GCLK_GENCTRL_DIV(0) | - GCLK_GENCTRL_RUNSTDBY | - GCLK_GENCTRL_GENEN | - GCLK_GENCTRL_SRC_XOSC1 | - GCLK_GENCTRL_IDC; - while(1 == GCLK->SYNCBUSY.bit.GENCTRL2); /* wait for the synchronization between clock domains to be complete */ - - /* setup DFLL48M to use GLCK2 */ - GCLK->PCHCTRL[OSCCTRL_GCLK_ID_DFLL48].reg = GCLK_PCHCTRL_GEN_GCLK2 | GCLK_PCHCTRL_CHEN; - - OSCCTRL->DFLLCTRLA.reg = 0; - while(1 == OSCCTRL->DFLLSYNC.bit.ENABLE); - - OSCCTRL->DFLLCTRLB.reg = OSCCTRL_DFLLCTRLB_MODE | OSCCTRL_DFLLCTRLB_WAITLOCK; - OSCCTRL->DFLLMUL.bit.MUL = 4; // 4 * 12MHz -> 48MHz - - OSCCTRL->DFLLCTRLA.reg = - OSCCTRL_DFLLCTRLA_ENABLE | - OSCCTRL_DFLLCTRLA_RUNSTDBY; - while(1 == OSCCTRL->DFLLSYNC.bit.ENABLE); - - // setup 48 MHz GCLK3 from DFLL48M - GCLK->GENCTRL[3].reg = - GCLK_GENCTRL_DIV(0) | - GCLK_GENCTRL_RUNSTDBY | - GCLK_GENCTRL_GENEN | - GCLK_GENCTRL_SRC_DFLL | - GCLK_GENCTRL_IDC; - while(1 == GCLK->SYNCBUSY.bit.GENCTRL3); -} - -/* Initialize SERCOM2 for 115200 bps 8N1 using a 48 MHz clock */ -static inline void uart_init(void) -{ - gpio_set_pin_function(PIN_PB24, PINMUX_PB24D_SERCOM2_PAD1); - gpio_set_pin_function(PIN_PB25, PINMUX_PB25D_SERCOM2_PAD0); - - MCLK->APBBMASK.bit.SERCOM2_ = 1; - GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK0 | GCLK_PCHCTRL_CHEN; - - BOARD_SERCOM->USART.CTRLA.bit.SWRST = 1; /* reset and disable SERCOM -> enable configuration */ - while (BOARD_SERCOM->USART.SYNCBUSY.bit.SWRST); - - BOARD_SERCOM->USART.CTRLA.reg = - SERCOM_USART_CTRLA_SAMPR(0) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */ - SERCOM_USART_CTRLA_SAMPA(0) | /* 16x over sampling */ - SERCOM_USART_CTRLA_FORM(0) | /* 0x0 USART frame, 0x1 USART frame with parity, ... */ - SERCOM_USART_CTRLA_DORD | /* LSB first */ - SERCOM_USART_CTRLA_MODE(1) | /* 0x0 USART with external clock, 0x1 USART with internal clock */ - SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */ - SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */ - - BOARD_SERCOM->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */ - SERCOM_USART_CTRLB_TXEN | /* transmitter enabled */ - SERCOM_USART_CTRLB_RXEN; /* receiver enabled */ - // BOARD_SERCOM->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(0) | SERCOM_USART_BAUD_FRAC_BAUD(26); /* 48000000/(16*115200) = 26.041666667 */ - BOARD_SERCOM->USART.BAUD.reg = SERCOM_USART_BAUD_BAUD(63019); /* 65536*(1−16*115200/48000000) */ - - BOARD_SERCOM->USART.CTRLA.bit.ENABLE = 1; /* activate SERCOM */ - while (BOARD_SERCOM->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */ -} - -static inline void uart_send_buffer(uint8_t const *text, size_t len) -{ - for (size_t i = 0; i < len; ++i) { - BOARD_SERCOM->USART.DATA.reg = text[i]; - while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_TXC) == 0); - } -} - -static inline void uart_send_str(const char* text) -{ - while (*text) { - BOARD_SERCOM->USART.DATA.reg = *text++; - while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_TXC) == 0); - } -} - - -void board_init(void) -{ - // Uncomment this line and change the GCLK for UART/USB to run off the XTAL. - // init_clock_xtal(); - - SystemCoreClock = CONF_CPU_FREQUENCY; - -#if CFG_TUSB_OS == OPT_OS_NONE - SysTick_Config(CONF_CPU_FREQUENCY / 1000); -#endif - - uart_init(); - -#if CFG_TUSB_DEBUG >= 2 - uart_send_str(BOARD_NAME " UART initialized\n"); - tu_printf(BOARD_NAME " reset cause %#02x\n", RSTC->RCAUSE.reg); -#endif - - // LED0 init - gpio_set_pin_function(LED_PIN, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT); - board_led_write(0); - -#if CFG_TUSB_DEBUG >= 2 - uart_send_str(BOARD_NAME " LED pin configured\n"); -#endif - - // BTN0 init - gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN); - gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP); - -#if CFG_TUSB_DEBUG >= 2 - uart_send_str(BOARD_NAME " Button pin configured\n"); -#endif - -#if CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USB_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USB_2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USB_3_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); -#endif - - -#if TUSB_OPT_DEVICE_ENABLED -#if CFG_TUSB_DEBUG >= 2 - uart_send_str(BOARD_NAME " USB device enabled\n"); -#endif - - /* USB clock init - * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock - * for low speed and full speed operation. - */ - hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK0_Val | GCLK_PCHCTRL_CHEN); - hri_mclk_set_AHBMASK_USB_bit(MCLK); - hri_mclk_set_APBBMASK_USB_bit(MCLK); - - // USB pin init - gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT); - gpio_set_pin_level(PIN_PA24, false); - gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF); - gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT); - gpio_set_pin_level(PIN_PA25, false); - gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF); - - gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM); - gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP); - - -#if CFG_TUSB_DEBUG >= 2 - uart_send_str(BOARD_NAME " USB device configured\n"); -#endif -#endif -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - gpio_set_pin_level(LED_PIN, !state); -} - -uint32_t board_button_read(void) -{ - return (PORT->Group[1].IN.reg & 0x80000000) != 0x80000000; -} - -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -int board_uart_write(void const * buf, int len) -{ - if (len < 0) { - uart_send_str(buf); - } else { - uart_send_buffer(buf, len); - } - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; - -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif - -// Required by __libc_init_array in startup code if we are compiling using -// -nostdlib/-nostartfiles. -void _init(void) -{ - -} |