diff options
Diffstat (limited to 'tinyusb/src/portable/nxp')
-rwxr-xr-x | tinyusb/src/portable/nxp/khci/dcd_khci.c | 479 | ||||
-rwxr-xr-x | tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.c | 582 | ||||
-rwxr-xr-x | tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.h | 152 | ||||
-rwxr-xr-x | tinyusb/src/portable/nxp/lpc17_40/hcd_lpc17_40.c | 47 | ||||
-rwxr-xr-x | tinyusb/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 537 | ||||
-rwxr-xr-x | tinyusb/src/portable/nxp/transdimension/common_transdimension.h | 136 | ||||
-rwxr-xr-x | tinyusb/src/portable/nxp/transdimension/dcd_transdimension.c | 492 | ||||
-rwxr-xr-x | tinyusb/src/portable/nxp/transdimension/hcd_transdimension.c | 117 |
8 files changed, 0 insertions, 2542 deletions
diff --git a/tinyusb/src/portable/nxp/khci/dcd_khci.c b/tinyusb/src/portable/nxp/khci/dcd_khci.c deleted file mode 100755 index dce464fd..00000000 --- a/tinyusb/src/portable/nxp/khci/dcd_khci.c +++ /dev/null @@ -1,479 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2020 Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if TUSB_OPT_DEVICE_ENABLED && ( \ - ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ - ) - -#include "fsl_device_registers.h" -#define KHCI USB0 - -#include "device/dcd.h" - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ - -enum { - TOK_PID_OUT = 0x1u, - TOK_PID_IN = 0x9u, - TOK_PID_SETUP = 0xDu, -}; - -typedef struct TU_ATTR_PACKED -{ - union { - uint32_t head; - struct { - union { - struct { - uint16_t : 2; - uint16_t tok_pid : 4; - uint16_t data : 1; - uint16_t own : 1; - uint16_t : 8; - }; - struct { - uint16_t : 2; - uint16_t bdt_stall: 1; - uint16_t dts : 1; - uint16_t ninc : 1; - uint16_t keep : 1; - uint16_t : 10; - }; - }; - uint16_t bc : 10; - uint16_t : 6; - }; - }; - uint8_t *addr; -}buffer_descriptor_t; - -TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" ); - -typedef struct TU_ATTR_PACKED -{ - union { - uint32_t state; - struct { - uint32_t max_packet_size :11; - uint32_t : 5; - uint32_t odd : 1; - uint32_t :15; - }; - }; - uint16_t length; - uint16_t remaining; -}endpoint_state_t; - -TU_VERIFY_STATIC( sizeof(endpoint_state_t) == 8, "size is not correct" ); - -typedef struct -{ - union { - /* [#EP][OUT,IN][EVEN,ODD] */ - buffer_descriptor_t bdt[16][2][2]; - uint16_t bda[512]; - }; - TU_ATTR_ALIGNED(4) union { - endpoint_state_t endpoint[16][2]; - endpoint_state_t endpoint_unified[16 * 2]; - }; - uint8_t setup_packet[8]; - uint8_t addr; -}dcd_data_t; - -//--------------------------------------------------------------------+ -// INTERNAL OBJECT & FUNCTION DECLARATION -//--------------------------------------------------------------------+ -// BDT(Buffer Descriptor Table) must be 256-byte aligned -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd; - -TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" ); - -static void prepare_next_setup_packet(uint8_t rhport) -{ - const unsigned out_odd = _dcd.endpoint[0][0].odd; - const unsigned in_odd = _dcd.endpoint[0][1].odd; - if (_dcd.bdt[0][0][out_odd].own) { - TU_LOG1("DCD fail to prepare the next SETUP %d %d\r\n", out_odd, in_odd); - return; - } - _dcd.bdt[0][0][out_odd].data = 0; - _dcd.bdt[0][0][out_odd ^ 1].data = 1; - _dcd.bdt[0][1][in_odd].data = 1; - _dcd.bdt[0][1][in_odd ^ 1].data = 0; - dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), - _dcd.setup_packet, sizeof(_dcd.setup_packet)); -} - -static void process_stall(uint8_t rhport) -{ - if (KHCI->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK) { - /* clear stall condition of the control pipe */ - prepare_next_setup_packet(rhport); - KHCI->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; - } -} - -static void process_tokdne(uint8_t rhport) -{ - const unsigned s = KHCI->STAT; - KHCI->ISTAT = USB_ISTAT_TOKDNE_MASK; /* fetch the next token if received */ - buffer_descriptor_t *bd = (buffer_descriptor_t *)&_dcd.bda[s]; - endpoint_state_t *ep = &_dcd.endpoint_unified[s >> 3]; - unsigned odd = (s & USB_STAT_ODD_MASK) ? 1 : 0; - - /* fetch pid before discarded by the next steps */ - const unsigned pid = bd->tok_pid; - /* reset values for a next transfer */ - bd->bdt_stall = 0; - bd->dts = 1; - bd->ninc = 0; - bd->keep = 0; - /* update the odd variable to prepare for the next transfer */ - ep->odd = odd ^ 1; - if (pid == TOK_PID_SETUP) { - dcd_event_setup_received(rhport, bd->addr, true); - KHCI->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; - return; - } - if (s >> 4) { - TU_LOG1("TKDNE %x\r\n", s); - } - - const unsigned bc = bd->bc; - const unsigned remaining = ep->remaining - bc; - if (remaining && bc == ep->max_packet_size) { - /* continue the transferring consecutive data */ - ep->remaining = remaining; - const int next_remaining = remaining - ep->max_packet_size; - if (next_remaining > 0) { - /* prepare to the after next transfer */ - bd->addr += ep->max_packet_size * 2; - bd->bc = next_remaining > ep->max_packet_size ? ep->max_packet_size: next_remaining; - __DSB(); - bd->own = 1; /* the own bit must set after addr */ - } - return; - } - const unsigned length = ep->length; - dcd_event_xfer_complete(rhport, - ((s & USB_STAT_TX_MASK) << 4) | (s >> USB_STAT_ENDP_SHIFT), - length - remaining, XFER_RESULT_SUCCESS, true); - if (0 == (s & USB_STAT_ENDP_MASK) && 0 == length) { - /* After completion a ZLP of control transfer, - * it prepares for the next steup transfer. */ - if (_dcd.addr) { - /* When the transfer was the SetAddress, - * the device address should be updated here. */ - KHCI->ADDR = _dcd.addr; - _dcd.addr = 0; - } - prepare_next_setup_packet(rhport); - } -} - -static void process_bus_reset(uint8_t rhport) -{ - KHCI->USBCTRL &= ~USB_USBCTRL_SUSP_MASK; - KHCI->CTL |= USB_CTL_ODDRST_MASK; - KHCI->ADDR = 0; - KHCI->INTEN = (KHCI->INTEN & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK; - - KHCI->ENDPOINT[0].ENDPT = USB_ENDPT_EPHSHK_MASK | USB_ENDPT_EPRXEN_MASK | USB_ENDPT_EPTXEN_MASK; - for (unsigned i = 1; i < 16; ++i) { - KHCI->ENDPOINT[i].ENDPT = 0; - } - buffer_descriptor_t *bd = _dcd.bdt[0][0]; - for (unsigned i = 0; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) { - bd->head = 0; - } - const endpoint_state_t ep0 = { - .max_packet_size = CFG_TUD_ENDPOINT0_SIZE, - .odd = 0, - .length = 0, - .remaining = 0, - }; - _dcd.endpoint[0][0] = ep0; - _dcd.endpoint[0][1] = ep0; - tu_memclr(_dcd.endpoint[1], sizeof(_dcd.endpoint) - sizeof(_dcd.endpoint[0])); - _dcd.addr = 0; - prepare_next_setup_packet(rhport); - KHCI->CTL &= ~USB_CTL_ODDRST_MASK; - dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); -} - -static void process_bus_inactive(uint8_t rhport) -{ - (void) rhport; - const unsigned inten = KHCI->INTEN; - KHCI->INTEN = (inten & ~USB_INTEN_SLEEPEN_MASK) | USB_INTEN_RESUMEEN_MASK; - KHCI->USBCTRL |= USB_USBCTRL_SUSP_MASK; - dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); -} - -static void process_bus_active(uint8_t rhport) -{ - (void) rhport; - KHCI->USBCTRL &= ~USB_USBCTRL_SUSP_MASK; - const unsigned inten = KHCI->INTEN; - KHCI->INTEN = (inten & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK; - dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); -} - -/*------------------------------------------------------------------*/ -/* Device API - *------------------------------------------------------------------*/ -void dcd_init(uint8_t rhport) -{ - (void) rhport; - - KHCI->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; - while (KHCI->USBTRC0 & USB_USBTRC0_USBRESET_MASK); - tu_memclr(&_dcd, sizeof(_dcd)); - KHCI->USBTRC0 |= TU_BIT(6); /* software must set this bit to 1 */ - KHCI->BDTPAGE1 = (uint8_t)((uintptr_t)_dcd.bdt >> 8); - KHCI->BDTPAGE2 = (uint8_t)((uintptr_t)_dcd.bdt >> 16); - KHCI->BDTPAGE3 = (uint8_t)((uintptr_t)_dcd.bdt >> 24); - - dcd_connect(rhport); - NVIC_ClearPendingIRQ(USB0_IRQn); -} - -void dcd_int_enable(uint8_t rhport) -{ - (void) rhport; - KHCI->INTEN = USB_INTEN_USBRSTEN_MASK | USB_INTEN_TOKDNEEN_MASK | - USB_INTEN_SLEEPEN_MASK | USB_INTEN_ERROREN_MASK | USB_INTEN_STALLEN_MASK; - NVIC_EnableIRQ(USB0_IRQn); -} - -void dcd_int_disable(uint8_t rhport) -{ - (void) rhport; - NVIC_DisableIRQ(USB0_IRQn); - KHCI->INTEN = 0; -} - -void dcd_set_address(uint8_t rhport, uint8_t dev_addr) -{ - (void) rhport; - _dcd.addr = dev_addr & 0x7F; - /* Response with status first before changing device address */ - dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); -} - -void dcd_remote_wakeup(uint8_t rhport) -{ - (void) rhport; - unsigned cnt = SystemCoreClock / 100; - KHCI->CTL |= USB_CTL_RESUME_MASK; - while (cnt--) __NOP(); - KHCI->CTL &= ~USB_CTL_RESUME_MASK; -} - -void dcd_connect(uint8_t rhport) -{ - (void) rhport; - KHCI->USBCTRL = 0; - KHCI->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; - KHCI->CTL |= USB_CTL_USBENSOFEN_MASK; -} - -void dcd_disconnect(uint8_t rhport) -{ - (void) rhport; - KHCI->CTL = 0; - KHCI->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; -} - -//--------------------------------------------------------------------+ -// Endpoint API -//--------------------------------------------------------------------+ -bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) -{ - (void) rhport; - - const unsigned ep_addr = ep_desc->bEndpointAddress; - const unsigned epn = ep_addr & 0xFu; - const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; - const unsigned xfer = ep_desc->bmAttributes.xfer; - endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; - const unsigned odd = ep->odd; - buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][0]; - - /* No support for control transfer */ - TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL)); - - ep->max_packet_size = ep_desc->wMaxPacketSize.size; - unsigned val = USB_ENDPT_EPCTLDIS_MASK; - val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0; - val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; - KHCI->ENDPOINT[epn].ENDPT |= val; - - if (xfer != TUSB_XFER_ISOCHRONOUS) { - bd[odd].dts = 1; - bd[odd].data = 0; - bd[odd ^ 1].dts = 1; - bd[odd ^ 1].data = 1; - } - - return true; -} - -void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - const unsigned epn = ep_addr & 0xFu; - const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; - endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; - buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][0]; - const unsigned msk = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; - KHCI->ENDPOINT[epn].ENDPT &= ~msk; - ep->max_packet_size = 0; - ep->length = 0; - ep->remaining = 0; - bd->head = 0; -} - -bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) -{ - (void) rhport; - NVIC_DisableIRQ(USB0_IRQn); - const unsigned epn = ep_addr & 0xFu; - const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; - endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; - buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][ep->odd]; - - if (bd->own) { - TU_LOG1("DCD XFER fail %x %d %lx %lx\r\n", ep_addr, total_bytes, ep->state, bd->head); - return false; /* The last transfer has not completed */ - } - ep->length = total_bytes; - ep->remaining = total_bytes; - - const unsigned mps = ep->max_packet_size; - if (total_bytes > mps) { - buffer_descriptor_t *next = ep->odd ? bd - 1: bd + 1; - /* When total_bytes is greater than the max packet size, - * it prepares to the next transfer to avoid NAK in advance. */ - next->bc = total_bytes >= 2 * mps ? mps: total_bytes - mps; - next->addr = buffer + mps; - next->own = 1; - } - bd->bc = total_bytes >= mps ? mps: total_bytes; - bd->addr = buffer; - __DSB(); - bd->own = 1; /* the own bit must set after addr */ - NVIC_EnableIRQ(USB0_IRQn); - return true; -} - -void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - const unsigned epn = ep_addr & 0xFu; - if (0 == epn) { - KHCI->ENDPOINT[epn].ENDPT |= USB_ENDPT_EPSTALL_MASK; - } else { - const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; - buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; - bd[0].bdt_stall = 1; - bd[1].bdt_stall = 1; - } -} - -void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - const unsigned epn = ep_addr & 0xFu; - const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; - const unsigned odd = _dcd.endpoint[epn][dir].odd; - buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; - - bd[odd ^ 1].own = 0; - bd[odd ^ 1].data = 1; - bd[odd ^ 1].bdt_stall = 0; - bd[odd].own = 0; - bd[odd].data = 0; - bd[odd].bdt_stall = 0; -} - -//--------------------------------------------------------------------+ -// ISR -//--------------------------------------------------------------------+ -void dcd_int_handler(uint8_t rhport) -{ - (void) rhport; - - uint32_t is = KHCI->ISTAT; - uint32_t msk = KHCI->INTEN; - KHCI->ISTAT = is & ~msk; - is &= msk; - if (is & USB_ISTAT_ERROR_MASK) { - /* TODO: */ - uint32_t es = KHCI->ERRSTAT; - KHCI->ERRSTAT = es; - KHCI->ISTAT = is; /* discard any pending events */ - return; - } - - if (is & USB_ISTAT_USBRST_MASK) { - KHCI->ISTAT = is; /* discard any pending events */ - process_bus_reset(rhport); - return; - } - if (is & USB_ISTAT_SLEEP_MASK) { - KHCI->ISTAT = USB_ISTAT_SLEEP_MASK; - process_bus_inactive(rhport); - return; - } - if (is & USB_ISTAT_RESUME_MASK) { - KHCI->ISTAT = USB_ISTAT_RESUME_MASK; - process_bus_active(rhport); - return; - } - if (is & USB_ISTAT_SOFTOK_MASK) { - KHCI->ISTAT = USB_ISTAT_SOFTOK_MASK; - dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); - return; - } - if (is & USB_ISTAT_STALL_MASK) { - KHCI->ISTAT = USB_ISTAT_STALL_MASK; - process_stall(rhport); - return; - } - if (is & USB_ISTAT_TOKDNE_MASK) { - process_tokdne(rhport); - return; - } -} - -#endif diff --git a/tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.c deleted file mode 100755 index 519d0915..00000000 --- a/tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ /dev/null @@ -1,582 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if TUSB_OPT_DEVICE_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX) - -#include "device/dcd.h" -#include "dcd_lpc17_40.h" -#include "chip.h" - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ -#define DCD_ENDPOINT_MAX 32 - -typedef struct TU_ATTR_ALIGNED(4) -{ - //------------- Word 0 -------------// - uint32_t next; - - //------------- Word 1 -------------// - uint16_t atle_mode : 2; // 00: normal, 01: ATLE (auto length extraction) - uint16_t next_valid : 1; - uint16_t : 1; ///< reserved - uint16_t isochronous : 1; // is an iso endpoint - uint16_t max_packet_size : 11; - - volatile uint16_t buflen; // bytes for non-iso, number of packets for iso endpoint - - //------------- Word 2 -------------// - volatile uint32_t buffer; - - //------------- Word 3 -------------// - volatile uint16_t retired : 1; // initialized to zero - volatile uint16_t status : 4; - volatile uint16_t iso_last_packet_valid : 1; - volatile uint16_t atle_lsb_extracted : 1; // used in ATLE mode - volatile uint16_t atle_msb_extracted : 1; // used in ATLE mode - volatile uint16_t atle_mess_len_position : 6; // used in ATLE mode - uint16_t : 2; - - volatile uint16_t present_count; // For non-iso : The number of bytes transferred by the DMA engine - // For iso : number of packets - - //------------- Word 4 -------------// - // uint32_t iso_packet_size_addr; // iso only, can be omitted for non-iso -}dma_desc_t; - -TU_VERIFY_STATIC( sizeof(dma_desc_t) == 16, "size is not correct"); // TODO not support ISO for now - -typedef struct -{ - // must be 128 byte aligned - volatile dma_desc_t* udca[DCD_ENDPOINT_MAX]; - - // TODO DMA does not support control transfer (0-1 are not used, offset to reduce memory) - dma_desc_t dd[DCD_ENDPOINT_MAX]; - - struct - { - uint8_t* out_buffer; - uint8_t out_bytes; - volatile bool out_received; // indicate if data is already received in endpoint - - uint8_t in_bytes; - } control; - -} dcd_data_t; - -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(128) static dcd_data_t _dcd; - - -//--------------------------------------------------------------------+ -// SIE Command -//--------------------------------------------------------------------+ -static void sie_cmd_code (sie_cmdphase_t phase, uint8_t code_data) -{ - LPC_USB->DevIntClr = (DEV_INT_COMMAND_CODE_EMPTY_MASK | DEV_INT_COMMAND_DATA_FULL_MASK); - LPC_USB->CmdCode = (phase << 8) | (code_data << 16); - - uint32_t const wait_flag = (phase == SIE_CMDPHASE_READ) ? DEV_INT_COMMAND_DATA_FULL_MASK : DEV_INT_COMMAND_CODE_EMPTY_MASK; - while ((LPC_USB->DevIntSt & wait_flag) == 0) {} - - LPC_USB->DevIntClr = wait_flag; -} - -static void sie_write (uint8_t cmd_code, uint8_t data_len, uint8_t data) -{ - sie_cmd_code(SIE_CMDPHASE_COMMAND, cmd_code); - - if (data_len) - { - sie_cmd_code(SIE_CMDPHASE_WRITE, data); - } -} - -static uint8_t sie_read (uint8_t cmd_code) -{ - sie_cmd_code(SIE_CMDPHASE_COMMAND , cmd_code); - sie_cmd_code(SIE_CMDPHASE_READ , cmd_code); - return (uint8_t) LPC_USB->CmdData; -} - -//--------------------------------------------------------------------+ -// PIPE HELPER -//--------------------------------------------------------------------+ -static inline uint8_t ep_addr2idx(uint8_t ep_addr) -{ - return 2*(ep_addr & 0x0F) + ((ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0); -} - -static void set_ep_size(uint8_t ep_id, uint16_t max_packet_size) -{ - // follows example in 11.10.4.2 - LPC_USB->ReEp |= TU_BIT(ep_id); - LPC_USB->EpInd = ep_id; // select index before setting packet size - LPC_USB->MaxPSize = max_packet_size; - - while ((LPC_USB->DevIntSt & DEV_INT_ENDPOINT_REALIZED_MASK) == 0) {} - LPC_USB->DevIntClr = DEV_INT_ENDPOINT_REALIZED_MASK; -} - - -//--------------------------------------------------------------------+ -// CONTROLLER API -//--------------------------------------------------------------------+ -static void bus_reset(void) -{ - // step 7 : slave mode set up - LPC_USB->EpIntClr = 0xFFFFFFFF; // clear all pending interrupt - LPC_USB->DevIntClr = 0xFFFFFFFF; // clear all pending interrupt - LPC_USB->EpIntEn = 0x03UL; // control endpoint cannot use DMA, non-control all use DMA - LPC_USB->EpIntPri = 0x03UL; // fast for control endpoint - - // step 8 : DMA set up - LPC_USB->EpDMADis = 0xFFFFFFFF; // firstly disable all dma - LPC_USB->DMARClr = 0xFFFFFFFF; // clear all pending interrupt - LPC_USB->EoTIntClr = 0xFFFFFFFF; - LPC_USB->NDDRIntClr = 0xFFFFFFFF; - LPC_USB->SysErrIntClr = 0xFFFFFFFF; - - tu_memclr(&_dcd, sizeof(dcd_data_t)); -} - -void dcd_init(uint8_t rhport) -{ - (void) rhport; - - //------------- user manual 11.13 usb device controller initialization -------------// - // step 6 : set up control endpoint - set_ep_size(0, CFG_TUD_ENDPOINT0_SIZE); - set_ep_size(1, CFG_TUD_ENDPOINT0_SIZE); - - bus_reset(); - - LPC_USB->DevIntEn = (DEV_INT_DEVICE_STATUS_MASK | DEV_INT_ENDPOINT_FAST_MASK | DEV_INT_ENDPOINT_SLOW_MASK | DEV_INT_ERROR_MASK); - LPC_USB->UDCAH = (uint32_t) _dcd.udca; - LPC_USB->DMAIntEn = (DMA_INT_END_OF_XFER_MASK /*| DMA_INT_NEW_DD_REQUEST_MASK*/ | DMA_INT_ERROR_MASK); - - dcd_connect(rhport); - - // Clear pending IRQ - NVIC_ClearPendingIRQ(USB_IRQn); -} - -void dcd_int_enable(uint8_t rhport) -{ - (void) rhport; - NVIC_EnableIRQ(USB_IRQn); -} - -void dcd_int_disable(uint8_t rhport) -{ - (void) rhport; - NVIC_DisableIRQ(USB_IRQn); -} - -void dcd_set_address(uint8_t rhport, uint8_t dev_addr) -{ - // Response with status first before changing device address - dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); - - sie_write(SIE_CMDCODE_SET_ADDRESS, 1, 0x80 | dev_addr); // 7th bit is : device_enable - - // Also Set Configure Device to enable non-control endpoint response - sie_write(SIE_CMDCODE_CONFIGURE_DEVICE, 1, 1); -} - -void dcd_remote_wakeup(uint8_t rhport) -{ - (void) rhport; -} - -void dcd_connect(uint8_t rhport) -{ - (void) rhport; - sie_write(SIE_CMDCODE_DEVICE_STATUS, 1, SIE_DEV_STATUS_CONNECT_STATUS_MASK); -} - -void dcd_disconnect(uint8_t rhport) -{ - (void) rhport; - sie_write(SIE_CMDCODE_DEVICE_STATUS, 1, 0); -} - -//--------------------------------------------------------------------+ -// CONTROL HELPER -//--------------------------------------------------------------------+ -static inline uint8_t byte2dword(uint8_t bytes) -{ - return (bytes + 3) / 4; // length in dwords -} - -static void control_ep_write(void const * buffer, uint8_t len) -{ - uint32_t const * buf32 = (uint32_t const *) buffer; - - LPC_USB->Ctrl = USBCTRL_WRITE_ENABLE_MASK; // logical endpoint = 0 - LPC_USB->TxPLen = (uint32_t) len; - - for (uint8_t count = 0; count < byte2dword(len); count++) - { - LPC_USB->TxData = *buf32; // NOTE: cortex M3 have no problem with alignment - buf32++; - } - - LPC_USB->Ctrl = 0; - - // select control IN & validate the endpoint - sie_write(SIE_CMDCODE_ENDPOINT_SELECT+1, 0, 0); - sie_write(SIE_CMDCODE_BUFFER_VALIDATE , 0, 0); -} - -static uint8_t control_ep_read(void * buffer, uint8_t len) -{ - LPC_USB->Ctrl = USBCTRL_READ_ENABLE_MASK; // logical endpoint = 0 - while ((LPC_USB->RxPLen & USBRXPLEN_PACKET_READY_MASK) == 0) {} // TODO blocking, should have timeout - - len = tu_min8(len, (uint8_t) (LPC_USB->RxPLen & USBRXPLEN_PACKET_LENGTH_MASK) ); - uint32_t *buf32 = (uint32_t*) buffer; - - for (uint8_t count=0; count < byte2dword(len); count++) - { - *buf32 = LPC_USB->RxData; - buf32++; - } - - LPC_USB->Ctrl = 0; - - // select control OUT & clear the endpoint - sie_write(SIE_CMDCODE_ENDPOINT_SELECT+0, 0, 0); - sie_write(SIE_CMDCODE_BUFFER_CLEAR , 0, 0); - - return len; -} - -//--------------------------------------------------------------------+ -// DCD Endpoint Port -//--------------------------------------------------------------------+ - -bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) -{ - (void) rhport; - - uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); - uint8_t const ep_id = ep_addr2idx(p_endpoint_desc->bEndpointAddress); - - // Endpoint type is fixed to endpoint number - // 1: interrupt, 2: Bulk, 3: Iso and so on - switch ( p_endpoint_desc->bmAttributes.xfer ) - { - case TUSB_XFER_INTERRUPT: - TU_ASSERT((epnum % 3) == 1); - break; - - case TUSB_XFER_BULK: - TU_ASSERT((epnum % 3) == 2 || (epnum == 15)); - break; - - case TUSB_XFER_ISOCHRONOUS: - TU_ASSERT((epnum % 3) == 0 && (epnum != 0) && (epnum != 15)); - break; - - default: - break; - } - - //------------- Realize Endpoint with Max Packet Size -------------// - set_ep_size(ep_id, p_endpoint_desc->wMaxPacketSize.size); - - //------------- first DD prepare -------------// - dma_desc_t* const dd = &_dcd.dd[ep_id]; - tu_memclr(dd, sizeof(dma_desc_t)); - - dd->isochronous = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) ? 1 : 0; - dd->max_packet_size = p_endpoint_desc->wMaxPacketSize.size; - dd->retired = 1; // invalid at first - - sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS + ep_id, 1, 0); // clear all endpoint status - - return true; -} - -void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - if ( tu_edpt_number(ep_addr) == 0 ) - { - sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+0, 1, SIE_SET_ENDPOINT_STALLED_MASK | SIE_SET_ENDPOINT_CONDITION_STALLED_MASK); - }else - { - uint8_t ep_id = ep_addr2idx( ep_addr ); - sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+ep_id, 1, SIE_SET_ENDPOINT_STALLED_MASK); - } -} - -void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - uint8_t ep_id = ep_addr2idx(ep_addr); - - sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+ep_id, 1, 0); -} - -static bool control_xact(uint8_t rhport, uint8_t dir, uint8_t * buffer, uint8_t len) -{ - (void) rhport; - - if ( dir ) - { - _dcd.control.in_bytes = len; - control_ep_write(buffer, len); - }else - { - if ( _dcd.control.out_received ) - { - // Already received the DATA OUT packet - _dcd.control.out_received = false; - _dcd.control.out_buffer = NULL; - _dcd.control.out_bytes = 0; - - uint8_t received = control_ep_read(buffer, len); - dcd_event_xfer_complete(0, 0, received, XFER_RESULT_SUCCESS, true); - }else - { - _dcd.control.out_buffer = buffer; - _dcd.control.out_bytes = len; - } - } - - return true; -} - -bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) -{ - // Control transfer is not DMA support, and must be done in slave mode - if ( tu_edpt_number(ep_addr) == 0 ) - { - return control_xact(rhport, tu_edpt_dir(ep_addr), buffer, (uint8_t) total_bytes); - } - else - { - uint8_t ep_id = ep_addr2idx(ep_addr); - dma_desc_t* dd = &_dcd.dd[ep_id]; - - // Prepare DMA descriptor - // Isochronous & max packet size must be preserved, Other fields of dd should be clear - uint16_t const ep_size = dd->max_packet_size; - uint8_t is_iso = dd->isochronous; - - tu_memclr(dd, sizeof(dma_desc_t)); - dd->isochronous = is_iso; - dd->max_packet_size = ep_size; - dd->buffer = (uint32_t) buffer; - dd->buflen = total_bytes; - - _dcd.udca[ep_id] = dd; - - if ( ep_id % 2 ) - { - // Clear EP interrupt before Enable DMA - LPC_USB->EpIntEn &= ~TU_BIT(ep_id); - LPC_USB->EpDMAEn = TU_BIT(ep_id); - - // endpoint IN need to actively raise DMA request - LPC_USB->DMARSet = TU_BIT(ep_id); - }else - { - // Enable DMA - LPC_USB->EpDMAEn = TU_BIT(ep_id); - } - - return true; - } -} - -//--------------------------------------------------------------------+ -// ISR -//--------------------------------------------------------------------+ - -// handle control xfer (slave mode) -static void control_xfer_isr(uint8_t rhport, uint32_t ep_int_status) -{ - // Control out complete - if ( ep_int_status & TU_BIT(0) ) - { - bool is_setup = sie_read(SIE_CMDCODE_ENDPOINT_SELECT+0) & SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK; - - LPC_USB->EpIntClr = TU_BIT(0); - - if (is_setup) - { - uint8_t setup_packet[8]; - control_ep_read(setup_packet, 8); // TODO read before clear setup above - - dcd_event_setup_received(rhport, setup_packet, true); - } - else if ( _dcd.control.out_buffer ) - { - // software queued transfer previously - uint8_t received = control_ep_read(_dcd.control.out_buffer, _dcd.control.out_bytes); - - _dcd.control.out_buffer = NULL; - _dcd.control.out_bytes = 0; - - dcd_event_xfer_complete(rhport, 0, received, XFER_RESULT_SUCCESS, true); - }else - { - // hardware auto ack packet -> mark as received - _dcd.control.out_received = true; - } - } - - // Control In complete - if ( ep_int_status & TU_BIT(1) ) - { - LPC_USB->EpIntClr = TU_BIT(1); - dcd_event_xfer_complete(rhport, TUSB_DIR_IN_MASK, _dcd.control.in_bytes, XFER_RESULT_SUCCESS, true); - } -} - -// handle bus event signal -static void bus_event_isr(uint8_t rhport) -{ - uint8_t const dev_status = sie_read(SIE_CMDCODE_DEVICE_STATUS); - if (dev_status & SIE_DEV_STATUS_RESET_MASK) - { - bus_reset(); - dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); - } - - if (dev_status & SIE_DEV_STATUS_CONNECT_CHANGE_MASK) - { - // device is disconnected, require using VBUS (P1_30) - dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true); - } - - if (dev_status & SIE_DEV_STATUS_SUSPEND_CHANGE_MASK) - { - if (dev_status & SIE_DEV_STATUS_SUSPEND_MASK) - { - dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); - } - else - { - dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); - } - } -} - -// Helper to complete a DMA descriptor for non-control transfer -static void dd_complete_isr(uint8_t rhport, uint8_t ep_id) -{ - dma_desc_t* const dd = &_dcd.dd[ep_id]; - uint8_t result = (dd->status == DD_STATUS_NORMAL || dd->status == DD_STATUS_DATA_UNDERUN) ? XFER_RESULT_SUCCESS : XFER_RESULT_FAILED; - uint8_t const ep_addr = (ep_id / 2) | ((ep_id & 0x01) ? TUSB_DIR_IN_MASK : 0); - - dcd_event_xfer_complete(rhport, ep_addr, dd->present_count, result, true); -} - -// main USB IRQ handler -void dcd_int_handler(uint8_t rhport) -{ - uint32_t const dev_int_status = LPC_USB->DevIntSt & LPC_USB->DevIntEn; - LPC_USB->DevIntClr = dev_int_status;// Acknowledge handled interrupt - - // Bus event - if (dev_int_status & DEV_INT_DEVICE_STATUS_MASK) - { - bus_event_isr(rhport); - } - - // Endpoint interrupt - uint32_t const ep_int_status = LPC_USB->EpIntSt & LPC_USB->EpIntEn; - - // Control Endpoint are fast - if (dev_int_status & DEV_INT_ENDPOINT_FAST_MASK) - { - // Note clear USBEpIntClr will also clear the setup received bit --> clear after handle setup packet - // Only clear USBEpIntClr 1 endpoint each, and should wait for CDFULL bit set - control_xfer_isr(rhport, ep_int_status); - } - - // non-control IN are slow - if (dev_int_status & DEV_INT_ENDPOINT_SLOW_MASK) - { - for ( uint8_t ep_id = 3; ep_id < DCD_ENDPOINT_MAX; ep_id += 2 ) - { - if ( tu_bit_test(ep_int_status, ep_id) ) - { - LPC_USB->EpIntClr = TU_BIT(ep_id); - - // Clear Ep interrupt for next DMA - LPC_USB->EpIntEn &= ~TU_BIT(ep_id); - - dd_complete_isr(rhport, ep_id); - } - } - } - - // DMA transfer complete (RAM <-> EP) for Non-Control - // OUT: USB transfer is fully complete - // IN : UBS transfer is still on-going -> enable EpIntEn to know when it is complete - uint32_t const dma_int_status = LPC_USB->DMAIntSt & LPC_USB->DMAIntEn; - if (dma_int_status & DMA_INT_END_OF_XFER_MASK) - { - uint32_t const eot = LPC_USB->EoTIntSt; - LPC_USB->EoTIntClr = eot; // acknowledge interrupt source - - for ( uint8_t ep_id = 2; ep_id < DCD_ENDPOINT_MAX; ep_id++ ) - { - if ( tu_bit_test(eot, ep_id) ) - { - if ( ep_id & 0x01 ) - { - // IN enable EpInt for end of usb transfer - LPC_USB->EpIntEn |= TU_BIT(ep_id); - }else - { - // OUT - dd_complete_isr(rhport, ep_id); - } - } - } - } - - // Errors - if ( (dev_int_status & DEV_INT_ERROR_MASK) || (dma_int_status & DMA_INT_ERROR_MASK) ) - { - uint32_t error_status = sie_read(SIE_CMDCODE_READ_ERROR_STATUS); - (void) error_status; - TU_BREAKPOINT(); - } -} - -#endif diff --git a/tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.h deleted file mode 100755 index 07daa32e..00000000 --- a/tinyusb/src/portable/nxp/lpc17_40/dcd_lpc17_40.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef _TUSB_DCD_LPC17_40_H_ -#define _TUSB_DCD_LPC17_40_H_ - -#include "common/tusb_common.h" - -#ifdef __cplusplus - extern "C" { -#endif - -//--------------------------------------------------------------------+ -// Register Interface -//--------------------------------------------------------------------+ - -//------------- USB Interrupt USBIntSt -------------// -//enum { -// DCD_USB_REQ_LOW_PRIO_MASK = TU_BIT(0), -// DCD_USB_REQ_HIGH_PRIO_MASK = TU_BIT(1), -// DCD_USB_REQ_DMA_MASK = TU_BIT(2), -// DCD_USB_REQ_NEED_CLOCK_MASK = TU_BIT(8), -// DCD_USB_REQ_ENABLE_MASK = TU_BIT(31) -//}; - -//------------- Device Interrupt USBDevInt -------------// -enum { - DEV_INT_FRAME_MASK = TU_BIT(0), - DEV_INT_ENDPOINT_FAST_MASK = TU_BIT(1), - DEV_INT_ENDPOINT_SLOW_MASK = TU_BIT(2), - DEV_INT_DEVICE_STATUS_MASK = TU_BIT(3), - DEV_INT_COMMAND_CODE_EMPTY_MASK = TU_BIT(4), - DEV_INT_COMMAND_DATA_FULL_MASK = TU_BIT(5), - DEV_INT_RX_ENDPOINT_PACKET_MASK = TU_BIT(6), - DEV_INT_TX_ENDPOINT_PACKET_MASK = TU_BIT(7), - DEV_INT_ENDPOINT_REALIZED_MASK = TU_BIT(8), - DEV_INT_ERROR_MASK = TU_BIT(9) -}; - -//------------- DMA Interrupt USBDMAInt-------------// -enum { - DMA_INT_END_OF_XFER_MASK = TU_BIT(0), - DMA_INT_NEW_DD_REQUEST_MASK = TU_BIT(1), - DMA_INT_ERROR_MASK = TU_BIT(2) -}; - -//------------- USBCtrl -------------// -enum { - USBCTRL_READ_ENABLE_MASK = TU_BIT(0), - USBCTRL_WRITE_ENABLE_MASK = TU_BIT(1), -}; - -//------------- USBRxPLen -------------// -enum { - USBRXPLEN_PACKET_LENGTH_MASK = (TU_BIT(10)-1), - USBRXPLEN_DATA_VALID_MASK = TU_BIT(10), - USBRXPLEN_PACKET_READY_MASK = TU_BIT(11), -}; - -//------------- SIE Command Code -------------// -typedef enum -{ - SIE_CMDPHASE_WRITE = 1, - SIE_CMDPHASE_READ = 2, - SIE_CMDPHASE_COMMAND = 5 -} sie_cmdphase_t; - -enum { - // device commands - SIE_CMDCODE_SET_ADDRESS = 0xd0, - SIE_CMDCODE_CONFIGURE_DEVICE = 0xd8, - SIE_CMDCODE_SET_MODE = 0xf3, - SIE_CMDCODE_READ_FRAME_NUMBER = 0xf5, - SIE_CMDCODE_READ_TEST_REGISTER = 0xfd, - SIE_CMDCODE_DEVICE_STATUS = 0xfe, - SIE_CMDCODE_GET_ERROR = 0xff, - SIE_CMDCODE_READ_ERROR_STATUS = 0xfb, - - // endpoint commands - SIE_CMDCODE_ENDPOINT_SELECT = 0x00, // + endpoint index - SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT = 0x40, // + endpoint index, should use USBEpIntClr instead - SIE_CMDCODE_ENDPOINT_SET_STATUS = 0x40, // + endpoint index - SIE_CMDCODE_BUFFER_CLEAR = 0xf2, - SIE_CMDCODE_BUFFER_VALIDATE = 0xfa -}; - -//------------- SIE Device Status (get/set from SIE_CMDCODE_DEVICE_STATUS) -------------// -enum { - SIE_DEV_STATUS_CONNECT_STATUS_MASK = TU_BIT(0), - SIE_DEV_STATUS_CONNECT_CHANGE_MASK = TU_BIT(1), - SIE_DEV_STATUS_SUSPEND_MASK = TU_BIT(2), - SIE_DEV_STATUS_SUSPEND_CHANGE_MASK = TU_BIT(3), - SIE_DEV_STATUS_RESET_MASK = TU_BIT(4) -}; - -//------------- SIE Select Endpoint Command -------------// -enum { - SIE_SELECT_ENDPOINT_FULL_EMPTY_MASK = TU_BIT(0), // 0: empty, 1 full. IN endpoint checks empty, OUT endpoint check full - SIE_SELECT_ENDPOINT_STALL_MASK = TU_BIT(1), - SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK = TU_BIT(2), // clear by SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT - SIE_SELECT_ENDPOINT_PACKET_OVERWRITTEN_MASK = TU_BIT(3), // previous packet is overwritten by a SETUP packet - SIE_SELECT_ENDPOINT_NAK_MASK = TU_BIT(4), // last packet response is NAK (auto clear by an ACK) - SIE_SELECT_ENDPOINT_BUFFER1_FULL_MASK = TU_BIT(5), - SIE_SELECT_ENDPOINT_BUFFER2_FULL_MASK = TU_BIT(6) -}; - -typedef enum -{ - SIE_SET_ENDPOINT_STALLED_MASK = TU_BIT(0), - SIE_SET_ENDPOINT_DISABLED_MASK = TU_BIT(5), - SIE_SET_ENDPOINT_RATE_FEEDBACK_MASK = TU_BIT(6), - SIE_SET_ENDPOINT_CONDITION_STALLED_MASK = TU_BIT(7), -}sie_endpoint_set_status_mask_t; - -//------------- DMA Descriptor Status -------------// -enum { - DD_STATUS_NOT_SERVICED = 0, - DD_STATUS_BEING_SERVICED, - DD_STATUS_NORMAL, - DD_STATUS_DATA_UNDERUN, // short packet - DD_STATUS_DATA_OVERRUN, - DD_STATUS_SYSTEM_ERROR -}; - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/tinyusb/src/portable/nxp/lpc17_40/hcd_lpc17_40.c b/tinyusb/src/portable/nxp/lpc17_40/hcd_lpc17_40.c deleted file mode 100755 index 1c1faed9..00000000 --- a/tinyusb/src/portable/nxp/lpc17_40/hcd_lpc17_40.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if TUSB_OPT_HOST_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX) - -#include "chip.h" - -void hcd_int_enable(uint8_t rhport) -{ - (void) rhport; - NVIC_EnableIRQ(USB_IRQn); -} - -void hcd_int_disable(uint8_t rhport) -{ - (void) rhport; - NVIC_DisableIRQ(USB_IRQn); -} - -#endif - diff --git a/tinyusb/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/tinyusb/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c deleted file mode 100755 index 4392d188..00000000 --- a/tinyusb/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ /dev/null @@ -1,537 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller with code name LPC IP3511 - * for almost their new MCUs. Currently supported and tested families are - * - LPC11U68, LPC11U37 - * - LPC1347 - * - LPC51U68 - * - LPC54114 - * - LPC55s69 - */ -#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC13XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC15XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC55XX) - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ - -#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || CFG_TUSB_MCU == OPT_MCU_LPC15XX - // LPCOpen - #include "chip.h" -#else - // SDK - #include "fsl_device_registers.h" - #define INCLUDE_FSL_DEVICE_REGISTERS -#endif - -#include "device/dcd.h" - -//--------------------------------------------------------------------+ -// IP3511 Registers -//--------------------------------------------------------------------+ - -typedef struct { - __IO uint32_t DEVCMDSTAT; // Device Command/Status register, offset: 0x0 - __I uint32_t INFO; // Info register, offset: 0x4 - __IO uint32_t EPLISTSTART; // EP Command/Status List start address, offset: 0x8 - __IO uint32_t DATABUFSTART; // Data buffer start address, offset: 0xC - __IO uint32_t LPM; // Link Power Management register, offset: 0x10 - __IO uint32_t EPSKIP; // Endpoint skip, offset: 0x14 - __IO uint32_t EPINUSE; // Endpoint Buffer in use, offset: 0x18 - __IO uint32_t EPBUFCFG; // Endpoint Buffer Configuration register, offset: 0x1C - __IO uint32_t INTSTAT; // interrupt status register, offset: 0x20 - __IO uint32_t INTEN; // interrupt enable register, offset: 0x24 - __IO uint32_t INTSETSTAT; // set interrupt status register, offset: 0x28 - uint8_t RESERVED_0[8]; - __I uint32_t EPTOGGLE; // Endpoint toggle register, offset: 0x34 -} dcd_registers_t; - -// Max nbytes for each control/bulk/interrupt transfer -enum { - NBYTES_CBI_FULLSPEED_MAX = 64, - NBYTES_CBI_HIGHSPEED_MAX = 32767 // can be up to all 15-bit, but only tested with 4096 -}; - -enum { - INT_SOF_MASK = TU_BIT(30), - INT_DEVICE_STATUS_MASK = TU_BIT(31) -}; - -enum { - CMDSTAT_DEVICE_ADDR_MASK = TU_BIT(7 )-1, - CMDSTAT_DEVICE_ENABLE_MASK = TU_BIT(7 ), - CMDSTAT_SETUP_RECEIVED_MASK = TU_BIT(8 ), - CMDSTAT_DEVICE_CONNECT_MASK = TU_BIT(16), // reflect the soft-connect only, does not reflect the actual attached state - CMDSTAT_DEVICE_SUSPEND_MASK = TU_BIT(17), - // 23-22 is link speed (only available for HighSpeed port) - CMDSTAT_CONNECT_CHANGE_MASK = TU_BIT(24), - CMDSTAT_SUSPEND_CHANGE_MASK = TU_BIT(25), - CMDSTAT_RESET_CHANGE_MASK = TU_BIT(26), - CMDSTAT_VBUS_DEBOUNCED_MASK = TU_BIT(28), -}; - -enum { - CMDSTAT_SPEED_SHIFT = 22 -}; - -//--------------------------------------------------------------------+ -// Endpoint Command/Status List -//--------------------------------------------------------------------+ - -// Endpoint Command/Status -typedef union TU_ATTR_PACKED -{ - // Full and High speed has different bit layout for buffer_offset and nbytes - - // Buffer (aligned 64) = DATABUFSTART [31:22] | buffer_offset [21:6] - volatile struct { - uint32_t offset : 16; - uint32_t nbytes : 10; - uint32_t TU_RESERVED : 6; - } buffer_fs; - - // Buffer (aligned 64) = USB_RAM [31:17] | buffer_offset [16:6] - volatile struct { - uint32_t offset : 11 ; - uint32_t nbytes : 15 ; - uint32_t TU_RESERVED : 6 ; - } buffer_hs; - - volatile struct { - uint32_t TU_RESERVED : 26; - uint32_t is_iso : 1 ; - uint32_t toggle_mode : 1 ; - uint32_t toggle_reset : 1 ; - uint32_t stall : 1 ; - uint32_t disable : 1 ; - uint32_t active : 1 ; - }; -}ep_cmd_sts_t; - -TU_VERIFY_STATIC( sizeof(ep_cmd_sts_t) == 4, "size is not correct" ); - -// Software transfer management -typedef struct -{ - uint16_t total_bytes; - uint16_t xferred_bytes; - - uint16_t nbytes; - - // prevent unaligned access on Highspeed port on USB_SRAM - uint16_t TU_RESERVED; -}xfer_dma_t; - -// Absolute max of endpoints pairs for all port -// - 11 13 15 51 54 has 5x2 endpoints -// - 55 usb0 (FS) has 5x2 endpoints, usb1 (HS) has 6x2 endpoints -#define MAX_EP_PAIRS 6 - -// NOTE data will be transferred as soon as dcd get request by dcd_pipe(_queue)_xfer using double buffering. -// current_td is used to keep track of number of remaining & xferred bytes of the current request. -typedef struct -{ - // 256 byte aligned, 2 for double buffer (not used) - // Each cmd_sts can only transfer up to DMA_NBYTES_MAX bytes each - ep_cmd_sts_t ep[2*MAX_EP_PAIRS][2]; - xfer_dma_t dma[2*MAX_EP_PAIRS]; - - TU_ATTR_ALIGNED(64) uint8_t setup_packet[8]; -}dcd_data_t; - -// EP list must be 256-byte aligned -// Some MCU controller may require this variable to be placed in specific SRAM region. -// For example: LPC55s69 port1 Highspeed must be USB_RAM (0x40100000) -// Use CFG_TUSB_MEM_SECTION to place it accordingly. -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd; - -//--------------------------------------------------------------------+ -// Multiple Controllers -//--------------------------------------------------------------------+ - -typedef struct -{ - dcd_registers_t* regs; // registers - const tusb_speed_t max_speed; // max link speed - const IRQn_Type irqnum; // IRQ number - const uint8_t ep_pairs; // Max bi-directional Endpoints -}dcd_controller_t; - -#ifdef INCLUDE_FSL_DEVICE_REGISTERS - -static const dcd_controller_t _dcd_controller[] = -{ - { .regs = (dcd_registers_t*) USB0_BASE , .max_speed = TUSB_SPEED_FULL, .irqnum = USB0_IRQn, .ep_pairs = FSL_FEATURE_USB_EP_NUM }, - #if defined(FSL_FEATURE_SOC_USBHSD_COUNT) && FSL_FEATURE_SOC_USBHSD_COUNT - { .regs = (dcd_registers_t*) USBHSD_BASE, .max_speed = TUSB_SPEED_HIGH, .irqnum = USB1_IRQn, .ep_pairs = FSL_FEATURE_USBHSD_EP_NUM } - #endif -}; - -#else - -static const dcd_controller_t _dcd_controller[] = -{ - { .regs = (dcd_registers_t*) LPC_USB0_BASE, .max_speed = TUSB_SPEED_FULL, .irqnum = USB0_IRQn, .ep_pairs = 5 }, -}; - -#endif - -//--------------------------------------------------------------------+ -// INTERNAL OBJECT & FUNCTION DECLARATION -//--------------------------------------------------------------------+ - -static inline uint16_t get_buf_offset(void const * buffer) -{ - uint32_t addr = (uint32_t) buffer; - TU_ASSERT( (addr & 0x3f) == 0, 0 ); - return ( (addr >> 6) & 0xFFFFUL ) ; -} - -static inline uint8_t ep_addr2id(uint8_t ep_addr) -{ - return 2*(ep_addr & 0x0F) + ((ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0); -} - -//--------------------------------------------------------------------+ -// CONTROLLER API -//--------------------------------------------------------------------+ -void dcd_init(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - dcd_reg->EPLISTSTART = (uint32_t) _dcd.ep; - dcd_reg->DATABUFSTART = tu_align((uint32_t) &_dcd, TU_BIT(22)); // 22-bit alignment - dcd_reg->INTSTAT |= dcd_reg->INTSTAT; // clear all pending interrupt - dcd_reg->INTEN = INT_DEVICE_STATUS_MASK; - dcd_reg->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK | - CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; - - NVIC_ClearPendingIRQ(_dcd_controller[rhport].irqnum); -} - -void dcd_int_enable(uint8_t rhport) -{ - NVIC_EnableIRQ(_dcd_controller[rhport].irqnum); -} - -void dcd_int_disable(uint8_t rhport) -{ - NVIC_DisableIRQ(_dcd_controller[rhport].irqnum); -} - -void dcd_set_address(uint8_t rhport, uint8_t dev_addr) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - // Response with status first before changing device address - dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); - - dcd_reg->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK; - dcd_reg->DEVCMDSTAT |= dev_addr; -} - -void dcd_remote_wakeup(uint8_t rhport) -{ - (void) rhport; -} - -void dcd_connect(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->DEVCMDSTAT |= CMDSTAT_DEVICE_CONNECT_MASK; -} - -void dcd_disconnect(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->DEVCMDSTAT &= ~CMDSTAT_DEVICE_CONNECT_MASK; -} - -//--------------------------------------------------------------------+ -// DCD Endpoint Port -//--------------------------------------------------------------------+ -void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - // TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around - uint8_t const ep_id = ep_addr2id(ep_addr); - _dcd.ep[ep_id][0].stall = 1; -} - -void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - uint8_t const ep_id = ep_addr2id(ep_addr); - - _dcd.ep[ep_id][0].stall = 0; - _dcd.ep[ep_id][0].toggle_reset = 1; - _dcd.ep[ep_id][0].toggle_mode = 0; -} - -bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) -{ - (void) rhport; - - // TODO not support ISO yet - TU_VERIFY(p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); - - //------------- Prepare Queue Head -------------// - uint8_t ep_id = ep_addr2id(p_endpoint_desc->bEndpointAddress); - - // Check if endpoint is available - TU_ASSERT( _dcd.ep[ep_id][0].disable && _dcd.ep[ep_id][1].disable ); - - tu_memclr(_dcd.ep[ep_id], 2*sizeof(ep_cmd_sts_t)); - _dcd.ep[ep_id][0].is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS); - - // Enable EP interrupt - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->INTEN |= TU_BIT(ep_id); - - return true; -} - -static void prepare_setup_packet(uint8_t rhport) -{ - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) - { - _dcd.ep[0][1].buffer_fs.offset = get_buf_offset(_dcd.setup_packet);; - }else - { - _dcd.ep[0][1].buffer_hs.offset = get_buf_offset(_dcd.setup_packet);; - } -} - -static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes) -{ - uint16_t nbytes; - - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) - { - // TODO ISO FullSpeed can have up to 1023 bytes - nbytes = tu_min16(total_bytes, NBYTES_CBI_FULLSPEED_MAX); - _dcd.ep[ep_id][0].buffer_fs.offset = buf_offset; - _dcd.ep[ep_id][0].buffer_fs.nbytes = nbytes; - }else - { - nbytes = tu_min16(total_bytes, NBYTES_CBI_HIGHSPEED_MAX); - _dcd.ep[ep_id][0].buffer_hs.offset = buf_offset; - _dcd.ep[ep_id][0].buffer_hs.nbytes = nbytes; - } - - _dcd.dma[ep_id].nbytes = nbytes; - - _dcd.ep[ep_id][0].active = 1; -} - -bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) -{ - (void) rhport; - - uint8_t const ep_id = ep_addr2id(ep_addr); - - tu_memclr(&_dcd.dma[ep_id], sizeof(xfer_dma_t)); - _dcd.dma[ep_id].total_bytes = total_bytes; - - prepare_ep_xfer(rhport, ep_id, get_buf_offset(buffer), total_bytes); - - return true; -} - -//--------------------------------------------------------------------+ -// IRQ -//--------------------------------------------------------------------+ -static void bus_reset(uint8_t rhport) -{ - tu_memclr(&_dcd, sizeof(dcd_data_t)); - - // disable all non-control endpoints on bus reset - for(uint8_t ep_id = 2; ep_id < 2*MAX_EP_PAIRS; ep_id++) - { - _dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1; - } - - prepare_setup_packet(rhport); - - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - dcd_reg->EPINUSE = 0; - dcd_reg->EPBUFCFG = 0; - dcd_reg->EPSKIP = 0xFFFFFFFF; - - dcd_reg->INTSTAT = dcd_reg->INTSTAT; // clear all pending interrupt - dcd_reg->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; // clear setup received interrupt - dcd_reg->INTEN = INT_DEVICE_STATUS_MASK | TU_BIT(0) | TU_BIT(1); // enable device status & control endpoints -} - -static void process_xfer_isr(uint8_t rhport, uint32_t int_status) -{ - uint8_t const max_ep = 2*_dcd_controller[rhport].ep_pairs; - - for(uint8_t ep_id = 0; ep_id < max_ep; ep_id++ ) - { - if ( tu_bit_test(int_status, ep_id) ) - { - ep_cmd_sts_t * ep_cs = &_dcd.ep[ep_id][0]; - xfer_dma_t* xfer_dma = &_dcd.dma[ep_id]; - - if ( ep_id == 0 || ep_id == 1) - { - // For control endpoint, we need to manually clear Active bit - ep_cs->active = 0; - } - - uint16_t buf_offset; - uint16_t buf_nbytes; - - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL) - { - buf_offset = ep_cs->buffer_fs.offset; - buf_nbytes = ep_cs->buffer_fs.nbytes; - }else - { - buf_offset = ep_cs->buffer_hs.offset; - buf_nbytes = ep_cs->buffer_hs.nbytes; - } - - xfer_dma->xferred_bytes += xfer_dma->nbytes - buf_nbytes; - - if ( (buf_nbytes == 0) && (xfer_dma->total_bytes > xfer_dma->xferred_bytes) ) - { - // There is more data to transfer - // buff_offset has been already increased by hw to correct value for next transfer - prepare_ep_xfer(rhport, ep_id, buf_offset, xfer_dma->total_bytes - xfer_dma->xferred_bytes); - } - else - { - // for detecting ZLP - xfer_dma->total_bytes = xfer_dma->xferred_bytes; - - uint8_t const ep_addr = tu_edpt_addr(ep_id / 2, ep_id & 0x01); - - // TODO no way determine if the transfer is failed or not - dcd_event_xfer_complete(rhport, ep_addr, xfer_dma->xferred_bytes, XFER_RESULT_SUCCESS, true); - } - } - } -} - -void dcd_int_handler(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - uint32_t const cmd_stat = dcd_reg->DEVCMDSTAT; - - uint32_t int_status = dcd_reg->INTSTAT & dcd_reg->INTEN; - dcd_reg->INTSTAT = int_status; // Acknowledge handled interrupt - - if (int_status == 0) return; - - //------------- Device Status -------------// - if ( int_status & INT_DEVICE_STATUS_MASK ) - { - dcd_reg->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; - - if ( cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset - { - bus_reset(rhport); - - tusb_speed_t speed = TUSB_SPEED_FULL; - - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_HIGH) - { - // 0 : reserved, 1 : full, 2 : high, 3: super - if ( 2 == ((cmd_stat >> CMDSTAT_SPEED_SHIFT) & 0x3UL) ) - { - speed= TUSB_SPEED_HIGH; - } - } - - dcd_event_bus_reset(rhport, speed, true); - } - - if (cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK) - { - // device disconnect - if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) - { - // debouncing as this can be set when device is powering - dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true); - } - } - - // TODO support suspend & resume - if (cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK) - { - if (cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK) - { // suspend signal, bus idle for more than 3ms - // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration. - if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) - { - dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); - } - } - } -// else -// { // resume signal -// dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); -// } -// } - } - - // Setup Receive - if ( tu_bit_test(int_status, 0) && (cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) ) - { - // Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints - _dcd.ep[0][0].active = _dcd.ep[1][0].active = 0; - _dcd.ep[0][0].stall = _dcd.ep[1][0].stall = 0; - - dcd_reg->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; - - dcd_event_setup_received(rhport, _dcd.setup_packet, true); - - // keep waiting for next setup - prepare_setup_packet(rhport); - - // clear bit0 - int_status = tu_bit_clear(int_status, 0); - } - - // Endpoint transfer complete interrupt - process_xfer_isr(rhport, int_status); -} - -#endif - diff --git a/tinyusb/src/portable/nxp/transdimension/common_transdimension.h b/tinyusb/src/portable/nxp/transdimension/common_transdimension.h deleted file mode 100755 index 69074de4..00000000 --- a/tinyusb/src/portable/nxp/transdimension/common_transdimension.h +++ /dev/null @@ -1,136 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef COMMON_TRANSDIMENSION_H_ -#define COMMON_TRANSDIMENSION_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -// USBCMD -enum { - USBCMD_RUN_STOP = TU_BIT(0), - USBCMD_RESET = TU_BIT(1), - USBCMD_SETUP_TRIPWIRE = TU_BIT(13), - USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD -// Interrupt Threshold bit 23:16 -}; - -// PORTSC1 -#define PORTSC1_PORT_SPEED_POS 26 - -enum { - PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0), - PORTSC1_FORCE_PORT_RESUME = TU_BIT(6), - PORTSC1_SUSPEND = TU_BIT(7), - PORTSC1_FORCE_FULL_SPEED = TU_BIT(24), - PORTSC1_PORT_SPEED = TU_BIT(26) | TU_BIT(27) -}; - -// OTGSC -enum { - OTGSC_VBUS_DISCHARGE = TU_BIT(0), - OTGSC_VBUS_CHARGE = TU_BIT(1), -// OTGSC_HWASSIST_AUTORESET = TU_BIT(2), - OTGSC_OTG_TERMINATION = TU_BIT(3), ///< Must set to 1 when OTG go to device mode - OTGSC_DATA_PULSING = TU_BIT(4), - OTGSC_ID_PULLUP = TU_BIT(5), -// OTGSC_HWASSIT_DATA_PULSE = TU_BIT(6), -// OTGSC_HWASSIT_BDIS_ACONN = TU_BIT(7), - OTGSC_ID = TU_BIT(8), ///< 0 = A device, 1 = B Device - OTGSC_A_VBUS_VALID = TU_BIT(9), - OTGSC_A_SESSION_VALID = TU_BIT(10), - OTGSC_B_SESSION_VALID = TU_BIT(11), - OTGSC_B_SESSION_END = TU_BIT(12), - OTGSC_1MS_TOGGLE = TU_BIT(13), - OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14), -}; - -// USBMode -enum { - USBMODE_CM_DEVICE = 2, - USBMODE_CM_HOST = 3, - - USBMODE_SLOM = TU_BIT(3), - USBMODE_SDIS = TU_BIT(4), - - USBMODE_VBUS_POWER_SELECT = TU_BIT(5), // Need to be enabled for LPC18XX/43XX in host mode -}; - -// Device Registers -typedef struct -{ - //------------- ID + HW Parameter Registers-------------// - __I uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX - - //------------- Capability Registers-------------// - __I uint8_t CAPLENGTH; ///< Capability Registers Length - __I uint8_t TU_RESERVED[1]; - __I uint16_t HCIVERSION; ///< Host Controller Interface Version - - __I uint32_t HCSPARAMS; ///< Host Controller Structural Parameters - __I uint32_t HCCPARAMS; ///< Host Controller Capability Parameters - __I uint32_t TU_RESERVED[5]; - - __I uint16_t DCIVERSION; ///< Device Controller Interface Version - __I uint8_t TU_RESERVED[2]; - - __I uint32_t DCCPARAMS; ///< Device Controller Capability Parameters - __I uint32_t TU_RESERVED[6]; - - //------------- Operational Registers -------------// - __IO uint32_t USBCMD; ///< USB Command Register - __IO uint32_t USBSTS; ///< USB Status Register - __IO uint32_t USBINTR; ///< Interrupt Enable Register - __IO uint32_t FRINDEX; ///< USB Frame Index - __I uint32_t TU_RESERVED; - __IO uint32_t DEVICEADDR; ///< Device Address - __IO uint32_t ENDPTLISTADDR; ///< Endpoint List Address - __I uint32_t TU_RESERVED; - __IO uint32_t BURSTSIZE; ///< Programmable Burst Size - __IO uint32_t TXFILLTUNING; ///< TX FIFO Fill Tuning - uint32_t TU_RESERVED[4]; - __IO uint32_t ENDPTNAK; ///< Endpoint NAK - __IO uint32_t ENDPTNAKEN; ///< Endpoint NAK Enable - __I uint32_t TU_RESERVED; - __IO uint32_t PORTSC1; ///< Port Status & Control - __I uint32_t TU_RESERVED[7]; - __IO uint32_t OTGSC; ///< On-The-Go Status & control - __IO uint32_t USBMODE; ///< USB Device Mode - __IO uint32_t ENDPTSETUPSTAT; ///< Endpoint Setup Status - __IO uint32_t ENDPTPRIME; ///< Endpoint Prime - __IO uint32_t ENDPTFLUSH; ///< Endpoint Flush - __I uint32_t ENDPTSTAT; ///< Endpoint Status - __IO uint32_t ENDPTCOMPLETE; ///< Endpoint Complete - __IO uint32_t ENDPTCTRL[8]; ///< Endpoint Control 0 - 7 -} dcd_registers_t, hcd_registers_t; - -#ifdef __cplusplus - } -#endif - -#endif /* COMMON_TRANSDIMENSION_H_ */ diff --git a/tinyusb/src/portable/nxp/transdimension/dcd_transdimension.c b/tinyusb/src/portable/nxp/transdimension/dcd_transdimension.c deleted file mode 100755 index eeab3f48..00000000 --- a/tinyusb/src/portable/nxp/transdimension/dcd_transdimension.c +++ /dev/null @@ -1,492 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if TUSB_OPT_DEVICE_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX - #include "fsl_device_registers.h" - #define INCLUDE_FSL_DEVICE_REGISTERS -#else - // LPCOpen for 18xx & 43xx - #include "chip.h" -#endif - -#include "common/tusb_common.h" -#include "device/dcd.h" -#include "common_transdimension.h" - -#if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1 - #define CleanInvalidateDCache_by_Addr SCB_CleanInvalidateDCache_by_Addr -#else - #define CleanInvalidateDCache_by_Addr(_addr, _dsize) -#endif - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ - -// ENDPTCTRL -enum { - ENDPTCTRL_STALL = TU_BIT(0), - ENDPTCTRL_TOGGLE_INHIBIT = TU_BIT(5), ///< used for test only - ENDPTCTRL_TOGGLE_RESET = TU_BIT(6), - ENDPTCTRL_ENABLE = TU_BIT(7) -}; - -// USBSTS, USBINTR -enum { - INTR_USB = TU_BIT(0), - INTR_ERROR = TU_BIT(1), - INTR_PORT_CHANGE = TU_BIT(2), - INTR_RESET = TU_BIT(6), - INTR_SOF = TU_BIT(7), - INTR_SUSPEND = TU_BIT(8), - INTR_NAK = TU_BIT(16) -}; - -// Queue Transfer Descriptor -typedef struct -{ - // Word 0: Next QTD Pointer - uint32_t next; ///< Next link pointer This field contains the physical memory address of the next dTD to be processed - - // Word 1: qTQ Token - uint32_t : 3 ; - volatile uint32_t xact_err : 1 ; - uint32_t : 1 ; - volatile uint32_t buffer_err : 1 ; - volatile uint32_t halted : 1 ; - volatile uint32_t active : 1 ; - uint32_t : 2 ; - uint32_t iso_mult_override : 2 ; ///< This field can be used for transmit ISOs to override the MULT field in the dQH. This field must be zero for all packet types that are not transmit-ISO. - uint32_t : 3 ; - uint32_t int_on_complete : 1 ; - volatile uint32_t total_bytes : 15 ; - uint32_t : 0 ; - - // Word 2-6: Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page - uint32_t buffer[5]; ///< buffer1 has frame_n for TODO Isochronous - - //------------- DCD Area -------------// - uint16_t expected_bytes; - uint8_t reserved[2]; -} dcd_qtd_t; - -TU_VERIFY_STATIC( sizeof(dcd_qtd_t) == 32, "size is not correct"); - -// Queue Head -typedef struct -{ - // Word 0: Capabilities and Characteristics - uint32_t : 15 ; ///< Number of packets executed per transaction descriptor 00 - Execute N transactions as demonstrated by the USB variable length protocol where N is computed using Max_packet_length and the Total_bytes field in the dTD. 01 - Execute one transaction 10 - Execute two transactions 11 - Execute three transactions Remark: Non-isochronous endpoints must set MULT = 00. Remark: Isochronous endpoints must set MULT = 01, 10, or 11 as needed. - uint32_t int_on_setup : 1 ; ///< Interrupt on setup This bit is used on control type endpoints to indicate if USBINT is set in response to a setup being received. - uint32_t max_package_size : 11 ; ///< This directly corresponds to the maximum packet size of the associated endpoint (wMaxPacketSize) - uint32_t : 2 ; - uint32_t zero_length_termination : 1 ; ///< This bit is used for non-isochronous endpoints to indicate when a zero-length packet is received to terminate transfers in case the total transfer length is “multiple”. 0 - Enable zero-length packet to terminate transfers equal to a multiple of Max_packet_length (default). 1 - Disable zero-length packet on transfers that are equal in length to a multiple Max_packet_length. - uint32_t iso_mult : 2 ; ///< - uint32_t : 0 ; - - // Word 1: Current qTD Pointer - volatile uint32_t qtd_addr; - - // Word 2-9: Transfer Overlay - volatile dcd_qtd_t qtd_overlay; - - // Word 10-11: Setup request (control OUT only) - volatile tusb_control_request_t setup_request; - - //--------------------------------------------------------------------+ - /// Due to the fact QHD is 64 bytes aligned but occupies only 48 bytes - /// thus there are 16 bytes padding free that we can make use of. - //--------------------------------------------------------------------+ - uint8_t reserved[16]; -} dcd_qhd_t; - -TU_VERIFY_STATIC( sizeof(dcd_qhd_t) == 64, "size is not correct"); - -//--------------------------------------------------------------------+ -// Variables -//--------------------------------------------------------------------+ - -typedef struct -{ - dcd_registers_t* regs; // registers - const IRQn_Type irqnum; // IRQ number - const uint8_t ep_count; // Max bi-directional Endpoints -}dcd_controller_t; - -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX - // Each endpoint with direction (IN/OUT) occupies a queue head - // Therefore QHD_MAX is 2 x max endpoint count - #define QHD_MAX (8*2) - - static const dcd_controller_t _dcd_controller[] = - { - // RT1010 and RT1020 only has 1 USB controller - #if FSL_FEATURE_SOC_USBHS_COUNT == 1 - { .regs = (dcd_registers_t*) USB_BASE , .irqnum = USB_OTG1_IRQn, .ep_count = 8 } - #else - { .regs = (dcd_registers_t*) USB1_BASE, .irqnum = USB_OTG1_IRQn, .ep_count = 8 }, - { .regs = (dcd_registers_t*) USB2_BASE, .irqnum = USB_OTG2_IRQn, .ep_count = 8 } - #endif - }; - -#else - #define QHD_MAX (6*2) - - static const dcd_controller_t _dcd_controller[] = - { - { .regs = (dcd_registers_t*) LPC_USB0_BASE, .irqnum = USB0_IRQn, .ep_count = 6 }, - { .regs = (dcd_registers_t*) LPC_USB1_BASE, .irqnum = USB1_IRQn, .ep_count = 4 } - }; -#endif - -#define QTD_NEXT_INVALID 0x01 - -typedef struct { - // Must be at 2K alignment - dcd_qhd_t qhd[QHD_MAX] TU_ATTR_ALIGNED(64); - dcd_qtd_t qtd[QHD_MAX] TU_ATTR_ALIGNED(32); // for portability, TinyUSB only queue 1 TD for each Qhd -}dcd_data_t; - -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) -static dcd_data_t _dcd_data; - -//--------------------------------------------------------------------+ -// Controller API -//--------------------------------------------------------------------+ - -/// follows LPC43xx User Manual 23.10.3 -static void bus_reset(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - // The reset value for all endpoint types is the control endpoint. If one endpoint - // direction is enabled and the paired endpoint of opposite direction is disabled, then the - // endpoint type of the unused direction must be changed from the control type to any other - // type (e.g. bulk). Leaving an un-configured endpoint control will cause undefined behavior - // for the data PID tracking on the active endpoint. - for( int i=1; i < _dcd_controller[rhport].ep_count; i++) - { - dcd_reg->ENDPTCTRL[i] = (TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18); - } - - //------------- Clear All Registers -------------// - dcd_reg->ENDPTNAK = dcd_reg->ENDPTNAK; - dcd_reg->ENDPTNAKEN = 0; - dcd_reg->USBSTS = dcd_reg->USBSTS; - dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT; - dcd_reg->ENDPTCOMPLETE = dcd_reg->ENDPTCOMPLETE; - - while (dcd_reg->ENDPTPRIME) {} - dcd_reg->ENDPTFLUSH = 0xFFFFFFFF; - while (dcd_reg->ENDPTFLUSH) {} - - // read reset bit in portsc - - //------------- Queue Head & Queue TD -------------// - tu_memclr(&_dcd_data, sizeof(dcd_data_t)); - - //------------- Set up Control Endpoints (0 OUT, 1 IN) -------------// - _dcd_data.qhd[0].zero_length_termination = _dcd_data.qhd[1].zero_length_termination = 1; - _dcd_data.qhd[0].max_package_size = _dcd_data.qhd[1].max_package_size = CFG_TUD_ENDPOINT0_SIZE; - _dcd_data.qhd[0].qtd_overlay.next = _dcd_data.qhd[1].qtd_overlay.next = QTD_NEXT_INVALID; - - _dcd_data.qhd[0].int_on_setup = 1; // OUT only -} - -void dcd_init(uint8_t rhport) -{ - tu_memclr(&_dcd_data, sizeof(dcd_data_t)); - - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - // Reset controller - dcd_reg->USBCMD |= USBCMD_RESET; - while( dcd_reg->USBCMD & USBCMD_RESET ) {} - - // Set mode to device, must be set immediately after reset - dcd_reg->USBMODE = USBMODE_CM_DEVICE; - dcd_reg->OTGSC = OTGSC_VBUS_DISCHARGE | OTGSC_OTG_TERMINATION; - - // TODO Force fullspeed on non-highspeed port - // dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED; - - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); - - dcd_reg->ENDPTLISTADDR = (uint32_t) _dcd_data.qhd; // Endpoint List Address has to be 2K alignment - dcd_reg->USBSTS = dcd_reg->USBSTS; - dcd_reg->USBINTR = INTR_USB | INTR_ERROR | INTR_PORT_CHANGE | INTR_RESET | INTR_SUSPEND /*| INTR_SOF*/; - - dcd_reg->USBCMD &= ~0x00FF0000; // Interrupt Threshold Interval = 0 - dcd_reg->USBCMD |= USBCMD_RUN_STOP; // Connect -} - -void dcd_int_enable(uint8_t rhport) -{ - NVIC_EnableIRQ(_dcd_controller[rhport].irqnum); -} - -void dcd_int_disable(uint8_t rhport) -{ - NVIC_DisableIRQ(_dcd_controller[rhport].irqnum); -} - -void dcd_set_address(uint8_t rhport, uint8_t dev_addr) -{ - // Response with status first before changing device address - dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); - - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->DEVICEADDR = (dev_addr << 25) | TU_BIT(24); -} - -void dcd_remote_wakeup(uint8_t rhport) -{ - (void) rhport; -} - -void dcd_connect(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->USBCMD |= USBCMD_RUN_STOP; -} - -void dcd_disconnect(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->USBCMD &= ~USBCMD_RUN_STOP; -} - -//--------------------------------------------------------------------+ -// HELPER -//--------------------------------------------------------------------+ -// index to bit position in register -static inline uint8_t ep_idx2bit(uint8_t ep_idx) -{ - return ep_idx/2 + ( (ep_idx%2) ? 16 : 0); -} - -static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes) -{ - tu_memclr(p_qtd, sizeof(dcd_qtd_t)); - - p_qtd->next = QTD_NEXT_INVALID; - p_qtd->active = 1; - p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes; - - if (data_ptr != NULL) - { - p_qtd->buffer[0] = (uint32_t) data_ptr; - for(uint8_t i=1; i<5; i++) - { - p_qtd->buffer[i] |= tu_align4k( p_qtd->buffer[i-1] ) + 4096; - } - } -} - -//--------------------------------------------------------------------+ -// DCD Endpoint Port -//--------------------------------------------------------------------+ -void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_STALL << (dir ? 16 : 0); -} - -void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - // data toggle also need to be reset - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_TOGGLE_RESET << ( dir ? 16 : 0 ); - dcd_reg->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_STALL << ( dir ? 16 : 0)); -} - -bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) -{ - // TODO not support ISO yet - TU_VERIFY ( p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); - - uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); - uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); - uint8_t const ep_idx = 2*epnum + dir; - - // Must not exceed max endpoint number - TU_ASSERT( epnum < _dcd_controller[rhport].ep_count ); - - //------------- Prepare Queue Head -------------// - dcd_qhd_t * p_qhd = &_dcd_data.qhd[ep_idx]; - tu_memclr(p_qhd, sizeof(dcd_qhd_t)); - - p_qhd->zero_length_termination = 1; - p_qhd->max_package_size = p_endpoint_desc->wMaxPacketSize.size; - p_qhd->qtd_overlay.next = QTD_NEXT_INVALID; - - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); - - // Enable EP Control - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->ENDPTCTRL[epnum] |= ((p_endpoint_desc->bmAttributes.xfer << 2) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET) << (dir ? 16 : 0); - - return true; -} - -bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - uint8_t const ep_idx = 2*epnum + dir; - - if ( epnum == 0 ) - { - // follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism - // wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out - while(dcd_reg->ENDPTSETUPSTAT & TU_BIT(0)) {} - } - - dcd_qhd_t * p_qhd = &_dcd_data.qhd[ep_idx]; - dcd_qtd_t * p_qtd = &_dcd_data.qtd[ep_idx]; - - // Force the CPU to flush the buffer. We increase the size by 32 because the call aligns the - // address to 32-byte boundaries. - // void* cast to suppress cast-align warning, buffer must be - CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) buffer, 4), total_bytes + 31); - - //------------- Prepare qtd -------------// - qtd_init(p_qtd, buffer, total_bytes); - p_qtd->int_on_complete = true; - p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd - - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); - - // start transfer - dcd_reg->ENDPTPRIME = TU_BIT( ep_idx2bit(ep_idx) ) ; - - return true; -} - -//--------------------------------------------------------------------+ -// ISR -//--------------------------------------------------------------------+ -void dcd_int_handler(uint8_t rhport) -{ - dcd_registers_t* const dcd_reg = _dcd_controller[rhport].regs; - - uint32_t const int_enable = dcd_reg->USBINTR; - uint32_t const int_status = dcd_reg->USBSTS & int_enable; - dcd_reg->USBSTS = int_status; // Acknowledge handled interrupt - - // disabled interrupt sources - if (int_status == 0) return; - - if (int_status & INTR_RESET) - { - bus_reset(rhport); - uint32_t speed = (dcd_reg->PORTSC1 & PORTSC1_PORT_SPEED) >> PORTSC1_PORT_SPEED_POS; - dcd_event_bus_reset(rhport, (tusb_speed_t) speed, true); - } - - if (int_status & INTR_SUSPEND) - { - if (dcd_reg->PORTSC1 & PORTSC1_SUSPEND) - { - // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration. - if ((dcd_reg->DEVICEADDR >> 25) & 0x0f) - { - dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); - } - } - } - - // Make sure we read the latest version of _dcd_data. - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); - - // TODO disconnection does not generate interrupt !!!!!! -// if (int_status & INTR_PORT_CHANGE) -// { -// if ( !(dcd_reg->PORTSC1 & PORTSC1_CURRENT_CONNECT_STATUS) ) -// { -// dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_UNPLUGGED }; -// dcd_event_handler(&event, true); -// } -// } - - if (int_status & INTR_USB) - { - uint32_t const edpt_complete = dcd_reg->ENDPTCOMPLETE; - dcd_reg->ENDPTCOMPLETE = edpt_complete; // acknowledge - - if (dcd_reg->ENDPTSETUPSTAT) - { - //------------- Set up Received -------------// - // 23.10.10.2 Operational model for setup transfers - dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT;// acknowledge - - dcd_event_setup_received(rhport, (uint8_t*) &_dcd_data.qhd[0].setup_request, true); - } - - if ( edpt_complete ) - { - for(uint8_t ep_idx = 0; ep_idx < QHD_MAX; ep_idx++) - { - if ( tu_bit_test(edpt_complete, ep_idx2bit(ep_idx)) ) - { - // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set - dcd_qtd_t * p_qtd = &_dcd_data.qtd[ep_idx]; - - uint8_t result = p_qtd->halted ? XFER_RESULT_STALLED : - ( p_qtd->xact_err ||p_qtd->buffer_err ) ? XFER_RESULT_FAILED : XFER_RESULT_SUCCESS; - - uint8_t const ep_addr = (ep_idx/2) | ( (ep_idx & 0x01) ? TUSB_DIR_IN_MASK : 0 ); - dcd_event_xfer_complete(rhport, ep_addr, p_qtd->expected_bytes - p_qtd->total_bytes, result, true); // only number of bytes in the IOC qtd - } - } - } - } - - if (int_status & INTR_SOF) - { - dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); - } - - if (int_status & INTR_NAK) {} - if (int_status & INTR_ERROR) TU_ASSERT(false, ); -} - -#endif diff --git a/tinyusb/src/portable/nxp/transdimension/hcd_transdimension.c b/tinyusb/src/portable/nxp/transdimension/hcd_transdimension.c deleted file mode 100755 index d216f072..00000000 --- a/tinyusb/src/portable/nxp/transdimension/hcd_transdimension.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -// NXP Trans-Dimension USB IP implement EHCI for host functionality - -#if TUSB_OPT_HOST_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX - #include "fsl_device_registers.h" -#else - // LPCOpen for 18xx & 43xx - #include "chip.h" -#endif - -#include "common/tusb_common.h" -#include "common_transdimension.h" -#include "portable/ehci/ehci_api.h" - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ - -// TODO can be merged with dcd_controller_t -typedef struct -{ - uint32_t regs_base; // registers base - const IRQn_Type irqnum; // IRQ number -}hcd_controller_t; - -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX - static const hcd_controller_t _hcd_controller[] = - { - // RT1010 and RT1020 only has 1 USB controller - #if FSL_FEATURE_SOC_USBHS_COUNT == 1 - { .regs_base = USB_BASE , .irqnum = USB_OTG1_IRQn } - #else - { .regs_base = USB1_BASE, .irqnum = USB_OTG1_IRQn }, - { .regs_base = USB2_BASE, .irqnum = USB_OTG2_IRQn } - #endif - }; - -#else - static const hcd_controller_t _hcd_controller[] = - { - { .regs_base = LPC_USB0_BASE, .irqnum = USB0_IRQn }, - { .regs_base = LPC_USB1_BASE, .irqnum = USB1_IRQn } - }; -#endif - -//--------------------------------------------------------------------+ -// Controller API -//--------------------------------------------------------------------+ - -bool hcd_init(uint8_t rhport) -{ - hcd_registers_t* hcd_reg = (hcd_registers_t*) _hcd_controller[rhport].regs_base; - - // Reset controller - hcd_reg->USBCMD |= USBCMD_RESET; - while( hcd_reg->USBCMD & USBCMD_RESET ) {} - - // Set mode to device, must be set immediately after reset -#if CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX - // LPC18XX/43XX need to set VBUS Power Select to HIGH - // RHPORT1 is fullspeed only (need external PHY for Highspeed) - hcd_reg->USBMODE = USBMODE_CM_HOST | USBMODE_VBUS_POWER_SELECT; - if (rhport == 1) hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED; -#else - hcd_reg->USBMODE = USBMODE_CM_HOST; -#endif - - // FIXME force full speed, still have issue with Highspeed enumeration - hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED; - - return ehci_init(rhport, (uint32_t) &hcd_reg->CAPLENGTH, (uint32_t) &hcd_reg->USBCMD); -} - -void hcd_int_enable(uint8_t rhport) -{ - NVIC_EnableIRQ(_hcd_controller[rhport].irqnum); -} - -void hcd_int_disable(uint8_t rhport) -{ - NVIC_DisableIRQ(_hcd_controller[rhport].irqnum); -} - -#endif |