From 52c5747d2e873d4946d211c548c03498b72c1fb5 Mon Sep 17 00:00:00 2001 From: Joey Castillo Date: Tue, 19 Oct 2021 10:14:24 -0400 Subject: getting the sensor watch dev board working --- boards/OSO-FEAL-A1-00/pins.h | 120 +++++++++++++++++++++++++++ boards/OSO-MISC-21-013/pins.h | 120 --------------------------- make.mk | 4 + watch-library/config/hpl_eic_config.h | 7 +- watch-library/config/hpl_gclk_config.h | 5 ++ watch-library/config/hpl_osc32kctrl_config.h | 4 + watch-library/watch/watch_extint.c | 8 +- 7 files changed, 142 insertions(+), 126 deletions(-) create mode 100644 boards/OSO-FEAL-A1-00/pins.h delete mode 100644 boards/OSO-MISC-21-013/pins.h diff --git a/boards/OSO-FEAL-A1-00/pins.h b/boards/OSO-FEAL-A1-00/pins.h new file mode 100644 index 00000000..47d925cc --- /dev/null +++ b/boards/OSO-FEAL-A1-00/pins.h @@ -0,0 +1,120 @@ +#ifndef PINS_H_INCLUDED +#define PINS_H_INCLUDED + +// Detects if we are on USB power. +#define VBUS_DET GPIO(GPIO_PORTA, 3) + +// Buttons +#define BTN_ALARM GPIO(GPIO_PORTA, 2) +#define WATCH_BTN_ALARM_EIC_CHANNEL 2 +#define BTN_LIGHT GPIO(GPIO_PORTB, 5) +#define WATCH_BTN_LIGHT_EIC_CHANNEL 5 +#define BTN_MODE GPIO(GPIO_PORTA, 7) +#define WATCH_BTN_MODE_EIC_CHANNEL 7 + +// Buzzer +#define BUZZER GPIO(GPIO_PORTA, 27) +#define WATCH_BUZZER_TCC_PINMUX PINMUX_PA27F_TCC0_WO5 +#define WATCH_BUZZER_TCC_CHANNEL 1 + +// LEDs +#define WATCH_INVERT_LED_POLARITY +#define RED GPIO(GPIO_PORTA, 4) +#define WATCH_RED_TCC_CHANNEL 0 +#define WATCH_RED_TCC_PINMUX PINMUX_PA04E_TCC0_WO0 + +#ifdef WATCH_SWAP_LED_PINS + #define GREEN GPIO(GPIO_PORTB, 22) + #define WATCH_GREEN_TCC_CHANNEL 2 + #define WATCH_GREEN_TCC_PINMUX PINMUX_PB22F_TCC0_WO2 +#else + #define GREEN GPIO(GPIO_PORTB, 23) + #define WATCH_GREEN_TCC_CHANNEL 3 + #define WATCH_GREEN_TCC_PINMUX PINMUX_PB23F_TCC0_WO3 +#endif + + +// Segment LCD +#define SLCD0 GPIO(GPIO_PORTB, 6) +#define SLCD1 GPIO(GPIO_PORTB, 7) +#define SLCD2 GPIO(GPIO_PORTB, 8) +#define SLCD3 GPIO(GPIO_PORTB, 9) +#define SLCD4 GPIO(GPIO_PORTA, 5) +#define SLCD5 GPIO(GPIO_PORTA, 6) +#define SLCD6 GPIO(GPIO_PORTA, 8) +#define SLCD7 GPIO(GPIO_PORTA, 9) +#define SLCD8 GPIO(GPIO_PORTA, 10) +#define SLCD9 GPIO(GPIO_PORTA, 11) +#define SLCD10 GPIO(GPIO_PORTB, 11) +#define SLCD11 GPIO(GPIO_PORTB, 12) +#define SLCD12 GPIO(GPIO_PORTB, 13) +#define SLCD13 GPIO(GPIO_PORTB, 14) +#define SLCD14 GPIO(GPIO_PORTB, 15) +#define SLCD15 GPIO(GPIO_PORTA, 14) +#define SLCD16 GPIO(GPIO_PORTA, 15) +#define SLCD17 GPIO(GPIO_PORTA, 16) +#define SLCD18 GPIO(GPIO_PORTA, 17) +#define SLCD19 GPIO(GPIO_PORTA, 18) +#define SLCD20 GPIO(GPIO_PORTA, 19) +#define SLCD21 GPIO(GPIO_PORTB, 16) +#define SLCD22 GPIO(GPIO_PORTB, 17) +#define SLCD23 GPIO(GPIO_PORTA, 20) +#define SLCD24 GPIO(GPIO_PORTA, 21) +#define SLCD25 GPIO(GPIO_PORTA, 22) +#define SLCD26 GPIO(GPIO_PORTA, 23) +// This board uses a slightly different pin mapping from the standard watch, and it's not enough to +// just declare the pins. We also have to set the LCD Pin Enable register with the SLCD pins we're +// using. These numbers are not port/pin numbers, but the "SLCD/LP[x]" numbers in the pinmux table. +// If not defined in pins.h, the LCD drover will fall back to the pin mapping in hpl_slcd_config.h. +// LPENL is for pins SLCD/LP[0..31]. +#define CONF_SLCD_LPENL (\ + (uint32_t)1 << 0 | \ + (uint32_t)1 << 1 | \ + (uint32_t)1 << 2 | \ + (uint32_t)1 << 3 | \ + (uint32_t)1 << 5 | \ + (uint32_t)1 << 6 | \ + (uint32_t)1 << 11 | \ + (uint32_t)1 << 12 | \ + (uint32_t)1 << 13 | \ + (uint32_t)1 << 14 | \ + (uint32_t)1 << 21 | \ + (uint32_t)1 << 22 | \ + (uint32_t)1 << 23 | \ + (uint32_t)1 << 24 | \ + (uint32_t)1 << 25 | \ + (uint32_t)1 << 30 | \ + (uint32_t)1 << 31 | 0) +// LPENH is for pins SLCD/LP[32..51], where bit 0 represents pin 32. +#define CONF_SLCD_LPENH (\ + (uint32_t)1 << (32 - 32) | \ + (uint32_t)1 << (33 - 32) | \ + (uint32_t)1 << (34 - 32) | \ + (uint32_t)1 << (35 - 32) | \ + (uint32_t)1 << (42 - 32) | \ + (uint32_t)1 << (43 - 32) | \ + (uint32_t)1 << (48 - 32) | \ + (uint32_t)1 << (49 - 32) | \ + (uint32_t)1 << (50 - 32) | \ + (uint32_t)1 << (51 - 32) | 0) + + +// 9-pin connector +#define A0 GPIO(GPIO_PORTB, 4) +#define WATCH_A0_EIC_CHANNEL 4 +#define A1 GPIO(GPIO_PORTB, 1) +#define WATCH_A1_EIC_CHANNEL 1 +#define A2 GPIO(GPIO_PORTB, 2) +#define WATCH_A2_EIC_CHANNEL 2 +#define A3 GPIO(GPIO_PORTB, 3) +#define WATCH_A3_EIC_CHANNEL 3 +#define A4 GPIO(GPIO_PORTB, 0) +#define WATCH_A4_EIC_CHANNEL 0 +#define SDA GPIO(GPIO_PORTB, 30) +#define SCL GPIO(GPIO_PORTB, 31) + +// aliases for as A3/A4; these were mentioned as D0/D1 in early documentation. +#define D0 GPIO(GPIO_PORTB, 3) +#define D1 GPIO(GPIO_PORTB, 0) + +#endif // PINS_H_INCLUDED diff --git a/boards/OSO-MISC-21-013/pins.h b/boards/OSO-MISC-21-013/pins.h deleted file mode 100644 index a4e936a4..00000000 --- a/boards/OSO-MISC-21-013/pins.h +++ /dev/null @@ -1,120 +0,0 @@ -#ifndef PINS_H_INCLUDED -#define PINS_H_INCLUDED - -// Detects if we are on USB power. -#define VBUS_DET GPIO(GPIO_PORTA, 3) - -// Buttons -#define BTN_ALARM GPIO(GPIO_PORTA, 2) -#define WATCH_BTN_ALARM_EIC_CHANNEL 2 -#define BTN_LIGHT GPIO(GPIO_PORTB, 5) -#define WATCH_BTN_LIGHT_EIC_CHANNEL 5 -#define BTN_MODE GPIO(GPIO_PORTA, 7) -#define WATCH_BTN_MODE_EIC_CHANNEL 7 - -// Buzzer -#define BUZZER GPIO(GPIO_PORTA, 27) -#define WATCH_BUZZER_TCC_PINMUX PINMUX_PA27F_TCC0_WO5 -#define WATCH_BUZZER_TCC_CHANNEL 1 - -// LEDs -#define WATCH_INVERT_LED_POLARITY -#define RED GPIO(GPIO_PORTB, 22) -#define WATCH_RED_TCC_PINMUX PINMUX_PB22F_TCC0_WO2 -#define WATCH_RED_TCC_CHANNEL 2 - -#ifdef WATCH_SWAP_LED_PINS - #define GREEN GPIO(GPIO_PORTA, 4) - #define WATCH_GREEN_TCC_CHANNEL 0 - #define WATCH_GREEN_TCC_PINMUX PINMUX_PA04E_TCC0_WO0 -#else - #define GREEN GPIO(GPIO_PORTB, 23) - #define WATCH_GREEN_TCC_CHANNEL 3 - #define WATCH_GREEN_TCC_PINMUX PINMUX_PB23F_TCC0_WO3 -#endif - - -// Segment LCD -#define SLCD0 GPIO(GPIO_PORTB, 6) -#define SLCD1 GPIO(GPIO_PORTB, 7) -#define SLCD2 GPIO(GPIO_PORTB, 8) -#define SLCD3 GPIO(GPIO_PORTB, 9) -#define SLCD4 GPIO(GPIO_PORTA, 5) -#define SLCD5 GPIO(GPIO_PORTA, 6) -#define SLCD6 GPIO(GPIO_PORTA, 8) -#define SLCD7 GPIO(GPIO_PORTA, 9) -#define SLCD8 GPIO(GPIO_PORTA, 10) -#define SLCD9 GPIO(GPIO_PORTA, 11) -#define SLCD10 GPIO(GPIO_PORTB, 11) -#define SLCD11 GPIO(GPIO_PORTB, 12) -#define SLCD12 GPIO(GPIO_PORTB, 13) -#define SLCD13 GPIO(GPIO_PORTB, 14) -#define SLCD14 GPIO(GPIO_PORTB, 15) -#define SLCD15 GPIO(GPIO_PORTA, 14) -#define SLCD16 GPIO(GPIO_PORTA, 15) -#define SLCD17 GPIO(GPIO_PORTA, 16) -#define SLCD18 GPIO(GPIO_PORTA, 17) -#define SLCD19 GPIO(GPIO_PORTA, 18) -#define SLCD20 GPIO(GPIO_PORTA, 19) -#define SLCD21 GPIO(GPIO_PORTB, 16) -#define SLCD22 GPIO(GPIO_PORTB, 17) -#define SLCD23 GPIO(GPIO_PORTA, 20) -#define SLCD24 GPIO(GPIO_PORTA, 21) -#define SLCD25 GPIO(GPIO_PORTA, 22) -#define SLCD26 GPIO(GPIO_PORTA, 23) -// This board uses a slightly different pin mapping from the standard watch, and it's not enough to -// just declare the pins. We also have to set the LCD Pin Enable register with the SLCD pins we're -// using. These numbers are not port/pin numbers, but the "SLCD/LP[x]" numbers in the pinmux table. -// If not defined in pins.h, the LCD drover will fall back to the pin mapping in hpl_slcd_config.h. -// LPENL is for pins SLCD/LP[0..31]. -#define CONF_SLCD_LPENL (\ - (uint32_t)1 << 0 | \ - (uint32_t)1 << 1 | \ - (uint32_t)1 << 2 | \ - (uint32_t)1 << 3 | \ - (uint32_t)1 << 5 | \ - (uint32_t)1 << 6 | \ - (uint32_t)1 << 11 | \ - (uint32_t)1 << 12 | \ - (uint32_t)1 << 13 | \ - (uint32_t)1 << 14 | \ - (uint32_t)1 << 21 | \ - (uint32_t)1 << 22 | \ - (uint32_t)1 << 23 | \ - (uint32_t)1 << 24 | \ - (uint32_t)1 << 25 | \ - (uint32_t)1 << 30 | \ - (uint32_t)1 << 31 | 0) -// LPENH is for pins SLCD/LP[32..51], where bit 0 represents pin 32. -#define CONF_SLCD_LPENH (\ - (uint32_t)1 << (32 - 32) | \ - (uint32_t)1 << (33 - 32) | \ - (uint32_t)1 << (34 - 32) | \ - (uint32_t)1 << (35 - 32) | \ - (uint32_t)1 << (42 - 32) | \ - (uint32_t)1 << (43 - 32) | \ - (uint32_t)1 << (48 - 32) | \ - (uint32_t)1 << (49 - 32) | \ - (uint32_t)1 << (50 - 32) | \ - (uint32_t)1 << (51 - 32) | 0) - - -// 9-pin connector -#define A0 GPIO(GPIO_PORTB, 4) -#define WATCH_A0_EIC_CHANNEL 4 -#define A1 GPIO(GPIO_PORTB, 1) -#define WATCH_A1_EIC_CHANNEL 1 -#define A2 GPIO(GPIO_PORTB, 2) -#define WATCH_A2_EIC_CHANNEL 2 -#define A3 GPIO(GPIO_PORTB, 3) -#define WATCH_A3_EIC_CHANNEL 3 -#define A4 GPIO(GPIO_PORTB, 0) -#define WATCH_A4_EIC_CHANNEL 0 -#define SDA GPIO(GPIO_PORTB, 30) -#define SCL GPIO(GPIO_PORTB, 31) - -// aliases for as A3/A4; these were mentioned as D0/D1 in early documentation. -#define D0 GPIO(GPIO_PORTB, 3) -#define D1 GPIO(GPIO_PORTB, 0) - -#endif // PINS_H_INCLUDED diff --git a/make.mk b/make.mk index 299d9d31..1c2a72f4 100644 --- a/make.mk +++ b/make.mk @@ -116,3 +116,7 @@ DEFINES += \ ifeq ($(LED), BLUE) CFLAGS += -DWATCH_SWAP_LED_PINS endif + +ifeq ($(BOARD), OSO-FEAL-A1-00) +CFLAGS += -DCRYSTALLESS +endif diff --git a/watch-library/config/hpl_eic_config.h b/watch-library/config/hpl_eic_config.h index 46aba150..53fee6cf 100644 --- a/watch-library/config/hpl_eic_config.h +++ b/watch-library/config/hpl_eic_config.h @@ -271,7 +271,7 @@ // Indicates whether the external interrupt 5 filter is enabled or not // eic_arch_filten5 #ifndef CONF_EIC_FILTEN5 -#define CONF_EIC_FILTEN5 0 +#define CONF_EIC_FILTEN5 1 #endif // External Interrupt 5 Event Output Enable @@ -723,7 +723,12 @@ // +// my god this is a hack. need to refactor this out of ASF and into our driver. - joey 10/19 +#ifdef CRYSTALLESS +#define CONFIG_EIC_EXTINT_MAP {2, PIN_PA02}, {5, PIN_PB05}, {7, PIN_PA07}, +#else #define CONFIG_EIC_EXTINT_MAP {2, PIN_PA02}, {6, PIN_PA22}, {7, PIN_PA23}, +#endif // <<< end of configuration section >>> diff --git a/watch-library/config/hpl_gclk_config.h b/watch-library/config/hpl_gclk_config.h index c56e2816..ee7aace3 100644 --- a/watch-library/config/hpl_gclk_config.h +++ b/watch-library/config/hpl_gclk_config.h @@ -248,9 +248,14 @@ // This defines the clock source for generic clock generator 3 // gclk_gen_3_oscillator #ifndef CONF_GCLK_GEN_3_SOURCE +#ifdef CRYSTALLESS +#define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_OSCULP32K +#else #define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_XOSC32K #endif +#endif + // Run in Standby // Indicates whether Run in Standby is enabled or not // gclk_arch_gen_3_runstdby diff --git a/watch-library/config/hpl_osc32kctrl_config.h b/watch-library/config/hpl_osc32kctrl_config.h index 94b46617..540f1c60 100644 --- a/watch-library/config/hpl_osc32kctrl_config.h +++ b/watch-library/config/hpl_osc32kctrl_config.h @@ -17,8 +17,12 @@ // This defines the clock source for RTC // rtc_source_oscillator #ifndef CONF_RTCCTRL_SRC +#ifdef CRYSTALLESS +#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_OSCULP32K +#else #define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_XOSC32K #endif +#endif // Use 1 kHz output // rtc_1khz_selection diff --git a/watch-library/watch/watch_extint.c b/watch-library/watch/watch_extint.c index dcaa0d80..d6ad5b60 100644 --- a/watch-library/watch/watch_extint.c +++ b/watch-library/watch/watch_extint.c @@ -65,18 +65,14 @@ void watch_register_interrupt_callback(const uint8_t pin, ext_irq_cb_t callback, sense_pos = 4 * (WATCH_A4_EIC_CHANNEL % 8); break; case BTN_ALARM: - // for the buttons, we need an internal pull-down. - gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN); config_index = (WATCH_BTN_ALARM_EIC_CHANNEL > 7) ? 1 : 0; sense_pos = 4 * (WATCH_BTN_ALARM_EIC_CHANNEL % 8); break; case BTN_LIGHT: - gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN); config_index = (WATCH_BTN_LIGHT_EIC_CHANNEL > 7) ? 1 : 0; sense_pos = 4 * (WATCH_BTN_LIGHT_EIC_CHANNEL % 8); break; case BTN_MODE: - gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN); config_index = (WATCH_BTN_MODE_EIC_CHANNEL > 7) ? 1 : 0; sense_pos = 4 * (WATCH_BTN_MODE_EIC_CHANNEL % 8); break; @@ -85,7 +81,6 @@ void watch_register_interrupt_callback(const uint8_t pin, ext_irq_cb_t callback, } gpio_set_pin_direction(pin, GPIO_DIRECTION_IN); - gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_A); // EIC configuration register is enable-protected, so we have to disable it first... if (hri_eic_get_CTRLA_reg(EIC, EIC_CTRLA_ENABLE)) { @@ -98,6 +93,9 @@ void watch_register_interrupt_callback(const uint8_t pin, ext_irq_cb_t callback, config &= ~(7 << sense_pos); config |= trigger << (sense_pos); hri_eic_write_CONFIG_reg(EIC, config_index, config); + // ...set the pin mode... + gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_A); + if (pin == BTN_ALARM || pin == BTN_LIGHT || pin == BTN_MODE) gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN); // ...and re-enable the EIC hri_eic_set_CTRLA_ENABLE_bit(EIC); -- cgit v1.2.3