From ed526355f69a931d51a6ebff1b45c70988e7b255 Mon Sep 17 00:00:00 2001 From: Joey Castillo Date: Tue, 10 May 2022 09:50:44 -0400 Subject: fix spaces / tabs --- watch-library/hardware/watch/watch_storage.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/watch-library/hardware/watch/watch_storage.c b/watch-library/hardware/watch/watch_storage.c index 0cd04483..6c87be53 100644 --- a/watch-library/hardware/watch/watch_storage.c +++ b/watch-library/hardware/watch/watch_storage.c @@ -53,21 +53,21 @@ bool watch_storage_write(uint32_t row, uint32_t offset, const uint8_t *buffer, u watch_storage_sync(); - uint32_t nvm_address = address / 2; - uint16_t i, data; + uint32_t nvm_address = address / 2; + uint16_t i, data; - hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_PBC | NVMCTRL_CTRLA_CMDEX_KEY); + hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_PBC | NVMCTRL_CTRLA_CMDEX_KEY); watch_storage_sync(); - for (i = 0; i < size; i += 2) { - data = buffer[i]; - if (i < NVMCTRL_PAGE_SIZE - 1) { - data |= (buffer[i + 1] << 8); - } - NVM_MEMORY[nvm_address++] = data; - } - hri_nvmctrl_write_ADDR_reg(NVMCTRL, address / 2); - hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_RWWEEWP | NVMCTRL_CTRLA_CMDEX_KEY); + for (i = 0; i < size; i += 2) { + data = buffer[i]; + if (i < NVMCTRL_PAGE_SIZE - 1) { + data |= (buffer[i + 1] << 8); + } + NVM_MEMORY[nvm_address++] = data; + } + hri_nvmctrl_write_ADDR_reg(NVMCTRL, address / 2); + hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_RWWEEWP | NVMCTRL_CTRLA_CMDEX_KEY); return true; } -- cgit v1.2.3