From a11275d84c4ca04645eec72b1d1612d0781e0486 Mon Sep 17 00:00:00 2001 From: Joey Castillo Date: Wed, 26 Jan 2022 21:32:55 -0500 Subject: watch library: implement SPI --- watch-library/hardware/hw/driver_init.c | 64 ++++++++++++++++++++++++++++++++ watch-library/hardware/hw/driver_init.h | 6 +++ watch-library/hardware/watch/watch_spi.c | 46 +++++++++++++++++++++++ 3 files changed, 116 insertions(+) create mode 100644 watch-library/hardware/watch/watch_spi.c (limited to 'watch-library/hardware') diff --git a/watch-library/hardware/hw/driver_init.c b/watch-library/hardware/hw/driver_init.c index 09723bec..3e097a8e 100644 --- a/watch-library/hardware/hw/driver_init.c +++ b/watch-library/hardware/hw/driver_init.c @@ -15,6 +15,8 @@ struct slcd_sync_descriptor SEGMENT_LCD_0; struct i2c_m_sync_desc I2C_0; +struct spi_m_sync_descriptor SPI_0; + void I2C_0_PORT_init(void) { gpio_set_pin_pull_mode(SDA, @@ -50,6 +52,68 @@ void I2C_0_init(void) { I2C_0_PORT_init(); } +void SPI_0_PORT_init(void) { + + gpio_set_pin_level(A2, + // Initial level + // pad_initial_level + // Low + // High + false); + + // Set pin direction to output + gpio_set_pin_direction(A2, GPIO_DIRECTION_OUT); + + gpio_set_pin_function(A2, PINMUX_PB02C_SERCOM3_PAD0); + + // Set pin direction to input + gpio_set_pin_direction(A4, GPIO_DIRECTION_IN); + + gpio_set_pin_pull_mode(A4, + // Pull configuration + // pad_pull_config + // Off + // Pull-up + // Pull-down + GPIO_PULL_OFF); + + gpio_set_pin_function(A4, PINMUX_PB00C_SERCOM3_PAD2); + + gpio_set_pin_level(A1, + // Initial level + // pad_initial_level + // Low + // High + false); + + // Set pin direction to output + gpio_set_pin_direction(A1, GPIO_DIRECTION_OUT); + + gpio_set_pin_function(A1, PINMUX_PB01C_SERCOM3_PAD3); + + gpio_set_pin_level(A3, + // Initial level + // pad_initial_level + // Low + // High + true); + + // Set pin direction to output + gpio_set_pin_direction(A3, GPIO_DIRECTION_OUT); +} + +void SPI_0_CLOCK_init(void) { + hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, CONF_GCLK_SERCOM3_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, CONF_GCLK_SERCOM3_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + hri_mclk_set_APBCMASK_SERCOM3_bit(MCLK); +} + +void SPI_0_init(void) { + SPI_0_CLOCK_init(); + spi_m_sync_init(&SPI_0, SERCOM3); + SPI_0_PORT_init(); +} + void delay_driver_init(void) { delay_init(SysTick); } diff --git a/watch-library/hardware/hw/driver_init.h b/watch-library/hardware/hw/driver_init.h index 6b5abaf3..90cb8867 100644 --- a/watch-library/hardware/hw/driver_init.h +++ b/watch-library/hardware/hw/driver_init.h @@ -43,12 +43,18 @@ extern struct i2c_m_sync_desc I2C_0; extern struct usart_sync_descriptor USART_0; +extern struct spi_m_sync_descriptor SPI_0; + extern struct slcd_sync_descriptor SEGMENT_LCD_0; void I2C_0_CLOCK_init(void); void I2C_0_init(void); void I2C_0_PORT_init(void); +void SPI_0_PORT_init(void); +void SPI_0_CLOCK_init(void); +void SPI_0_init(void); + void delay_driver_init(void); void EXTERNAL_IRQ_0_init(void); diff --git a/watch-library/hardware/watch/watch_spi.c b/watch-library/hardware/watch/watch_spi.c new file mode 100644 index 00000000..df68bbaa --- /dev/null +++ b/watch-library/hardware/watch/watch_spi.c @@ -0,0 +1,46 @@ +/* + * MIT License + * + * Copyright (c) 2022 Joey Castillo + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include "watch_spi.h" + +struct io_descriptor *spi_io; + +void watch_enable_spi(void) { + SPI_0_init(); + spi_m_sync_get_io_descriptor(&SPI_0, &spi_io); + spi_m_sync_enable(&SPI_0); +} + +void watch_disable_spi(void) { + spi_m_sync_disable(&SPI_0); + spi_io = NULL; +} + +void watch_spi_send(uint8_t *buf, uint16_t length) { + io_write(spi_io, buf, length); +} + +void watch_spi_receive(uint8_t *buf, uint16_t length) { + io_read(spi_io, buf, length); +} -- cgit v1.2.3