From 34945d78e933fc62bedcc975e88be02a0b7fcc2e Mon Sep 17 00:00:00 2001 From: Joey Castillo Date: Mon, 2 Aug 2021 13:48:35 -0400 Subject: major project reorg, move library one level up --- watch-library/hw/atmel_start_pins.h | 67 ++++++++++++ watch-library/hw/driver_init.c | 202 ++++++++++++++++++++++++++++++++++++ watch-library/hw/driver_init.h | 80 ++++++++++++++ 3 files changed, 349 insertions(+) create mode 100644 watch-library/hw/atmel_start_pins.h create mode 100644 watch-library/hw/driver_init.c create mode 100644 watch-library/hw/driver_init.h (limited to 'watch-library/hw') diff --git a/watch-library/hw/atmel_start_pins.h b/watch-library/hw/atmel_start_pins.h new file mode 100644 index 00000000..36fe6bf4 --- /dev/null +++ b/watch-library/hw/atmel_start_pins.h @@ -0,0 +1,67 @@ +/* + * Code generated from Atmel Start. + * + * This file will be overwritten when reconfiguring your Atmel Start project. + * Please copy examples or other code you want to keep to a separate file + * to avoid losing it when reconfiguring. + */ +#ifndef ATMEL_START_PINS_H_INCLUDED +#define ATMEL_START_PINS_H_INCLUDED + +#include + +// SAML22 has 9 pin functions + +#define GPIO_PIN_FUNCTION_A 0 +#define GPIO_PIN_FUNCTION_B 1 +#define GPIO_PIN_FUNCTION_C 2 +#define GPIO_PIN_FUNCTION_D 3 +#define GPIO_PIN_FUNCTION_E 4 +#define GPIO_PIN_FUNCTION_F 5 +#define GPIO_PIN_FUNCTION_G 6 +#define GPIO_PIN_FUNCTION_H 7 +#define GPIO_PIN_FUNCTION_I 8 + +#define VBUS_DET GPIO(GPIO_PORTA, 2) +#define SEG1 GPIO(GPIO_PORTA, 4) +#define SEG2 GPIO(GPIO_PORTA, 5) +#define SEG3 GPIO(GPIO_PORTA, 6) +#define SEG4 GPIO(GPIO_PORTA, 7) +#define SEG5 GPIO(GPIO_PORTA, 8) +#define SEG6 GPIO(GPIO_PORTA, 9) +#define SEG7 GPIO(GPIO_PORTA, 10) +#define SEG8 GPIO(GPIO_PORTA, 11) +#define SEG14 GPIO(GPIO_PORTA, 12) +#define SEG15 GPIO(GPIO_PORTA, 13) +#define SEG16 GPIO(GPIO_PORTA, 14) +#define SEG17 GPIO(GPIO_PORTA, 15) +#define SEG18 GPIO(GPIO_PORTA, 16) +#define SEG19 GPIO(GPIO_PORTA, 17) +#define SEG20 GPIO(GPIO_PORTA, 18) +#define SEG21 GPIO(GPIO_PORTA, 19) +#define RED GPIO(GPIO_PORTA, 20) +#define GREEN GPIO(GPIO_PORTA, 21) +#define BTN_LIGHT GPIO(GPIO_PORTA, 22) +#define BTN_MODE GPIO(GPIO_PORTA, 23) +#define BUZZER GPIO(GPIO_PORTA, 27) +#define D1 GPIO(GPIO_PORTB, 0) +#define A1 GPIO(GPIO_PORTB, 1) +#define A2 GPIO(GPIO_PORTB, 2) +#define D0 GPIO(GPIO_PORTB, 3) +#define A0 GPIO(GPIO_PORTB, 4) +#define BTN_ALARM GPIO(GPIO_PORTB, 5) +#define COM0 GPIO(GPIO_PORTB, 6) +#define COM1 GPIO(GPIO_PORTB, 7) +#define COM2 GPIO(GPIO_PORTB, 8) +#define SEG0 GPIO(GPIO_PORTB, 9) +#define SEG9 GPIO(GPIO_PORTB, 11) +#define SEG10 GPIO(GPIO_PORTB, 12) +#define SEG11 GPIO(GPIO_PORTB, 13) +#define SEG12 GPIO(GPIO_PORTB, 14) +#define SEG13 GPIO(GPIO_PORTB, 15) +#define SEG22 GPIO(GPIO_PORTB, 16) +#define SEG23 GPIO(GPIO_PORTB, 17) +#define SDA GPIO(GPIO_PORTB, 30) +#define SCL GPIO(GPIO_PORTB, 31) + +#endif // ATMEL_START_PINS_H_INCLUDED diff --git a/watch-library/hw/driver_init.c b/watch-library/hw/driver_init.c new file mode 100644 index 00000000..4f1f8eee --- /dev/null +++ b/watch-library/hw/driver_init.c @@ -0,0 +1,202 @@ +/* + * Code generated from Atmel Start. + * + * This file will be overwritten when reconfiguring your Atmel Start project. + * Please copy examples or other code you want to keep to a separate file + * to avoid losing it when reconfiguring. + */ + +#include "driver_init.h" +#include +#include +#include + +#include + +struct slcd_sync_descriptor SEGMENT_LCD_0; + +struct adc_sync_descriptor ADC_0; + +struct calendar_descriptor CALENDAR_0; + +struct i2c_m_sync_desc I2C_0; + +struct pwm_descriptor PWM_0; + +struct pwm_descriptor PWM_1; + +void ADC_0_CLOCK_init(void) { + hri_mclk_set_APBCMASK_ADC_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, ADC_GCLK_ID, CONF_GCLK_ADC_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); +} + +void ADC_0_init(void) { + ADC_0_CLOCK_init(); + adc_sync_init(&ADC_0, ADC, (void *)NULL); +} + +void EXTERNAL_IRQ_0_init(void) { + hri_gclk_write_PCHCTRL_reg(GCLK, EIC_GCLK_ID, CONF_GCLK_EIC_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + hri_mclk_set_APBAMASK_EIC_bit(MCLK); + + // Set pin direction to input + gpio_set_pin_direction(BTN_ALARM, GPIO_DIRECTION_IN); + + gpio_set_pin_pull_mode(BTN_ALARM, + // Pull configuration + // pad_pull_config + // Off + // Pull-up + // Pull-down + GPIO_PULL_DOWN); + + gpio_set_pin_function(BTN_ALARM, PINMUX_PB05A_EIC_EXTINT5); + + // Set pin direction to input + gpio_set_pin_direction(BTN_LIGHT, GPIO_DIRECTION_IN); + + gpio_set_pin_pull_mode(BTN_LIGHT, + // Pull configuration + // pad_pull_config + // Off + // Pull-up + // Pull-down + GPIO_PULL_DOWN); + + gpio_set_pin_function(BTN_LIGHT, PINMUX_PA22A_EIC_EXTINT6); + + // Set pin direction to input + gpio_set_pin_direction(BTN_MODE, GPIO_DIRECTION_IN); + + gpio_set_pin_pull_mode(BTN_MODE, + // Pull configuration + // pad_pull_config + // Off + // Pull-up + // Pull-down + GPIO_PULL_DOWN); + + gpio_set_pin_function(BTN_MODE, PINMUX_PA23A_EIC_EXTINT7); + + ext_irq_init(); +} + +void CALENDAR_0_CLOCK_init(void) { + hri_mclk_set_APBAMASK_RTC_bit(MCLK); +} + +void CALENDAR_0_init(void) { + CALENDAR_0_CLOCK_init(); + calendar_init(&CALENDAR_0, RTC); +} + +void I2C_0_PORT_init(void) { + + gpio_set_pin_pull_mode(SDA, + // Pull configuration + // pad_pull_config + // Off + // Pull-up + // Pull-down + GPIO_PULL_OFF); + + gpio_set_pin_function(SDA, PINMUX_PB30C_SERCOM1_PAD0); + + gpio_set_pin_pull_mode(SCL, + // Pull configuration + // pad_pull_config + // Off + // Pull-up + // Pull-down + GPIO_PULL_OFF); + + gpio_set_pin_function(SCL, PINMUX_PB31C_SERCOM1_PAD1); +} + +void I2C_0_CLOCK_init(void) { + hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_CORE, CONF_GCLK_SERCOM1_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_SLOW, CONF_GCLK_SERCOM1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + hri_mclk_set_APBCMASK_SERCOM1_bit(MCLK); +} + +void I2C_0_init(void) { + I2C_0_CLOCK_init(); + i2c_m_sync_init(&I2C_0, SERCOM1); + I2C_0_PORT_init(); +} + +void delay_driver_init(void) { + delay_init(SysTick); +} + +void PWM_0_PORT_init(void) { + gpio_set_pin_function(RED, PINMUX_PA20E_TC3_WO0); + gpio_set_pin_function(GREEN, PINMUX_PA21E_TC3_WO1); +} + +void PWM_0_CLOCK_init(void) { + hri_mclk_set_APBCMASK_TC3_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, TC3_GCLK_ID, CONF_GCLK_TC3_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); +} + +void PWM_0_init(void) { + PWM_0_CLOCK_init(); + PWM_0_PORT_init(); + pwm_init(&PWM_0, TC3, _tc_get_pwm()); +} + +void PWM_1_PORT_init(void) { + gpio_set_pin_function(BUZZER, PINMUX_PA27F_TCC0_WO5); +} + +void PWM_1_CLOCK_init(void) { + hri_mclk_set_APBCMASK_TCC0_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, CONF_GCLK_TCC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); +} + +void PWM_1_init(void) { + PWM_1_CLOCK_init(); + PWM_1_PORT_init(); + pwm_init(&PWM_1, TCC0, _tcc_get_pwm()); +} + +void SEGMENT_LCD_0_PORT_init(void) { + gpio_set_pin_function(COM0, PINMUX_PB06B_SLCD_LP0); + gpio_set_pin_function(COM1, PINMUX_PB07B_SLCD_LP1); + gpio_set_pin_function(COM2, PINMUX_PB08B_SLCD_LP2); + gpio_set_pin_function(SEG0, PINMUX_PB09B_SLCD_LP3); + gpio_set_pin_function(SEG1, PINMUX_PA04B_SLCD_LP4); + gpio_set_pin_function(SEG2, PINMUX_PA05B_SLCD_LP5); + gpio_set_pin_function(SEG3, PINMUX_PA06B_SLCD_LP6); + gpio_set_pin_function(SEG4, PINMUX_PA07B_SLCD_LP7); + gpio_set_pin_function(SEG5, PINMUX_PA08B_SLCD_LP11); + gpio_set_pin_function(SEG6, PINMUX_PA09B_SLCD_LP12); + gpio_set_pin_function(SEG7, PINMUX_PA10B_SLCD_LP13); + gpio_set_pin_function(SEG8, PINMUX_PA11B_SLCD_LP14); + gpio_set_pin_function(SEG9, PINMUX_PB11B_SLCD_LP21); + gpio_set_pin_function(SEG10, PINMUX_PB12B_SLCD_LP22); + gpio_set_pin_function(SEG11, PINMUX_PB13B_SLCD_LP23); + gpio_set_pin_function(SEG12, PINMUX_PB14B_SLCD_LP24); + gpio_set_pin_function(SEG13, PINMUX_PB15B_SLCD_LP25); + gpio_set_pin_function(SEG14, PINMUX_PA12B_SLCD_LP28); + gpio_set_pin_function(SEG15, PINMUX_PA13B_SLCD_LP29); + gpio_set_pin_function(SEG16, PINMUX_PA14B_SLCD_LP30); + gpio_set_pin_function(SEG17, PINMUX_PA15B_SLCD_LP31); + gpio_set_pin_function(SEG18, PINMUX_PA16B_SLCD_LP32); + gpio_set_pin_function(SEG19, PINMUX_PA17B_SLCD_LP33); + gpio_set_pin_function(SEG20, PINMUX_PA18B_SLCD_LP34); + gpio_set_pin_function(SEG21, PINMUX_PA19B_SLCD_LP35); + gpio_set_pin_function(SEG22, PINMUX_PB16B_SLCD_LP42); + gpio_set_pin_function(SEG23, PINMUX_PB17B_SLCD_LP43); +} + +/** + * \brief SLCD initialization function + * + * Enables SLCD peripheral, clocks and initializes SLCD driver + */ +void SEGMENT_LCD_0_init(void) { + hri_mclk_set_APBCMASK_SLCD_bit(SLCD); + slcd_sync_init(&SEGMENT_LCD_0, SLCD); + SEGMENT_LCD_0_PORT_init(); +} diff --git a/watch-library/hw/driver_init.h b/watch-library/hw/driver_init.h new file mode 100644 index 00000000..1e53f9a0 --- /dev/null +++ b/watch-library/hw/driver_init.h @@ -0,0 +1,80 @@ +/* + * Code generated from Atmel Start. + * + * This file will be overwritten when reconfiguring your Atmel Start project. + * Please copy examples or other code you want to keep to a separate file + * to avoid losing it when reconfiguring. + */ +#ifndef DRIVER_INIT_INCLUDED +#define DRIVER_INIT_INCLUDED + +#include "atmel_start_pins.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include +#include +#include + +#include + +#include + +#include + +#include + +#include +#include +#include +#include + +#include +#include +#include + +extern struct adc_sync_descriptor ADC_0; + +extern struct calendar_descriptor CALENDAR_0; + +extern struct i2c_m_sync_desc I2C_0; + +extern struct pwm_descriptor PWM_0; + +extern struct pwm_descriptor PWM_1; +extern struct slcd_sync_descriptor SEGMENT_LCD_0; + +void ADC_0_PORT_init(void); +void ADC_0_CLOCK_init(void); +void ADC_0_init(void); + +void CALENDAR_0_CLOCK_init(void); +void CALENDAR_0_init(void); + +void I2C_0_CLOCK_init(void); +void I2C_0_init(void); +void I2C_0_PORT_init(void); + +void delay_driver_init(void); + +void PWM_0_PORT_init(void); +void PWM_0_CLOCK_init(void); +void PWM_0_init(void); + +void PWM_1_PORT_init(void); +void PWM_1_CLOCK_init(void); +void PWM_1_init(void); + +void EXTERNAL_IRQ_0_init(void); + +void SEGMENT_LCD_0_init(void); + +#ifdef __cplusplus +} +#endif +#endif // DRIVER_INIT_INCLUDED -- cgit v1.2.3