/* Auto-generated config file hpl_tc_config.h */ #ifndef HPL_TC_CONFIG_H #define HPL_TC_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>> #include #ifndef CONF_TC3_ENABLE #define CONF_TC3_ENABLE 1 #endif // Basic settings // Prescaler // <0=> No division // <1=> Divide by 2 // <2=> Divide by 4 // <3=> Divide by 8 // <4=> Divide by 16 // <5=> Divide by 64 // <6=> Divide by 256 // <7=> Divide by 1024 // This defines the prescaler value // tc_prescaler #ifndef CONF_TC3_PRESCALER #define CONF_TC3_PRESCALER 0 #endif // // PWM Waveform Output settings // Waveform Period Value (uS) <0x00-0xFFFFFFFF> // The unit of this value is us. // tc_arch_wave_per_val #ifndef CONF_TC3_WAVE_PER_VAL #define CONF_TC3_WAVE_PER_VAL 0x3e8 #endif // Waveform Duty Value (0.1%) <0x00-0x03E8> // The unit of this value is 1/1000. // tc_arch_wave_duty_val #ifndef CONF_TC3_WAVE_DUTY_VAL #define CONF_TC3_WAVE_DUTY_VAL 0x1f4 #endif /* Caculate pwm ccx register value based on WAVE_PER_VAL and Waveform Duty Value */ #if CONF_TC3_PRESCALER < TC_CTRLA_PRESCALER_DIV64_Val #define CONF_TC3_CC0 \ ((uint32_t)(((double)CONF_TC3_WAVE_PER_VAL * CONF_GCLK_TC3_FREQUENCY) / 1000000 / (1 << CONF_TC3_PRESCALER) - 1)) #define CONF_TC3_CC1 ((CONF_TC3_CC0 * CONF_TC3_WAVE_DUTY_VAL) / 1000) #elif CONF_TC3_PRESCALER == TC_CTRLA_PRESCALER_DIV64_Val #define CONF_TC3_CC0 ((uint32_t)(((double)CONF_TC3_WAVE_PER_VAL * CONF_GCLK_TC3_FREQUENCY) / 64000000 - 1)) #define CONF_TC3_CC1 ((CONF_TC3_CC0 * CONF_TC3_WAVE_DUTY_VAL) / 1000) #elif CONF_TC3_PRESCALER == TC_CTRLA_PRESCALER_DIV256_Val #define CONF_TC3_CC0 ((uint32_t)(((double)CONF_TC3_WAVE_PER_VAL * CONF_GCLK_TC3_FREQUENCY) / 256000000 - 1)) #define CONF_TC3_CC1 ((CONF_TC3_CC0 * CONF_TC3_WAVE_DUTY_VAL) / 1000) #elif CONF_TC3_PRESCALER == TC_CTRLA_PRESCALER_DIV1024_Val #define CONF_TC3_CC0 ((uint32_t)(((double)CONF_TC3_WAVE_PER_VAL * CONF_GCLK_TC3_FREQUENCY) / 1024000000 - 1)) #define CONF_TC3_CC1 ((CONF_TC3_CC0 * CONF_TC3_WAVE_DUTY_VAL) / 1000) #endif // // Advanced settings // Mode // Counter in 16-bit mode // Counter in 32-bit mode // These bits mode // tc_mode #ifndef CONF_TC3_MODE #define CONF_TC3_MODE TC_CTRLA_MODE_COUNT16_Val #endif /* Unused in 16/32 bit PWM mode */ #ifndef CONF_TC3_PER #define CONF_TC3_PER 0x32 #endif // Prescaler and Counter Synchronization Selection // Reload or reset counter on next GCLK // Reload or reset counter on next prescaler clock // Reload or reset counter on next GCLK and reset prescaler counter // These bits select if on retrigger event, the Counter should be cleared or reloaded on the next GCLK_TCx clock or on the next prescaled GCLK_TCx clock. // tc_arch_presync #ifndef CONF_TC3_PRESCSYNC #define CONF_TC3_PRESCSYNC TC_CTRLA_PRESCSYNC_GCLK_Val #endif // Run in standby // Indicates whether the will continue running in standby sleep mode or not // tc_arch_runstdby #ifndef CONF_TC3_RUNSTDBY #define CONF_TC3_RUNSTDBY 0 #endif // On-Demand // Indicates whether the TC3's on-demand mode is on or not // tc_arch_ondemand #ifndef CONF_TC3_ONDEMAND #define CONF_TC3_ONDEMAND 0 #endif // Auto Lock // <0x0=>The Lock Update bit is not affected on overflow/underflow and re-trigger event // <0x1=>The Lock Update bit is set on each overflow/underflow or re-trigger event // tc_arch_alock #ifndef CONF_TC3_ALOCK #define CONF_TC3_ALOCK 0 #endif /* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ //#define CONF_TC3_CAPTEN0 0 //#define CONF_TC3_CAPTEN1 0 //#define CONF_TC3_COPEN0 0 //#define CONF_TC3_COPEN1 0 /* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ //#define CONF_TC3_DIR 0 //#define CONF_TC3_ONESHOT 0 //#define CONF_TC3_LUPD 0 // Debug Running Mode // Indicates whether the Debug Running Mode is enabled or not // tc_arch_dbgrun #ifndef CONF_TC3_DBGRUN #define CONF_TC3_DBGRUN 0 #endif // Event control // timer_event_control #ifndef CONF_TC3_EVENT_CONTROL_ENABLE #define CONF_TC3_EVENT_CONTROL_ENABLE 0 #endif // Output Event On Match or Capture on Channel 0 // Enable output of event on timer tick // tc_arch_mceo0 #ifndef CONF_TC3_MCEO0 #define CONF_TC3_MCEO0 0 #endif // Output Event On Match or Capture on Channel 1 // Enable output of event on timer tick // tc_arch_mceo1 #ifndef CONF_TC3_MCEO1 #define CONF_TC3_MCEO1 0 #endif // Output Event On Timer Tick // Enable output of event on timer tick // tc_arch_ovfeo #ifndef CONF_TC3_OVFEO #define CONF_TC3_OVFEO 0 #endif // Event Input // Enable asynchronous input events // tc_arch_tcei #ifndef CONF_TC3_TCEI #define CONF_TC3_TCEI 0 #endif // Inverted Event Input // Invert the asynchronous input events // tc_arch_tcinv #ifndef CONF_TC3_TCINV #define CONF_TC3_TCINV 0 #endif // Event action // <0=> Event action disabled // <1=> Start, restart or re-trigger TC on event // <2=> Count on event // <3=> Start on event // <4=> Time stamp capture // <5=> Period captured in CC0, pulse width in CC1 // <6=> Period captured in CC1, pulse width in CC0 // <7=> Pulse width capture // Event which will be performed on an event // tc_arch_evact #ifndef CONF_TC3_EVACT #define CONF_TC3_EVACT 0 #endif // /* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ //#define CONF_TC3_WAVEGEN TC_CTRLA_WAVEGEN_MFRQ_Val /* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ //#define CONF_TC3_INVEN0 0 //#define CONF_TC3_INVEN1 0 /* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ //#define CONF_TC3_PERBUF 0 /* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ //#define CONF_TC3_CCBUF0 0 //#define CONF_TC3_CCBUF1 0 // // <<< end of configuration section >>> #endif // HPL_TC_CONFIG_H