From 3f2546b2ef55b661fd8dd69682b38992225e86f6 Mon Sep 17 00:00:00 2001 From: fishsoupisgood Date: Mon, 29 Apr 2019 01:17:54 +0100 Subject: Initial import of qemu-2.4.1 --- roms/u-boot/post/lib_powerpc/multi.c | 58 ++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 roms/u-boot/post/lib_powerpc/multi.c (limited to 'roms/u-boot/post/lib_powerpc/multi.c') diff --git a/roms/u-boot/post/lib_powerpc/multi.c b/roms/u-boot/post/lib_powerpc/multi.c new file mode 100644 index 00000000..9c315dfc --- /dev/null +++ b/roms/u-boot/post/lib_powerpc/multi.c @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include + +/* + * CPU test + * Load/store multiple word instructions: lmw, stmw + * + * 27 consecutive words are loaded from a source memory buffer + * into GPRs r5 through r31. After that, 27 consecutive words are stored + * from the GPRs r5 through r31 into a target memory buffer. The contents + * of the source and target buffers are then compared. + */ + +#include +#include "cpu_asm.h" + +#if CONFIG_POST & CONFIG_SYS_POST_CPU + +extern void cpu_post_exec_02(ulong *code, ulong op1, ulong op2); + +int cpu_post_test_multi(void) +{ + int ret = 0; + unsigned int i; + ulong src[27], dst[27]; + int flag = disable_interrupts(); + + ulong code[] = { + ASM_LMW(5, 3, 0), /* lmw r5, 0(r3) */ + ASM_STMW(5, 4, 0), /* stmr r5, 0(r4) */ + ASM_BLR, /* blr */ + }; + + for (i = 0; i < ARRAY_SIZE(src); ++i) { + src[i] = i; + dst[i] = 0; + } + + cpu_post_exec_02(code, (ulong) src, (ulong) dst); + + ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1; + + if (ret != 0) + post_log("Error at multi test !\n"); + + if (flag) + enable_interrupts(); + + return ret; +} + +#endif -- cgit v1.2.3