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author | Stephen Caudle <stephen@caudle.info> | 2015-07-23 23:39:05 -0400 |
---|---|---|
committer | Stephen Caudle <stephen@caudle.info> | 2015-07-25 22:16:19 -0400 |
commit | f91f5a5c5718a6e9c35417662243cf593b07f91f (patch) | |
tree | 2328a591d7151ef9f70493fa17ba4e080d0ab83b /os/hal/ports/NRF51 | |
parent | e82536b815693d0d5a5580d6162119312ebc0810 (diff) | |
download | ChibiOS-Contrib-f91f5a5c5718a6e9c35417662243cf593b07f91f.tar.gz ChibiOS-Contrib-f91f5a5c5718a6e9c35417662243cf593b07f91f.tar.bz2 ChibiOS-Contrib-f91f5a5c5718a6e9c35417662243cf593b07f91f.zip |
Cleanup nRF51 PAL driver
Diffstat (limited to 'os/hal/ports/NRF51')
-rw-r--r-- | os/hal/ports/NRF51/NRF51822/pal_lld.c | 73 | ||||
-rw-r--r-- | os/hal/ports/NRF51/NRF51822/pal_lld.h | 99 |
2 files changed, 71 insertions, 101 deletions
diff --git a/os/hal/ports/NRF51/NRF51822/pal_lld.c b/os/hal/ports/NRF51/NRF51822/pal_lld.c index ccbe20e..5716498 100644 --- a/os/hal/ports/NRF51/NRF51822/pal_lld.c +++ b/os/hal/ports/NRF51/NRF51822/pal_lld.c @@ -43,36 +43,72 @@ /* Driver local functions. */
/*===========================================================================*/
-void _pal_lld_setpadmode(uint8_t pad, iomode_t mode)
+void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
{
- uint8_t value = 0;
-
- osalDbgAssert(pad < 32, "invalid pad");
+ (void)port;
+ osalDbgAssert(pad <= 31, "pal_lld_setpadmode() - invalid pad");
switch (mode) {
case PAL_MODE_RESET:
case PAL_MODE_UNCONNECTED:
- value = 2;
+ NRF_GPIO->DIRSET = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT:
case PAL_MODE_INPUT_ANALOG:
- value = 0;
+ NRF_GPIO->DIRCLR = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT_PULLUP:
- value = 0xC;
+ NRF_GPIO->DIRCLR = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_INPUT_PULLDOWN:
- value = 4;
+ NRF_GPIO->DIRCLR = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_OUTPUT_PUSHPULL:
- value = 1;
+ NRF_GPIO->DIRSET = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
break;
case PAL_MODE_OUTPUT_OPENDRAIN:
- value = 0x61;
+ NRF_GPIO->DIRSET = ((uint32_t) 1 << pad);
+ NRF_GPIO->PIN_CNF[pad] =
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
+ (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) |
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
+ (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
+ (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+ break;
+ default:
+ osalDbgAssert(FALSE, "invalid pal mode");
break;
}
-
- NRF_GPIO->PIN_CNF[pad] = value;
}
/*===========================================================================*/
@@ -84,10 +120,9 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode) /*===========================================================================*/
/**
- * @brief STM32 I/O ports configuration.
- * @details Ports A-D(E, F, G, H) clocks enabled.
+ * @brief NRF51 I/O ports configuration.
*
- * @param[in] config the STM32 ports configuration
+ * @param[in] config the NRF51 ports configuration
*
* @notapi
*/
@@ -117,10 +152,10 @@ void _pal_lld_setgroupmode(ioportid_t port, {
uint8_t i;
- (void)mask;
-
- for (i = 0; i < TOTAL_GPIO_PADS; i++) {
- pal_lld_setpadmode(port, i, mode);
+ for (i = 0; i < TOTAL_GPIO_PADS; i++, mask >>= 1) {
+ if (mask & 1) {
+ pal_lld_setpadmode(port, i, mode);
+ }
}
}
diff --git a/os/hal/ports/NRF51/NRF51822/pal_lld.h b/os/hal/ports/NRF51/NRF51822/pal_lld.h index 2383cfe..d2f0dfb 100644 --- a/os/hal/ports/NRF51/NRF51822/pal_lld.h +++ b/os/hal/ports/NRF51/NRF51822/pal_lld.h @@ -69,7 +69,7 @@ typedef uint32_t ioportmask_t; /**
* @brief Digital I/O modes.
*/
-typedef uint32_t iomode_t;
+typedef uint8_t iomode_t;
/**
* @brief Port Identifier.
@@ -77,7 +77,7 @@ typedef uint32_t iomode_t; * any assumption about it, use the provided macros when populating
* variables of this type.
*/
-typedef uint32_t ioportid_t;
+typedef NRF_GPIO_Type *ioportid_t;
/*===========================================================================*/
/* I/O Ports Identifiers. */
@@ -95,8 +95,6 @@ typedef uint32_t ioportid_t; /* functions, if so please put them in pal_lld.c. */
/*===========================================================================*/
-void _pal_lld_setpadmode(uint8_t pad, iomode_t mode);
-
/**
* @brief Low level PAL subsystem initialization.
*
@@ -114,7 +112,7 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode); *
* @notapi
*/
-#define pal_lld_readport(port) 0U
+#define pal_lld_readport(port) (NRF_GPIO->IN)
/**
* @brief Reads the output latch.
@@ -126,7 +124,7 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode); *
* @notapi
*/
-#define pal_lld_readlatch(port) 0U
+#define pal_lld_readlatch(port) (NRF_GPIO->OUT)
/**
* @brief Writes a bits mask on a I/O port.
@@ -136,12 +134,7 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode); *
* @notapi
*/
-#define pal_lld_writeport(port, bits) \
- do { \
- (void)port; \
- (void)bits; \
- } while (false)
-
+#define pal_lld_writeport(port, bits) (NRF_GPIO->OUT = (bits))
/**
* @brief Sets a bits mask on a I/O port.
@@ -154,11 +147,7 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode); *
* @notapi
*/
-#define pal_lld_setport(port, bits) \
- do { \
- (void)port; \
- (void)bits; \
- } while (false)
+#define pal_lld_setport(port, bits) (NRF_GPIO->OUTSET = (bits))
/**
@@ -172,67 +161,7 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode); *
* @notapi
*/
-#define pal_lld_clearport(port, bits) \
- do { \
- (void)port; \
- (void)bits; \
- } while (false)
-
-
-/**
- * @brief Toggles a bits mask on a I/O port.
- * @note The @ref PAL provides a default software implementation of this
- * functionality, implement this function if can optimize it by using
- * special hardware functionalities or special coding.
- *
- * @param[in] port port identifier
- * @param[in] bits bits to be XORed on the specified port
- *
- * @notapi
- */
-#define pal_lld_toggleport(port, bits) \
- do { \
- (void)port; \
- (void)bits; \
- } while (false)
-
-
-/**
- * @brief Reads a group of bits.
- * @note The @ref PAL provides a default software implementation of this
- * functionality, implement this function if can optimize it by using
- * special hardware functionalities or special coding.
- *
- * @param[in] port port identifier
- * @param[in] mask group mask
- * @param[in] offset group bit offset within the port
- * @return The group logical states.
- *
- * @notapi
- */
-#define pal_lld_readgroup(port, mask, offset) 0U
-
-/**
- * @brief Writes a group of bits.
- * @note The @ref PAL provides a default software implementation of this
- * functionality, implement this function if can optimize it by using
- * special hardware functionalities or special coding.
- *
- * @param[in] port port identifier
- * @param[in] mask group mask
- * @param[in] offset group bit offset within the port
- * @param[in] bits bits to be written. Values exceeding the group width
- * are masked.
- *
- * @notapi
- */
-#define pal_lld_writegroup(port, mask, offset, bits) \
- do { \
- (void)port; \
- (void)mask; \
- (void)offset; \
- (void)bits; \
- } while (false)
+#define pal_lld_clearport(port, bits) (NRF_GPIO->OUTCLR = (bits))
/**
* @brief Pads group mode setup.
@@ -264,7 +193,8 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode); *
* @notapi
*/
-#define pal_lld_readpad(port, pad) PAL_LOW
+#define pal_lld_readpad(port, pad) \
+ ((NRF_GPIO->IN & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW)
/**
* @brief Writes a logical state on an output pad.
@@ -284,8 +214,10 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode); #define pal_lld_writepad(port, pad, bit) \
do { \
(void)port; \
- (void)pad; \
- (void)bit; \
+ if (bit == PAL_HIGH) \
+ NRF_GPIO->OUTSET = ((uint32_t) 1 << pad); \
+ else \
+ NRF_GPIO->OUTCLR = ((uint32_t) 1 << pad); \
} while (false)
/**
@@ -349,7 +281,7 @@ void _pal_lld_setpadmode(uint8_t pad, iomode_t mode); *
* @notapi
*/
-#define pal_lld_setpadmode(port, pad, mode) _pal_lld_setpadmode(pad, mode)
+#define pal_lld_setpadmode(port, pad, mode) _pal_lld_setpadmode(port, pad, mode)
#if !defined(__DOXYGEN__)
extern const PALConfig pal_default_config;
@@ -362,6 +294,9 @@ extern "C" { void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
iomode_t mode);
+ void _pal_lld_setpadmode(ioportid_t port,
+ uint8_t pad,
+ iomode_t mode);
#ifdef __cplusplus
}
#endif
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