aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/ports/STM32/LLD
diff options
context:
space:
mode:
authorbarthess <barthess@yandex.ru>2015-03-31 16:43:14 +0300
committerbarthess <barthess@yandex.ru>2015-03-31 16:43:14 +0300
commit3d45d3d4fa3706e8e41558976d5d3ec2e0276b22 (patch)
treeec71758b47f4366140be1157f148695cd7e52cf0 /os/hal/ports/STM32/LLD
parent3aae2d6b821a4ad44c09358ca50baf5dafc57374 (diff)
downloadChibiOS-Contrib-3d45d3d4fa3706e8e41558976d5d3ec2e0276b22.tar.gz
ChibiOS-Contrib-3d45d3d4fa3706e8e41558976d5d3ec2e0276b22.tar.bz2
ChibiOS-Contrib-3d45d3d4fa3706e8e41558976d5d3ec2e0276b22.zip
EICU. Updated lld according to chibios updates.
Diffstat (limited to 'os/hal/ports/STM32/LLD')
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h
index 3c95720..4d20c2f 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h
@@ -260,62 +260,62 @@
#endif
#if STM32_EICU_USE_TIM1 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM1_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM1_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM1"
#endif
#if STM32_EICU_USE_TIM2 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM2_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM2_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM2"
#endif
#if STM32_EICU_USE_TIM3 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM3_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM3_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM3"
#endif
#if STM32_EICU_USE_TIM4 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM4_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM4_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM4"
#endif
#if STM32_EICU_USE_TIM5 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM5_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM5_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM5"
#endif
#if STM32_EICU_USE_TIM8 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM8_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM8_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM8"
#endif
#if STM32_EICU_USE_TIM9 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM9_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM9_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM9"
#endif
#if STM32_EICU_USE_TIM12 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM12_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM12_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM12"
#endif
#if STM32_EICU_USE_TIM10 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM10_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM10_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM10"
#endif
#if STM32_EICU_USE_TIM11 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM11_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM11_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM11"
#endif
#if STM32_EICU_USE_TIM13 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM13_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM13_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM13"
#endif
#if STM32_EICU_USE_TIM14 && \
- !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_EICU_TIM14_IRQ_PRIORITY)
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_EICU_TIM14_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM14"
#endif