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| author | Stephane D'Alu <sdalu@sdalu.com> | 2016-07-07 21:25:51 +0200 |
|---|---|---|
| committer | Stephane D'Alu <sdalu@sdalu.com> | 2016-07-07 21:25:51 +0200 |
| commit | f75abd1037a5c2eb119533eb2f4c7c16d874abf2 (patch) | |
| tree | 0c2af621c9380d1cea37df8cdddd55eccd3b6088 /os/hal/ports/STM32 | |
| parent | 9c88423d66e9b4eafecc658058f25f79e08ff120 (diff) | |
| download | ChibiOS-Contrib-f75abd1037a5c2eb119533eb2f4c7c16d874abf2.tar.gz ChibiOS-Contrib-f75abd1037a5c2eb119533eb2f4c7c16d874abf2.tar.bz2 ChibiOS-Contrib-f75abd1037a5c2eb119533eb2f4c7c16d874abf2.zip | |
added qeiAdjustI. added new field and checking in STM32
Diffstat (limited to 'os/hal/ports/STM32')
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c | 2 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h | 67 |
2 files changed, 69 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c index ea051f7..ffc4992 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c @@ -150,6 +150,8 @@ void qei_lld_init(void) { * @notapi
*/
void qei_lld_start(QEIDriver *qeip) {
+ osalDbgAssert((qeip->config->min == 0) || (qeip->config->max == 0),
+ "only min/max set to 0 is supported");
if (qeip->state == QEI_STOP) {
/* Clock activation and timer reset.*/
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h index d0cb683..c708b5e 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h @@ -33,6 +33,16 @@ /* Driver constants. */
/*===========================================================================*/
+/**
+ * @brief Mininum usable value for defining counter underflow
+ */
+#define QEI_COUNT_MIN (0)
+
+/**
+ * @brief Maximum usable value for defining counter overflow
+ */
+#define QEI_COUNT_MAX (65535)
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -202,6 +212,14 @@ #error "Invalid IRQ priority assigned to TIM8"
#endif
+#if QEI_USE_OVERFLOW_DISCARD
+#error "QEI_USE_OVERFLOW_DISCARD not supported by this driver"
+#endif
+
+#if QEI_USE_OVERFLOW_MINMAX
+#error "QEI_USE_OVERFLOW_MINMAX not supported by this driver"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@@ -257,6 +275,45 @@ typedef struct { * @brief Direction inversion.
*/
qeidirinv_t dirinv;
+ /**
+ * @brief Handling of counter overflow/underflow
+ *
+ * @details When overflow occurs, the counter value is updated
+ * according to:
+ * - QEI_OVERFLOW_DISCARD:
+ * discard the update value, counter doesn't change
+ */
+ qeioverflow_t overflow;
+ /**
+ * @brief Min count value.
+ *
+ * @note If min == max, then QEI_COUNT_MIN is used.
+ *
+ * @note Only min set to 0 / QEI_COUNT_MIN is supported.
+ */
+ qeicnt_t min;
+ /**
+ * @brief Max count value.
+ *
+ * @note If min == max, then QEI_COUNT_MAX is used.
+ *
+ * @note Only max set to 0 / QEI_COUNT_MAX is supported.
+ */
+ qeicnt_t max;
+ /**
+ * @brief Notify of value change
+ *
+ * @note Called from ISR context.
+ */
+ qeicallback_t notify_cb;
+ /**
+ * @brief Notify of overflow
+ *
+ * @note Overflow notification is performed after
+ * value changed notification.
+ * @note Called from ISR context.
+ */
+ void (*overflow_cb)(QEIDriver *qeip, qeidelta_t delta);
/* End of the mandatory fields.*/
} QEIConfig;
@@ -300,6 +357,16 @@ struct QEIDriver { */
#define qei_lld_get_count(qeip) ((qeip)->tim->CNT)
+/**
+ * @brief Set the counter value.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ * @param[in] qeip counter value
+ *
+ * @notapi
+ */
+#define qei_lld_set_count(qeip, value)
+
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
|