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authormarcoveeneman <marco-veeneman@hotmail.com>2015-02-16 21:49:29 +0100
committermarcoveeneman <marco-veeneman@hotmail.com>2015-02-16 21:49:29 +0100
commit7b73ccd1d023a9db2b96e1563bbe995806d7356b (patch)
tree6afcd496a6d4656cbe7c1c68d978c50df4fb009e /os/hal/ports
parent59499bd0cf2a1b1f604969207d9d488943bf798d (diff)
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Added basic demo for TM4C1294 Connected Launchpad with LwIP.
Diffstat (limited to 'os/hal/ports')
-rw-r--r--os/hal/ports/TIVA/LLD/pal_lld.c2
-rw-r--r--os/hal/ports/TIVA/LLD/serial_lld.c4
-rw-r--r--os/hal/ports/TIVA/TM4C129x/hal_lld.c4
3 files changed, 5 insertions, 5 deletions
diff --git a/os/hal/ports/TIVA/LLD/pal_lld.c b/os/hal/ports/TIVA/LLD/pal_lld.c
index 9939331..657f982 100644
--- a/os/hal/ports/TIVA/LLD/pal_lld.c
+++ b/os/hal/ports/TIVA/LLD/pal_lld.c
@@ -165,7 +165,7 @@ void gpio_init (GPIO_TypeDef *gpiop, const tiva_gpio_setup_t *config)
*/
void _pal_lld_init(const PALConfig *config)
{
- SYSCTL->RCGC.GPIO = RCGCGPIO_VALUE;
+ SYSCTL->RCGCGPIO = RCGCGPIO_VALUE;
__NOP();
__NOP();
diff --git a/os/hal/ports/TIVA/LLD/serial_lld.c b/os/hal/ports/TIVA/LLD/serial_lld.c
index 9238942..92761dc 100644
--- a/os/hal/ports/TIVA/LLD/serial_lld.c
+++ b/os/hal/ports/TIVA/LLD/serial_lld.c
@@ -507,7 +507,7 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
if (sdp->state == SD_STOP) {
#if TIVA_SERIAL_USE_UART0
if (&SD1 == sdp) {
- SYSCTL->RCGC.UART |= (1 << 0);
+ SYSCTL->RCGCUART |= (1 << 0);
nvicEnableVector(TIVA_UART0_NUMBER, TIVA_SERIAL_UART0_PRIORITY);
}
#endif
@@ -570,7 +570,7 @@ void sd_lld_stop(SerialDriver *sdp)
uart_deinit(sdp->uart);
#if TIVA_SERIAL_USE_UART0
if (&SD1 == sdp) {
- SYSCTL->RCGC.UART &= ~(1 << 0); /* disable UART0 module */
+ SYSCTL->RCGCUART &= ~(1 << 0); /* disable UART0 module */
nvicDisableVector(TIVA_UART0_NUMBER);
return;
}
diff --git a/os/hal/ports/TIVA/TM4C129x/hal_lld.c b/os/hal/ports/TIVA/TM4C129x/hal_lld.c
index 3bfe485..4f2a968 100644
--- a/os/hal/ports/TIVA/TM4C129x/hal_lld.c
+++ b/os/hal/ports/TIVA/TM4C129x/hal_lld.c
@@ -109,8 +109,8 @@ void tiva_clock_init(void)
* 6. Write the PLLFREQ0 and PLLFREQ1 registers with the values of Q, N, MINT, and MFRAC to
* the configure the desired VCO frequency setting.
*/
- SYSCTL->PLLFREQ[1] = (0x04 << 0); // 5 - 1
- SYSCTL->PLLFREQ[0] = (0x60 << 0) | PLLFREQ0_PLLPWR;
+ SYSCTL->PLLFREQ1 = (0x04 << 0); // 5 - 1
+ SYSCTL->PLLFREQ0 = (0x60 << 0) | PLLFREQ0_PLLPWR;
/*
* 7. Write the MEMTIM0 register to correspond to the new system clock setting.