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authorStephane D'Alu <sdalu@sdalu.com>2016-02-05 18:58:31 +0100
committerStephane D'Alu <sdalu@sdalu.com>2016-02-05 18:58:31 +0100
commita3a0be11dc5a81a36fb2b36b37780ea5d733d9fe (patch)
tree42aed21351e5f34e25efec83f70a9e5ffb201901 /os/hal
parent5af8452153646009731c11dd92a8634695b60d55 (diff)
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moved from HFCLK TIMER to RTC LFCLK
Diffstat (limited to 'os/hal')
-rw-r--r--os/hal/boards/NRF51-DK/board.h2
-rw-r--r--os/hal/boards/WVSHARE_BLE400/board.h2
-rw-r--r--os/hal/ports/NRF51/NRF51822/hal_lld.c29
-rw-r--r--os/hal/ports/NRF51/NRF51822/hal_lld.h4
-rw-r--r--os/hal/ports/NRF51/NRF51822/st_lld.c38
5 files changed, 47 insertions, 28 deletions
diff --git a/os/hal/boards/NRF51-DK/board.h b/os/hal/boards/NRF51-DK/board.h
index 5e0c738..abd8f7a 100644
--- a/os/hal/boards/NRF51-DK/board.h
+++ b/os/hal/boards/NRF51-DK/board.h
@@ -22,7 +22,7 @@
#define BOARD_NAME "nRF51 DK"
/* Board oscillators-related settings. */
-#define XTAL_VALUE 16000000
+#define NRF51_XTAL_VALUE 16000000
/* GPIO pins. */
#define BTN1 17
diff --git a/os/hal/boards/WVSHARE_BLE400/board.h b/os/hal/boards/WVSHARE_BLE400/board.h
index 57578b5..536b7f6 100644
--- a/os/hal/boards/WVSHARE_BLE400/board.h
+++ b/os/hal/boards/WVSHARE_BLE400/board.h
@@ -22,7 +22,7 @@
#define BOARD_NAME "WvShare BLE400"
/* Board oscillators-related settings. */
-#define XTAL_VALUE 16000000
+#define NRF51_XTAL_VALUE 16000000
/* GPIO pins. */
#define KEY1 16
diff --git a/os/hal/ports/NRF51/NRF51822/hal_lld.c b/os/hal/ports/NRF51/NRF51822/hal_lld.c
index e1d2ed5..3e74068 100644
--- a/os/hal/ports/NRF51/NRF51822/hal_lld.c
+++ b/os/hal/ports/NRF51/NRF51822/hal_lld.c
@@ -55,6 +55,35 @@
*/
void hal_lld_init(void)
{
+ /* High frequency clock initialisation
+ * (If NRF51_XTAL_VALUE is not defined assume its an RC oscillator)
+ */
+#if defined(NRF51_XTAL_VALUE)
+#if NRF51_XTAL_VALUE == 16000000
+ NRF_CLOCK->XTALFREQ = 0xFF;
+#elif NRF51_XTAL_VALUE == 32000000
+ NRF_CLOCK->XTALFREQ = 0x00;
+#endif
+#endif
+ NRF_CLOCK->TASKS_HFCLKSTOP = 1;
+
+ /* Low frequency clock initialisation
+ * If source not specified, use the internal RC (0) which is prefered
+ * over synthetized clock from the high frequency clock (2)
+ */
+#if defined(NRF51_LFCLK_SOURCE)
+#if (NRF51_LFCLK_SOURCE >=0) && (NRF51_LFCLK_SOURCE <= 2)
+ NRF_CLOCK->LFCLKSRC = NRF51_LFCLK_SOURCE;
+#else
+#error "Possible value for NRF51_LFCLK_SOURCE are 0=RC, 1=XTAL, 2=Synth"
+#endif
+#else
+ NRF_CLOCK->LFCLKSRC = 0;
+#endif
+
+#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE)
+ NRF_CLOCK->TASKS_LFCLKSTART = 1;
+#endif
}
/**
diff --git a/os/hal/ports/NRF51/NRF51822/hal_lld.h b/os/hal/ports/NRF51/NRF51822/hal_lld.h
index 1cc9057..b685667 100644
--- a/os/hal/ports/NRF51/NRF51822/hal_lld.h
+++ b/os/hal/ports/NRF51/NRF51822/hal_lld.h
@@ -44,9 +44,11 @@
/*===========================================================================*/
/*===========================================================================*/
-/* Derived constants and error checks. */
+/* Driver constants and error checks. */
/*===========================================================================*/
+#define NRF51_LFCLK_FREQUENCY 32768
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
diff --git a/os/hal/ports/NRF51/NRF51822/st_lld.c b/os/hal/ports/NRF51/NRF51822/st_lld.c
index 526db35..d8c7b6c 100644
--- a/os/hal/ports/NRF51/NRF51822/st_lld.c
+++ b/os/hal/ports/NRF51/NRF51822/st_lld.c
@@ -52,19 +52,17 @@
#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
/**
- * @brief System Timer vector.
+ * @brief System Timer vector (RTC0)
* @details This interrupt is used for system tick in periodic mode.
*
* @isr
*/
-OSAL_IRQ_HANDLER(Vector60) {
+OSAL_IRQ_HANDLER(Vector6C) {
OSAL_IRQ_PROLOGUE();
- /* Clear timer compare event */
- if (NRF_TIMER0->EVENTS_COMPARE[0] != 0)
- NRF_TIMER0->EVENTS_COMPARE[0] = 0;
-
+ NRF_RTC0->EVENTS_TICK = 0;
+
osalSysLockFromISR();
osalOsTimerHandlerI();
osalSysUnlockFromISR();
@@ -83,29 +81,19 @@ OSAL_IRQ_HANDLER(Vector60) {
* @notapi
*/
void st_lld_init(void) {
+#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING)
-#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
- NRF_TIMER0->TASKS_CLEAR = 1;
-
- /*
- * Using 32-bit mode with prescaler 16 configures this
- * timer with a 1MHz clock.
- */
- NRF_TIMER0->BITMODE = 3;
- NRF_TIMER0->PRESCALER = 4;
+#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
- /*
- * Configure timer 0 compare capture 0 to generate interrupt
- * and clear timer value when event is generated.
- */
- NRF_TIMER0->CC[0] = (1000000 / OSAL_ST_FREQUENCY) - 1;
- NRF_TIMER0->SHORTS = 1;
- NRF_TIMER0->INTENSET = 0x10000;
-
- nvicEnableVector(TIMER0_IRQn, 8);
+#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
+ /* Using RTC with prescaler */
+ NRF_RTC0->TASKS_STOP = 1;
+ NRF_RTC0->PRESCALER = (NRF51_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1;
+ NRF_RTC0->INTENSET = RTC_INTENSET_TICK_Msk;
/* Start timer */
- NRF_TIMER0->TASKS_START = 1;
+ nvicEnableVector(RTC0_IRQn, 8);
+ NRF_RTC0->TASKS_START = 1;
#endif
}