NAND. Added reset function.

4 files changed, 23 insertions, 8 deletions

diff --git a/os/hal/include/hal_nand.h b/os/hal/include/hal_nand.h
index ace3e5d..7897187 100644
--- a/os/hal/include/hal_nand.h
+++ b/os/hal/include/hal_nand.h
@@ -82,6 +82,7 @@ typedef enum {
   NAND_READ = 6,                     /**< Reading from NAND.              */
   NAND_DMA_TX = 7,                   /**< DMA transmitting.               */
   NAND_DMA_RX = 8,                   /**< DMA receiving.                  */
+  NAND_RESET = 9,                    /**< Software reset in progress.     */
 } nandstate_t;
 
 /**
diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c b/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c
index f39ff35..5ba1b29 100644
--- a/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c
+++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c
@@ -157,14 +157,9 @@ static void nand_isr_handler (NANDDriver *nandp) {
     /* thread will be waked up from DMA ISR */
     break;
 
-  case NAND_ERASE:
-    /* NAND reports about erase finish */
-    nandp->state = NAND_READY;
-    wakeup_isr(nandp);
-    break;
-
-  case NAND_PROGRAM:
-    /* NAND reports about page programming finish */
+  case NAND_ERASE:      /* NAND reports about erase finish */
+  case NAND_PROGRAM:    /* NAND reports about page programming finish */
+  case NAND_RESET:      /* NAND reports about finished reset recover */
     nandp->state = NAND_READY;
     wakeup_isr(nandp);
     break;
@@ -411,6 +406,23 @@ uint8_t nand_lld_write_data(NANDDriver *nandp, const uint8_t *data,
 }
 
 /**
+ * @brief   Soft reset NAND device.
+ *
+ * @param[in] nandp         pointer to the @p NANDDriver object
+ *
+ * @notapi
+ */
+void nand_lld_reset(NANDDriver *nandp) {
+
+  nandp->state = NAND_RESET;
+
+  nand_lld_write_cmd (nandp, NAND_CMD_RESET);
+  osalSysLock();
+  nand_lld_suspend_thread(nandp);
+  osalSysUnlock();
+}
+
+/**
  * @brief   Erase block.
  *
  * @param[in] nandp         pointer to the @p NANDDriver object
diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.h b/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.h
index de7a0c4..ead1a4e 100644
--- a/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.h
+++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.h
@@ -283,6 +283,7 @@ extern "C" {
   uint8_t nand_lld_write_data(NANDDriver *nandp, const uint8_t *data,
                 size_t datalen, uint8_t *addr, size_t addrlen, uint32_t *ecc);
   uint8_t nand_lld_read_status(NANDDriver *nandp);
+  void nand_lld_reset(NANDDriver *nandp);
 #ifdef __cplusplus
 }
 #endif
diff --git a/os/hal/src/hal_nand.c b/os/hal/src/hal_nand.c
index e1b298a..2e5c505 100644
--- a/os/hal/src/hal_nand.c
+++ b/os/hal/src/hal_nand.c
@@ -229,6 +229,7 @@ void nandStart(NANDDriver *nandp, const NANDConfig *config, bitmap_t *bb_map) {
   pagesize_check(nandp->config->page_data_size);
   nand_lld_start(nandp);
   nandp->state = NAND_READY;
+  nand_lld_reset(nandp);
 
   if (NULL != bb_map) {
     nandp->bb_map = bb_map;